pentevo – /unsupported/solegstar/fpga/current/README

Rev 594 – added patch for solegstar -- no kempston joystick port

lvd — Wed, 23 Jan 2013 02:19:06 +0400

lvd – 14 file(s) modified
added patch for solegstar -- no kempston joystick port

+ /unsupported
+ /unsupported/solegstar
+ /unsupported/solegstar/avr
+ /unsupported/solegstar/avr/current (copied from /avr/current@593)
~ /unsupported/solegstar/avr/current/default/core.hex
~ /unsupported/solegstar/avr/current/default/zxevo_fw.bin
+ /unsupported/solegstar/fpga
+ /unsupported/solegstar/fpga/current (copied from /fpga/current@593)
~ /unsupported/solegstar/fpga/current/quartus/top.rbf
~ /unsupported/solegstar/fpga/current/quartus/top.sof
~ /unsupported/solegstar/fpga/current/z80/zports.v
+ /unsupported/solegstar/tools
+ /unsupported/solegstar/tools/make_fw (copied from /tools/make_fw@593)
+ /unsupported/solegstar/tools/mhmt (copied from /tools/mhmt@593)

Rev 134 – fpga back to rev.127

ddp — Tue, 23 Feb 2010 11:53:32 +0300

ddp – 9 file(s) modified
fpga back to rev.127

~ /fpga/current/quartus/top.qsf
~ /fpga/current/README
~ /fpga/current/top.v
+ /fpga/current/vga/vga_double.v
+ /fpga/current/vga/vga_synch.v
+ /fpga/current/video/synch.v
+ /fpga/current/video/syncv.v
x /fpga/current/video/video.v
+ /fpga/current/video/videoout.v

Rev 128 – finest tune video-out

ddp — Sun, 21 Feb 2010 18:14:13 +0300

ddp – 11 file(s) modified
finest tune video-out

~ /avr/current/default/core.hex
~ /avr/current/default/ZXEVO_FW.BIN
~ /fpga/current/quartus/top.qsf
~ /fpga/current/README
~ /fpga/current/top.v
x /fpga/current/vga/vga_double.v
x /fpga/current/vga/vga_synch.v
x /fpga/current/video/synch.v
x /fpga/current/video/syncv.v
+ /fpga/current/video/video.v
x /fpga/current/video/videoout.v

Rev 115 – added real matrix keyboard support

ddp — Sat, 06 Feb 2010 10:35:08 +0300

ddp – 6 file(s) modified
added real matrix keyboard support

~ /avr/current/default/core.hex
~ /avr/current/default/ZXEVO_FW.BIN
~ /avr/current/interrupts.c
~ /avr/current/zx.c
~ /avr/current/zx.h
~ /fpga/current/README

Rev 109 – fix video out (TV and VGA)

ddp — Sun, 31 Jan 2010 15:18:26 +0300

ddp – 10 file(s) modified
fix video out (TV and VGA)

~ /avr/current/default/core.hex
x /avr/current/default/top.rbf
~ /avr/current/default/version.txt
~ /avr/current/default/ZXEVO_FW.BIN
~ /fpga/current/README
~ /fpga/current/vga/vga_double.v
~ /fpga/current/vga/vga_synch.v
~ /fpga/current/video/fetch.v
~ /fpga/current/video/synch.v
~ /fpga/current/video/syncv.v

Rev 39 – Fix Lock48K Variant for Lock128K ("koe's style" string in zports.v)

ddp — Sun, 06 Dec 2009 18:02:30 +0300

ddp – 9 file(s) modified
Fix Lock48K
Variant for Lock128K ("koe's style" string in zports.v)

~ /avr/current/default/core.hex
~ /avr/current/default/Makefile
~ /avr/current/default/top.rbf
~ /avr/current/default/ZXEVO_FW.BIN
~ /fpga/current/quartus/top.rbf
~ /fpga/current/quartus/top.sof
~ /fpga/current/README
~ /fpga/current/z80/zports.v
x /specs/boot_14.09.09_b.txt

Rev 38 – Probably bugfix for NMOS bug; changed Makefile in avr/ to ...

lvd — Sun, 06 Dec 2009 01:53:17 +0300

lvd – 14 file(s) modified
Probably bugfix for NMOS bug; changed Makefile in avr/ to automatically take top.rbf from fpga/current

~ /avr/current/default/core.hex
~ /avr/current/default/Makefile
~ /avr/current/default/top.rbf
~ /avr/current/default/ZXEVO_FW.BIN
+ /fpga/current/quartus/pentevo.qpf (copied from /fpga/current/quartus/pentevo_0_01.qpf@33)
+ /fpga/current/quartus/pentevo.qws (copied from /fpga/current/quartus/pentevo_0_01.qws@33)
x /fpga/current/quartus/pentevo_0_01.qpf
x /fpga/current/quartus/pentevo_0_01.qws
~ /fpga/current/quartus/top.rbf
~ /fpga/current/quartus/top.sof
~ /fpga/current/README
+ /fpga/current/sim_top/README
~ /fpga/current/sim_top/wave.do
~ /fpga/current/z80/zmem.v

Rev 16 – Some IDE fixes for old IDE drives

lvd — Fri, 27 Nov 2009 00:33:22 +0300

lvd – 1 file(s) modified
Some IDE fixes for old IDE drives

~ /fpga/current/README

Rev 4 – initial commit of FPGA files

lvd — Sat, 21 Nov 2009 21:06:56 +0300

lvd – 195 file(s) modified
initial commit of FPGA files

x /file1st
+ /fpga
+ /fpga/current
+ /fpga/current/common
+ /fpga/current/common/resetter.v
+ /fpga/current/common/spi2.v
+ /fpga/current/dram
+ /fpga/current/dram/arbiter.png
+ /fpga/current/dram/arbiter.v
+ /fpga/current/dram/cycles.txt
+ /fpga/current/dram/dram.v
+ /fpga/current/dram/test_compile.zip
+ /fpga/current/include
+ /fpga/current/include/tune.v
+ /fpga/current/quartus
+ /fpga/current/quartus/pentevo_0_01.qpf
+ /fpga/current/quartus/pentevo_0_01.qws
+ /fpga/current/quartus/top.qsf
+ /fpga/current/quartus/top.rbf
+ /fpga/current/quartus/top.sof
+ /fpga/current/quartus/top_fix_ide_maybe.zip
+ /fpga/current/README
+ /fpga/current/sim_cdv
+ /fpga/current/sim_cdv/a
+ /fpga/current/sim_cdv/b
+ /fpga/current/sim_cdv/tb.v
+ /fpga/current/sim_models
+ /fpga/current/sim_models/drammem.v
+ /fpga/current/sim_models/ram.v
+ /fpga/current/sim_models/rom.v
+ /fpga/current/sim_models/T80.vhd
+ /fpga/current/sim_models/T80a.vhd
+ /fpga/current/sim_models/T80_ALU.vhd
+ /fpga/current/sim_models/T80_MCode.vhd
+ /fpga/current/sim_models/T80_Pack.vhd
+ /fpga/current/sim_models/T80_Reg.vhd
+ /fpga/current/slave
+ /fpga/current/slave/slavespi.v
+ /fpga/current/slave/zx.h
+ /fpga/current/slave/zx_keys.txt
+ /fpga/current/texts
+ /fpga/current/texts/dram_access.txt
+ /fpga/current/texts/readme.txt
+ /fpga/current/texts/video_modes.txt
+ /fpga/current/top.v
+ /fpga/current/vg93
+ /fpga/current/vg93/vg93.v
+ /fpga/current/video
+ /fpga/current/video/addresses.txt
+ /fpga/current/video/fetch.v
+ /fpga/current/video/synch.v
+ /fpga/current/video/syncv.v
+ /fpga/current/video/videoout.v
+ /fpga/current/z80
+ /fpga/current/z80/zbus.v
+ /fpga/current/z80/zclock.v
+ /fpga/current/z80/zint.v
+ /fpga/current/z80/zmem.v
+ /fpga/current/z80/zports.v
+ /fpga/tests
+ /fpga/tests/test_dram
+ /fpga/tests/test_dram/dram.v
+ /fpga/tests/test_dram/dram_control.v
+ /fpga/tests/test_dram/main.qsf
+ /fpga/tests/test_dram/main.rbf
+ /fpga/tests/test_dram/main.sof
+ /fpga/tests/test_dram/main.v
+ /fpga/tests/test_dram/main_.v
+ /fpga/tests/test_dram/mem_tester.v
+ /fpga/tests/test_dram/resetter.v
+ /fpga/tests/test_dram/rnd_vec_gen.v
+ /fpga/tests/test_dram/sram_control.v
+ /fpga/tests/test_dram/stable.sof
+ /fpga/tests/test_dram/test_dram.qpf
+ /fpga/tests/test_dram/test_dram.qws
+ /fpga/tests/test_ledblink
+ /fpga/tests/test_ledblink/dram.v
+ /fpga/tests/test_ledblink/main.qsf
+ /fpga/tests/test_ledblink/main.v
+ /fpga/tests/test_ledblink/stable.sof
+ /fpga/tests/test_ledblink/test_ledblink.qpf
+ /fpga/tests/test_ledblink/test_ledblink.qws
+ /fpga/_ver0.00
+ /fpga/_ver0.00/common
+ /fpga/_ver0.00/common/resetter.v
+ /fpga/_ver0.00/common/spi2.v
+ /fpga/_ver0.00/dram
+ /fpga/_ver0.00/dram/arbiter.png
+ /fpga/_ver0.00/dram/arbiter.v
+ /fpga/_ver0.00/dram/cycles.txt
+ /fpga/_ver0.00/dram/dram.v
+ /fpga/_ver0.00/dram/test_compile
+ /fpga/_ver0.00/dram/test_compile/arbiter.cvwf
+ /fpga/_ver0.00/dram/test_compile/arbiter.qsf
+ /fpga/_ver0.00/dram/test_compile/arbiter_description.txt
+ /fpga/_ver0.00/dram/test_compile/test_compile.qpf
+ /fpga/_ver0.00/dram/test_compile/test_compile.qws
+ /fpga/_ver0.00/dram/test_compile/test_compile.v
+ /fpga/_ver0.00/dram_access.txt
+ /fpga/_ver0.00/include
+ /fpga/_ver0.00/include/tune.v
+ /fpga/_ver0.00/keyboard
+ /fpga/_ver0.00/main.v
+ /fpga/_ver0.00/readme.txt
+ /fpga/_ver0.00/sim_cdv
+ /fpga/_ver0.00/sim_cdv/a
+ /fpga/_ver0.00/sim_cdv/b
+ /fpga/_ver0.00/sim_cdv/sim_cdv.cr.mti
+ /fpga/_ver0.00/sim_cdv/sim_cdv.mpf
+ /fpga/_ver0.00/sim_cdv/tb.v
+ /fpga/_ver0.00/sim_models
+ /fpga/_ver0.00/sim_models/drammem.v
+ /fpga/_ver0.00/sim_models/ram.v
+ /fpga/_ver0.00/sim_models/rom.v
+ /fpga/_ver0.00/sim_models/T80.vhd
+ /fpga/_ver0.00/sim_models/T80a.vhd
+ /fpga/_ver0.00/sim_models/T80_ALU.vhd
+ /fpga/_ver0.00/sim_models/T80_MCode.vhd
+ /fpga/_ver0.00/sim_models/T80_Pack.vhd
+ /fpga/_ver0.00/sim_models/T80_Reg.vhd
+ /fpga/_ver0.00/slave
+ /fpga/_ver0.00/slave/slavespi.v
+ /fpga/_ver0.00/slave/zx.h
+ /fpga/_ver0.00/slave/zx_keys.txt
+ /fpga/_ver0.00/vg93
+ /fpga/_ver0.00/vg93/vg93.v
+ /fpga/_ver0.00/video
+ /fpga/_ver0.00/video/addresses.txt
+ /fpga/_ver0.00/video/fetch.v
+ /fpga/_ver0.00/video/synch.v
+ /fpga/_ver0.00/video/syncv.v
+ /fpga/_ver0.00/video/videoout.v
+ /fpga/_ver0.00/video_modes.txt
+ /fpga/_ver0.00/z80
+ /fpga/_ver0.00/z80/zbus.v
+ /fpga/_ver0.00/z80/zclock.v
+ /fpga/_ver0.00/z80/zint.v
+ /fpga/_ver0.00/z80/zmem.v
+ /fpga/_ver0.00/z80/zports.v
+ /fpga/_ver0.01
+ /fpga/_ver0.01/common
+ /fpga/_ver0.01/common/resetter.v
+ /fpga/_ver0.01/common/spi2.v
+ /fpga/_ver0.01/dram
+ /fpga/_ver0.01/dram/arbiter.png
+ /fpga/_ver0.01/dram/arbiter.v
+ /fpga/_ver0.01/dram/cycles.txt
+ /fpga/_ver0.01/dram/dram.v
+ /fpga/_ver0.01/dram/test_compile.zip
+ /fpga/_ver0.01/include
+ /fpga/_ver0.01/include/tune.v
+ /fpga/_ver0.01/quartus
+ /fpga/_ver0.01/quartus/pentevo_0_01.qpf
+ /fpga/_ver0.01/quartus/pentevo_0_01.qws
+ /fpga/_ver0.01/quartus/top.qsf
+ /fpga/_ver0.01/quartus/top.rbf
+ /fpga/_ver0.01/quartus/top.sof
+ /fpga/_ver0.01/README
+ /fpga/_ver0.01/sim_cdv
+ /fpga/_ver0.01/sim_cdv/a
+ /fpga/_ver0.01/sim_cdv/b
+ /fpga/_ver0.01/sim_cdv/tb.v
+ /fpga/_ver0.01/sim_models
+ /fpga/_ver0.01/sim_models/drammem.v
+ /fpga/_ver0.01/sim_models/ram.v
+ /fpga/_ver0.01/sim_models/rom.v
+ /fpga/_ver0.01/sim_models/T80.vhd
+ /fpga/_ver0.01/sim_models/T80a.vhd
+ /fpga/_ver0.01/sim_models/T80_ALU.vhd
+ /fpga/_ver0.01/sim_models/T80_MCode.vhd
+ /fpga/_ver0.01/sim_models/T80_Pack.vhd
+ /fpga/_ver0.01/sim_models/T80_Reg.vhd
+ /fpga/_ver0.01/slave
+ /fpga/_ver0.01/slave/slavespi.v
+ /fpga/_ver0.01/slave/zx.h
+ /fpga/_ver0.01/slave/zx_keys.txt
+ /fpga/_ver0.01/texts
+ /fpga/_ver0.01/texts/dram_access.txt
+ /fpga/_ver0.01/texts/readme.txt
+ /fpga/_ver0.01/texts/video_modes.txt
+ /fpga/_ver0.01/top.v
+ /fpga/_ver0.01/vg93
+ /fpga/_ver0.01/vg93/vg93.v
+ /fpga/_ver0.01/video
+ /fpga/_ver0.01/video/addresses.txt
+ /fpga/_ver0.01/video/fetch.v
+ /fpga/_ver0.01/video/synch.v
+ /fpga/_ver0.01/video/syncv.v
+ /fpga/_ver0.01/video/videoout.v
+ /fpga/_ver0.01/z80
+ /fpga/_ver0.01/z80/zbus.v
+ /fpga/_ver0.01/z80/zclock.v
+ /fpga/_ver0.01/z80/zint.v
+ /fpga/_ver0.01/z80/zmem.v
+ /fpga/_ver0.01/z80/zports.v