<?xml version="1.0" encoding="utf-8"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>pentevo &#x2013; /fpga/sdload/trunk/z80/clocking/DS0007.BMP</title><description>WebSVN RSS feed &#x2013; pentevo</description><lastBuildDate>Mon, 20 Apr 2026 06:52:42 +0300</lastBuildDate><generator>WebSVN 2.8.5-DEV</generator><language>en</language><link>http://svn.zxevo.ru/log.php?repname=pentevo&amp;path=%2Ffpga%2Fsdload%2Ftrunk%2Fz80%2Fclocking%2FDS0007.BMP&amp;max=20&amp;</link><atom:link href="http://svn.zxevo.ru/rss.php?path=%2Ffpga%2Fsdload%2Ftrunk%2Fz80%2Fclocking%2FDS0007.BMP&amp;repname=pentevo" rel="self" type="application/rss+xml" />
<item><pubDate>Sun, 29 Nov 2020 18:39:06 +0300</pubDate><dc:creator>lvd</dc:creator><title>Rev 918 – pentevo: initial sdload config (copied from baseconf)</title><description>&lt;div&gt;&lt;strong&gt;lvd – 1 file(s) modified&lt;/strong&gt;&lt;br/&gt;pentevo: initial sdload config (copied from baseconf)&lt;/div&gt;+ /fpga/sdload &lt;i&gt;(copied from /fpga/baseconf@917)&lt;/i&gt;&lt;br /&gt;</description><link>http://svn.zxevo.ru/revision.php?repname=pentevo&amp;path=%2Ffpga%2Fsdload%2Ftrunk%2Fz80%2Fclocking%2FDS0007.BMP&amp;rev=918</link><guid>http://svn.zxevo.ru/revision.php?repname=pentevo&amp;path=%2Ffpga%2Fsdload%2Ftrunk%2Fz80%2Fclocking%2FDS0007.BMP&amp;rev=918</guid></item>
<item><pubDate>Sat, 14 Nov 2020 20:24:33 +0300</pubDate><dc:creator>lvd</dc:creator><title>Rev 896 – pentevo: changing repo structure</title><description>&lt;div&gt;&lt;strong&gt;lvd – 44 file(s) modified&lt;/strong&gt;&lt;br/&gt;pentevo: changing repo structure&lt;/div&gt;+ /cfgs&lt;br /&gt;+ /cfgs/standalone_baseconf&lt;br /&gt;+ /cfgs/standalone_baseconf/trunk&lt;br /&gt;+ /cfgs/standalone_baseconf/trunk/README&lt;br /&gt;+ /fpga/baseconf&lt;br /&gt;+ /fpga/baseconf/trunk&lt;br /&gt;+ /fpga/baseconf/trunk/common &lt;i&gt;(copied from /fpga/current/common@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/dram &lt;i&gt;(copied from /fpga/current/dram@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/GPL &lt;i&gt;(copied from /fpga/current/GPL@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/include &lt;i&gt;(copied from /fpga/current/include@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/mem &lt;i&gt;(copied from /fpga/current/mem@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/quartus &lt;i&gt;(copied from /fpga/current/quartus@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/sim_models &lt;i&gt;(copied from /fpga/current/sim_models@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/sim_top &lt;i&gt;(copied from /fpga/current/sim_top@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/slave &lt;i&gt;(copied from /fpga/current/slave@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/sound &lt;i&gt;(copied from /fpga/current/sound@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/spihub &lt;i&gt;(copied from /fpga/current/spihub@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/texts &lt;i&gt;(copied from /fpga/current/texts@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/TODO &lt;i&gt;(copied from /fpga/current/TODO@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/top.v &lt;i&gt;(copied from /fpga/current/top.v@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/ULAPLUS &lt;i&gt;(copied from /fpga/current/ULAPLUS@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/vg93 &lt;i&gt;(copied from /fpga/current/vg93@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/video &lt;i&gt;(copied from /fpga/current/video@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/baseconf/trunk/z80 &lt;i&gt;(copied from /fpga/current/z80@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk&lt;br /&gt;+ /fpga/trdemu/trunk/common &lt;i&gt;(copied from /fpga/trdemu/common@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/dram &lt;i&gt;(copied from /fpga/trdemu/dram@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/include &lt;i&gt;(copied from /fpga/trdemu/include@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/mem &lt;i&gt;(copied from /fpga/trdemu/mem@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/quartus &lt;i&gt;(copied from /fpga/trdemu/quartus@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/sim_models &lt;i&gt;(copied from /fpga/trdemu/sim_models@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/sim_top &lt;i&gt;(copied from /fpga/trdemu/sim_top@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/slave &lt;i&gt;(copied from /fpga/trdemu/slave@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/sound &lt;i&gt;(copied from /fpga/trdemu/sound@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/spihub &lt;i&gt;(copied from /fpga/trdemu/spihub@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/texts &lt;i&gt;(copied from /fpga/trdemu/texts@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/TODO &lt;i&gt;(copied from /fpga/trdemu/TODO@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/top.v &lt;i&gt;(copied from /fpga/trdemu/top.v@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/ULAPLUS &lt;i&gt;(copied from /fpga/trdemu/ULAPLUS@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/vg93 &lt;i&gt;(copied from /fpga/trdemu/vg93@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/video &lt;i&gt;(copied from /fpga/trdemu/video@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/z80 &lt;i&gt;(copied from /fpga/trdemu/z80@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/zxevo_base_configuration.odt &lt;i&gt;(copied from /fpga/trdemu/zxevo_base_configuration.odt@895)&lt;/i&gt;&lt;br /&gt;+ /fpga/trdemu/trunk/zxevo_fw.bin &lt;i&gt;(copied from /fpga/trdemu/zxevo_fw.bin@895)&lt;/i&gt;&lt;br /&gt;</description><link>http://svn.zxevo.ru/revision.php?repname=pentevo&amp;path=%2Ffpga%2Fsdload%2Ftrunk%2Fz80%2Fclocking%2FDS0007.BMP&amp;rev=896</link><guid>http://svn.zxevo.ru/revision.php?repname=pentevo&amp;path=%2Ffpga%2Fsdload%2Ftrunk%2Fz80%2Fclocking%2FDS0007.BMP&amp;rev=896</guid></item>
<item><pubDate>Sat, 05 Dec 2009 12:25:39 +0300</pubDate><dc:creator>lvd</dc:creator><title>Rev 34 – tb somehow works, added timing info (oscillospoce screenshots) to z80/clocking</title><description>&lt;div&gt;&lt;strong&gt;lvd – 30 file(s) modified&lt;/strong&gt;&lt;br/&gt;tb somehow works, added timing info (oscillospoce screenshots) to z80/clocking&lt;/div&gt;~ /fpga/current/sim_top/tb_top.v&lt;br /&gt;~ /fpga/current/sim_top/vlog.opt&lt;br /&gt;~ /fpga/current/sim_top/wave.do&lt;br /&gt;+ /fpga/current/z80/clocking&lt;br /&gt;+ /fpga/current/z80/clocking/DS0000.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0001.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0002.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0003.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0004.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0005.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0006.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0007.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0008.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0009.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0010.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0011.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0012.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0013.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0014.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0015.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0016.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0017.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0018.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0019.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0020.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0021.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0022.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0023.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0024.BMP&lt;br /&gt;+ /fpga/current/z80/clocking/DS0025.BMP&lt;br /&gt;</description><link>http://svn.zxevo.ru/revision.php?repname=pentevo&amp;path=%2Ffpga%2Fsdload%2Ftrunk%2Fz80%2Fclocking%2FDS0007.BMP&amp;rev=34</link><guid>http://svn.zxevo.ru/revision.php?repname=pentevo&amp;path=%2Ffpga%2Fsdload%2Ftrunk%2Fz80%2Fclocking%2FDS0007.BMP&amp;rev=34</guid></item>
</channel></rss>