ngs – /cpld/cpld5_buf/sim/gate/

Rev 66 – cpld: fix by CHRV for no glitches

lvd — Mon, 17 Jan 2011 02:12:30 +0300

lvd – 4 file(s) modified
cpld: fix by CHRV for no glitches

~ /cpld/cpld5_buf/GS_cpld.pof
~ /cpld/cpld5_buf/GS_cpld.qsf
~ /cpld/cpld5_buf/sim/gate/GS_cpld.vo
~ /cpld/cpld5_buf/sim/gate/GS_cpld_v.sdo

Rev 60 – rebuilt both cpld5 and fpgaF with Q72, updated a little ...

lvd — Tue, 23 Nov 2010 12:13:09 +0300

lvd – 9 file(s) modified
rebuilt both cpld5 and fpgaF with Q72, updated a little NGS_prm

~ /cpld/cpld5_buf/GS_cpld.pof
~ /cpld/cpld5_buf/GS_cpld.qsf
~ /cpld/cpld5_buf/sim/gate/GS_cpld.vo
~ /cpld/cpld5_buf/sim/gate/GS_cpld_v.sdo
~ /docs/NGS_prm/NGS_prm.odt
x /docs/NGS_prm/NGS_prm2.odt
~ /fpga/fpgaF_dma2/quartus/main.qsf
~ /fpga/fpgaF_dma2/quartus/main.rbf
~ /fpga/fpgaF_dma2/quartus/main.sof

Rev 58 – cpld5_buf: recompiled with slow slew rate; added ramtests (fast and ...

lvd — Sat, 25 Sep 2010 12:15:49 +0400

lvd – 34 file(s) modified
cpld5_buf: recompiled with slow slew rate; added ramtests (fast and slow, slow for many freqs, fast for 24 only)

~ /cpld/cpld5_buf/GS_cpld.pof
~ /cpld/cpld5_buf/GS_cpld.qsf
~ /cpld/cpld5_buf/sim/gate/GS_cpld.vo
~ /cpld/cpld5_buf/sim/gate/GS_cpld_v.sdo
x /fpga/ramtest_revC
+ /fpga/ramtest_revC_fast
+ /fpga/ramtest_revC_fast/main.v
+ /fpga/ramtest_revC_fast/mem_tester
+ /fpga/ramtest_revC_fast/mem_tester/mem_tester.v
+ /fpga/ramtest_revC_fast/quartus
+ /fpga/ramtest_revC_fast/quartus/main.qpf
+ /fpga/ramtest_revC_fast/quartus/main.qsf
+ /fpga/ramtest_revC_fast/quartus/main.qws
+ /fpga/ramtest_revC_fast/quartus/main.rbf
+ /fpga/ramtest_revC_fast/quartus/main.sof
+ /fpga/ramtest_revC_fast/resetter
+ /fpga/ramtest_revC_fast/resetter/resetter.v
+ /fpga/ramtest_revC_fast/rnd_vec_gen
+ /fpga/ramtest_revC_fast/rnd_vec_gen/rnd_vec_gen.v
+ /fpga/ramtest_revC_fast/sim
+ /fpga/ramtest_revC_fast/sim/c
+ /fpga/ramtest_revC_fast/sim/d
+ /fpga/ramtest_revC_fast/sim/l
+ /fpga/ramtest_revC_fast/sim/s
+ /fpga/ramtest_revC_fast/sim/tb.v
+ /fpga/ramtest_revC_fast/sim/vlog.opt
+ /fpga/ramtest_revC_fast/sim/wave.do
+ /fpga/ramtest_revC_fast/sram_control
+ /fpga/ramtest_revC_fast/sram_control/sram_control.v
+ /fpga/ramtest_revC_slow (copied from /fpga/ramtest_revC@57)
+ /fpga/ramtest_revC_slow/quartus/10mhz.sof
+ /fpga/ramtest_revC_slow/quartus/12mhz.sof
+ /fpga/ramtest_revC_slow/quartus/20mhz.sof
+ /fpga/ramtest_revC_slow/quartus/24mhz.sof

Rev 49 – updated pinout of CPLD for current .sch

lvd — Mon, 26 Jul 2010 08:49:05 +0400

lvd – 4 file(s) modified
updated pinout of CPLD for current .sch

~ /cpld/cpld5_buf/GS_cpld.pof
~ /cpld/cpld5_buf/GS_cpld.qsf
~ /cpld/cpld5_buf/sim/gate/GS_cpld.vo
~ /cpld/cpld5_buf/sim/gate/GS_cpld_v.sdo

Rev 40 – pin assigment (equal sch)

chrv — Sat, 15 May 2010 13:07:59 +0400

chrv – 4 file(s) modified
pin assigment (equal sch)

~ /cpld/cpld5_buf/GS_cpld.pof
~ /cpld/cpld5_buf/GS_cpld.qsf
~ /cpld/cpld5_buf/sim/gate/GS_cpld.vo
~ /cpld/cpld5_buf/sim/gate/GS_cpld_v.sdo

Rev 30 – testbench for cpld_buf finished and works with rtl, todo: run ...

lvd — Mon, 19 Apr 2010 01:05:31 +0400

lvd – 5 file(s) modified
testbench for cpld_buf finished and works with rtl, todo: run testbench on gate-level

~ /cpld/cpld5_buf/GS_cpld.pof
~ /cpld/cpld5_buf/sim/gate/GS_cpld.vo
~ /cpld/cpld5_buf/sim/gate/GS_cpld_v.sdo
+ /cpld/cpld5_buf/sim/gate/max_atoms.v
~ /cpld/cpld5_buf/sim/tb.v

Rev 23 – Qua simulator suxx: using modelsim

lvd — Wed, 07 Apr 2010 23:58:41 +0400

lvd – 18 file(s) modified
Qua simulator suxx: using modelsim

+ /cpld/cpld5_buf/sim
+ /cpld/cpld5_buf/sim/c
+ /cpld/cpld5_buf/sim/c.bat
+ /cpld/cpld5_buf/sim/cg
+ /cpld/cpld5_buf/sim/cg.bat
+ /cpld/cpld5_buf/sim/clocker_sim.v
+ /cpld/cpld5_buf/sim/d
+ /cpld/cpld5_buf/sim/d.bat
+ /cpld/cpld5_buf/sim/gate
+ /cpld/cpld5_buf/sim/gate/GS_cpld.vo
+ /cpld/cpld5_buf/sim/gate/GS_cpld_v.sdo
+ /cpld/cpld5_buf/sim/l
+ /cpld/cpld5_buf/sim/l.bat
+ /cpld/cpld5_buf/sim/s
+ /cpld/cpld5_buf/sim/s.bat
+ /cpld/cpld5_buf/sim/tb.v
+ /cpld/cpld5_buf/sim/vlog.opt
+ /cpld/cpld5_buf/sim/wave.do