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Rev Age Author Path Log message Diff
156 2018-12-08 21:15:07 lvd /branches/revC_newports/cpld/rtl/tb/ branches/revC_newports: updated testbench which now works  
152 2018-12-05 16:43:25 lvd /branches/revC_newports/cpld/rtl/tb/ added branch branches/revC_newports with updated port structure for the ease of controlling w5300 via ports. not documented nor testbenched yet  
121 2018-02-12 01:18:17 lvd /branches/revC_newports/cpld/rtl/tb/ zxiznet: fixing for 14mhz: sl811 seems to work also, but fix overall is BAAAD. Will do lOOOng tests though  
84 2017-11-12 21:01:52 lvd /branches/revC_newports/cpld/rtl/tb/ zxiznet: newclk branch merged back to trunk: tested verilog  
76 2017-09-28 15:00:24 lvd /branches/revC_newports/cpld/rtl/tb/ zxiznet: TODO updated  
75 2017-09-26 17:40:44 lvd /branches/revC_newports/cpld/rtl/tb/ zxiznet: revC TODO added  
72 2017-09-19 13:30:36 lvd /branches/revC_newports/cpld/rtl/tb/ trunk: added clocked filter, patched testbench to pass tests with that filter  
71 2017-09-19 11:08:25 lvd /branches/revC_newports/cpld/rtl/tb/ trunk: fixed obvious bug in tests  
60 2013-10-03 10:12:41 lvd /branches/revC_newports/cpld/rtl/tb/ zxiznet: dir structure  
59 2013-10-03 10:09:34 lvd /branches/revC_newports/cpld/rtl/tb/ zxiznet: trying to fix glitches...  
35 2012-11-12 16:23:58 lvd /branches/revC_newports/cpld/rtl/tb/ gate-level passed  
34 2012-11-12 13:02:38 lvd /branches/revC_newports/cpld/rtl/tb/ small update tp gate-level build script  
33 2012-11-12 10:15:27 lvd /branches/revC_newports/cpld/rtl/tb/ trying to add gate-level  
32 2012-11-11 22:20:16 lvd /branches/revC_newports/cpld/rtl/tb/ added port access to w5300 (HDL code, testbench, specs all updated)  
31 2012-11-11 20:04:06 lvd /branches/revC_newports/cpld/rtl/tb/ finished testbench for current cpld code  
30 2012-11-11 16:03:39 lvd /branches/revC_newports/cpld/rtl/tb/ basic tests OK  
29 2012-11-11 10:20:58 lvd /branches/revC_newports/cpld/rtl/tb/ started writing testbench tests  
28 2012-11-07 06:09:01 lvd /branches/revC_newports/cpld/rtl/tb/ updated tb a little  
23 2012-10-31 11:25:00 lvd /branches/revC_newports/cpld/rtl/tb/ updated verilog code according to new specs  
16 2012-10-22 01:35:08 lvd /branches/revC_newports/cpld/rtl/tb/ updated testbench a little  

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