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Rev Age Author Path Log message Diff
83 2017-11-12 19:28:10 lvd /branches/newclk/cpld/rtl/ zxiznet: newclk: sim debugged  
82 2017-11-12 01:47:02 lvd /branches/newclk/cpld/rtl/ zxiznet: newclk: sim debugging  
81 2017-11-01 17:06:25 lvd /branches/newclk/cpld/rtl/ zxiznet: newclk: changing design  
80 2017-10-31 16:00:04 lvd /branches/newclk/cpld/rtl/ zxiznet: newclk: changing design  
79 2017-10-31 15:20:04 lvd /branches/newclk/cpld/rtl/ zxiznet: making branch for new clocking/filtering system  
78 2017-10-30 15:05:39 lvd /branches/newclk/cpld/rtl/ zxiznet: comments added  
76 2017-09-28 15:00:24 lvd /branches/newclk/cpld/rtl/ zxiznet: TODO updated  
75 2017-09-26 17:40:44 lvd /branches/newclk/cpld/rtl/ zxiznet: revC TODO added  
72 2017-09-19 13:30:36 lvd /branches/newclk/cpld/rtl/ trunk: added clocked filter, patched testbench to pass tests with that filter  
71 2017-09-19 11:08:25 lvd /branches/newclk/cpld/rtl/ trunk: fixed obvious bug in tests  
70 2017-09-18 00:15:06 dimkam /branches/newclk/cpld/rtl/ patch  
62 2013-10-03 10:16:04 lvd /branches/newclk/cpld/rtl/ zxiznet: trunk now is without bugfixes, all bugfixes is in branch/ dir  
60 2013-10-03 10:12:41 lvd /branches/newclk/cpld/rtl/ zxiznet: dir structure  
59 2013-10-03 10:09:34 lvd /branches/newclk/cpld/rtl/ zxiznet: trying to fix glitches...  
58 2013-09-22 20:18:15 lvd /branches/newclk/cpld/rtl/ zxiznet: partially removed glitch problem by adding filters to cpld design, more glitches to kill  
48 2013-04-04 00:17:48 lvd /branches/newclk/cpld/rtl/ zxiznet: fixed reset behavior of ms bit: now it's reset only on zx reset, not on sl811 reset. doc fixed, new .pof built  
35 2012-11-12 16:23:58 lvd /branches/newclk/cpld/rtl/ gate-level passed  
34 2012-11-12 13:02:38 lvd /branches/newclk/cpld/rtl/ small update tp gate-level build script  
33 2012-11-12 10:15:27 lvd /branches/newclk/cpld/rtl/ trying to add gate-level  
32 2012-11-11 22:20:16 lvd /branches/newclk/cpld/rtl/ added port access to w5300 (HDL code, testbench, specs all updated)  

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