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66 2014-10-26 19:05:30 lvd /branches/clkfix/pdfs/irlml6402.pdf Spawning new branch "clkfix" to try to fix glitches by adding extra clock to FPGA  
25 2012-11-03 23:41:28 lvd /branches/clkfix/pdfs/irlml6402.pdf added USB master/slave switching circuits, changed HDL to buffer databus, removed BRDY read from specs