Top secrets sources NedoPC zxusbnet

Rev

Show changed files | Directory listing | RSS feed

Filtering Options

Rev Age Author Path Log message Diff
91 2017-12-12 23:36:00 lvd /branches/ zxiznet: routing revC  
90 2017-12-07 19:59:44 lvd /branches/ zxiznet: unpoured (yet old) pcb  
89 2017-12-07 02:50:32 lvd /branches/ zxiznet: last fixes to .sch  
88 2017-12-07 02:36:48 lvd /branches/ zxiznet: added power selection for oscillators  
87 2017-11-14 00:50:46 lvd /branches/ zxiznet: changing schematics for revC  
86 2017-11-13 01:06:24 lvd /branches/ zxiznet: changing schematics for revC  
85 2017-11-12 21:02:55 lvd /branches/ zxiznet: new branch for revC schematics (branches/revC)  
83 2017-11-12 19:28:10 lvd /branches/ zxiznet: newclk: sim debugged  
82 2017-11-12 01:47:02 lvd /branches/ zxiznet: newclk: sim debugging  
81 2017-11-01 17:06:25 lvd /branches/ zxiznet: newclk: changing design  
80 2017-10-31 16:00:04 lvd /branches/ zxiznet: newclk: changing design  
79 2017-10-31 15:20:04 lvd /branches/ zxiznet: making branch for new clocking/filtering system  
69 2017-09-17 23:28:39 lvd /branches/ test commit  
68 2014-10-26 21:51:58 lvd /branches/ zxiznet: clkgen branch: successfull compilation of moved pinout  
67 2014-10-26 19:18:34 lvd /branches/ clkfix: removing sl811_rst_n pin  
66 2014-10-26 19:05:30 lvd /branches/ Spawning new branch "clkfix" to try to fix glitches by adding extra clock to FPGA  
65 2013-11-10 00:38:45 lvd /branches/ zxiznet: glitch_fixes branch: returned LCELLS parameter to 1  
63 2013-10-05 21:39:42 lvd /branches/ zxiznet: changed to epm3128, added variable lcell delay, using delayed rd,wr,iorq everywhere, not functioning at all with LCELLS=7, still USB glitches with LCELLS=6  
61 2013-10-03 10:13:46 lvd /branches/ branching glitch fixes code  
1 2012-10-03 10:29:21 lvd /branches/ added some old libs and PCBs from other projects  

←Prev12Next→

Show All