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Rev Age Author Path Log message Diff
99 2013-05-20 02:24:50 lvd /fpga/current/ports/ports.v started TB for sd/mp3 dma  
94 2013-05-10 23:43:19 lvd /fpga/current/ports/ports.v added 4 independent paging ports, written test for it, compiled design  
88 2013-05-06 12:55:54 lvd /fpga/current/ports/ports.v fixed typos in added functionality, not tested yet  
87 2013-05-06 12:48:32 lvd /fpga/current/ports/ports.v started adding interrupt controller and timer  
64 2010-12-26 13:58:15 lvd /fpga/current/ports/ports.v trying to fix ngs rev C...  
62 2010-11-25 10:46:05 lvd /fpga/current/ports/ports.v fpga/current: added 4mb addressing  
61 2010-11-25 00:20:25 lvd /fpga/current/ports/ports.v started refucktoring code and adding new features to FPGA.
now fpga/current is head of development (not checked yet)		  
6 2009-12-06 20:08:08 lvd /fpga/current/ports/ports.v port GSCFG0, bit 7 - inversion of samples  
2 2009-11-21 21:52:10 lvd /fpga/current/ports/ports.v Just files, which all was forgotten in initial commit