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Rev	Age	Author	Path	Log message	Diff	Changes
565	2023-12-17 00:10:45	lvd	/turbofmpro/trunk/cpld/rtl/tb/	tfmpro: fixed testbench for new mode[1:0] signal		/turbofmpro/trunk/cpld/rtl/tb/tb.v /turbofmpro/trunk/cpld/rtl/tb/wave.do
116	2017-12-03 23:23:15	lvd	/turbofmpro/trunk/cpld/rtl/	turbofmpro: full test seems to pass		/turbofmpro/trunk/cpld/rtl/cfg.v /turbofmpro/trunk/cpld/rtl/tb/c /turbofmpro/trunk/cpld/rtl/tb/tb.v /turbofmpro/trunk/cpld/rtl/tb/wave.do
115	2017-12-03 02:24:51	chrv	/turbofmpro/trunk/cpld/rtl/	turbofmpro: initial test passes		/turbofmpro/trunk/cpld/rtl/tb/wave.do /turbofmpro/trunk/cpld/rtl/bus.v /turbofmpro/trunk/cpld/rtl/cfg.v /turbofmpro/trunk/cpld/rtl/tb/tb.v
104	2017-11-15 14:56:59	lvd	/turbofmpro/trunk/cpld/	turbofmpro: started new RTL		/turbofmpro/trunk/cpld/rtl /turbofmpro/trunk/cpld/rtl/clocks.v /turbofmpro/trunk/cpld/rtl/tb /turbofmpro/trunk/cpld/rtl/tb/c /turbofmpro/trunk/cpld/rtl/tb/cg /turbofmpro/trunk/cpld/rtl/tb/d /turbofmpro/trunk/cpld/rtl/tb/max_atoms.v /turbofmpro/trunk/cpld/rtl/tb/s /turbofmpro/trunk/cpld/rtl/tb/tb.v /turbofmpro/trunk/cpld/rtl/top.v /turbofmpro/trunk/cpld/simulation/cg /turbofmpro/trunk/cpld/simulation/tb.v
83	2017-01-19 11:03:52	lvd	/turbofmpro/trunk/cpld/	turbofmpro: updated testbench, simplified saa clock generator		/turbofmpro/trunk/cpld/TurboFMpro.v /turbofmpro/trunk/cpld/simulation/tb.v /turbofmpro/trunk/cpld/simulation/wave.do
82	2017-01-11 17:45:59	lvd	/turbofmpro/trunk/cpld/	CPLD: started testbench, conf reg access fixed		/turbofmpro/trunk/cpld/simulation /turbofmpro/trunk/cpld/simulation/c /turbofmpro/trunk/cpld/simulation/cg /turbofmpro/trunk/cpld/simulation/d /turbofmpro/trunk/cpld/simulation/max_atoms.v /turbofmpro/trunk/cpld/simulation/s /turbofmpro/trunk/cpld/simulation/tb.v /turbofmpro/trunk/cpld/simulation/wave.do /turbofmpro/trunk/cpld/TurboFMpro.pin /turbofmpro/trunk/cpld/TurboFMpro.qsf /turbofmpro/trunk/cpld/TurboFMpro.v