Subversion Repositories pentevo

Rev

Hide changed files | Details | Compare with Previous | Blame | RSS feed

Filtering Options

Rev Age Author Path Log message Diff Changes
918 2020-11-29 18:39:06 lvd /fpga/sdload/ pentevo: initial sdload config (copied from baseconf)  
/fpga/sdload
896 2020-11-14 20:24:33 lvd / pentevo: changing repo structure  
/cfgs
/cfgs/standalone_baseconf
/cfgs/standalone_baseconf/trunk
/cfgs/standalone_baseconf/trunk/README
/fpga/baseconf
/fpga/baseconf/trunk
/fpga/baseconf/trunk/GPL
/fpga/baseconf/trunk/TODO
/fpga/baseconf/trunk/ULAPLUS
/fpga/baseconf/trunk/common
/fpga/baseconf/trunk/dram
/fpga/baseconf/trunk/include
/fpga/baseconf/trunk/mem
/fpga/baseconf/trunk/quartus
/fpga/baseconf/trunk/sim_models
/fpga/baseconf/trunk/sim_top
/fpga/baseconf/trunk/slave
/fpga/baseconf/trunk/sound
/fpga/baseconf/trunk/spihub
/fpga/baseconf/trunk/texts
/fpga/baseconf/trunk/top.v
/fpga/baseconf/trunk/vg93
/fpga/baseconf/trunk/video
/fpga/baseconf/trunk/z80
/fpga/trdemu/trunk
/fpga/trdemu/trunk/TODO
/fpga/trdemu/trunk/ULAPLUS
/fpga/trdemu/trunk/common
/fpga/trdemu/trunk/dram
/fpga/trdemu/trunk/include
/fpga/trdemu/trunk/mem
/fpga/trdemu/trunk/quartus
/fpga/trdemu/trunk/sim_models
/fpga/trdemu/trunk/sim_top
/fpga/trdemu/trunk/slave
/fpga/trdemu/trunk/sound
/fpga/trdemu/trunk/spihub
/fpga/trdemu/trunk/texts
/fpga/trdemu/trunk/top.v
/fpga/trdemu/trunk/vg93
/fpga/trdemu/trunk/video
/fpga/trdemu/trunk/z80
/fpga/trdemu/trunk/zxevo_base_configuration.odt
/fpga/trdemu/trunk/zxevo_fw.bin
34 2009-12-05 12:25:39 lvd /fpga/current/ tb somehow works, added timing info (oscillospoce screenshots) to z80/clocking  
/fpga/current/z80/clocking
/fpga/current/z80/clocking/DS0000.BMP
/fpga/current/z80/clocking/DS0001.BMP
/fpga/current/z80/clocking/DS0002.BMP
/fpga/current/z80/clocking/DS0003.BMP
/fpga/current/z80/clocking/DS0004.BMP
/fpga/current/z80/clocking/DS0005.BMP
/fpga/current/z80/clocking/DS0006.BMP
/fpga/current/z80/clocking/DS0007.BMP
/fpga/current/z80/clocking/DS0008.BMP
/fpga/current/z80/clocking/DS0009.BMP
/fpga/current/z80/clocking/DS0010.BMP
/fpga/current/z80/clocking/DS0011.BMP
/fpga/current/z80/clocking/DS0012.BMP
/fpga/current/z80/clocking/DS0013.BMP
/fpga/current/z80/clocking/DS0014.BMP
/fpga/current/z80/clocking/DS0015.BMP
/fpga/current/z80/clocking/DS0016.BMP
/fpga/current/z80/clocking/DS0017.BMP
/fpga/current/z80/clocking/DS0018.BMP
/fpga/current/z80/clocking/DS0019.BMP
/fpga/current/z80/clocking/DS0020.BMP
/fpga/current/z80/clocking/DS0021.BMP
/fpga/current/z80/clocking/DS0022.BMP
/fpga/current/z80/clocking/DS0023.BMP
/fpga/current/z80/clocking/DS0024.BMP
/fpga/current/z80/clocking/DS0025.BMP
/fpga/current/sim_top/tb_top.v
/fpga/current/sim_top/vlog.opt
/fpga/current/sim_top/wave.do