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?pathlinks? – Rev 668

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Rev	Age	Author	Path	Log message	Diff	Changes
668	2014-07-29 10:01:19	lvd	/	pentevo: added ulaplus, fixed NMI to RAM (DimkaM request)		/fpga/current/GPL /fpga/current/ULAPLUS /fpga/current/FIXME /fpga/current/README /fpga/current/TODO /fpga/current/vga /avr/current/default/core.hex /avr/current/default/zxevo_fw.bin /fpga/current/common/resetter.v /fpga/current/dram/arbiter.v /fpga/current/dram/dram.v /fpga/current/include/tune.v /fpga/current/mem/atm_pager.v /fpga/current/quartus/top.rbf /fpga/current/quartus/top.sof /fpga/current/slave/slavespi.v /fpga/current/sound/sound.v /fpga/current/spihub/spi2.v /fpga/current/spihub/spihub.v /fpga/current/top.v /fpga/current/vg93/fapch_counter.v /fpga/current/vg93/fapch_zek.v /fpga/current/vg93/vg93.v /fpga/current/video/video_addrgen.v /fpga/current/video/video_fetch.v /fpga/current/video/video_modedecode.v /fpga/current/video/video_outmux.v /fpga/current/video/video_palframe.v /fpga/current/video/video_render.v /fpga/current/video/video_sync_h.v /fpga/current/video/video_sync_v.v /fpga/current/video/video_top.v /fpga/current/video/video_vga_double.v /fpga/current/video/video_vga_sync_h.v /fpga/current/z80/zbreak.v /fpga/current/z80/zbus.v /fpga/current/z80/zclock.v /fpga/current/z80/zdos.v /fpga/current/z80/zint.v /fpga/current/z80/zkbdmus.v /fpga/current/z80/zmem.v /fpga/current/z80/znmi.v /fpga/current/z80/zports.v /fpga/current/z80/zwait.v
492	2011-10-05 22:49:43	lvd	/	modularized VG93 dpll design, compiled with zek one, avr firmware rebuilt		/fpga/current/vg93/fapch_counter.v /fpga/current/vg93/fapch_zek.v /avr/current/default/core.hex /avr/current/default/zxevo_fw.bin /fpga/current/quartus/top.qsf /fpga/current/quartus/top.rbf /fpga/current/quartus/top.sof /fpga/current/vg93/vg93.v
484	2011-09-27 21:55:46	chrv	/fpga/current/vg93/	Update PLL by Zek		/fpga/current/vg93/vg93.v
482	2011-09-14 21:44:12	chrv	/fpga/current/vg93/	fix pll (rdat_n)		/fpga/current/vg93/vg93.v
481	2011-09-12 22:47:29	chrv	/	add VG93 PLL by ZEK		/docs/revC/zxevo_user_manual_eng.odt /fpga/current/vg93/vg93.v
30	2009-12-03 00:09:55	lvd	/fpga/current/	complete testbench. does not work.		/fpga/current/dram/arbiter.v /fpga/current/dram/dram.v /fpga/current/include/tune.v /fpga/current/quartus/pentevo_0_01.qws /fpga/current/sim_cdv/tb.v /fpga/current/sim_models/ram.v /fpga/current/sim_models/rom.v /fpga/current/slave/slavespi.v /fpga/current/top.v /fpga/current/vg93/vg93.v /fpga/current/video/fetch.v /fpga/current/video/synch.v /fpga/current/video/syncv.v /fpga/current/video/videoout.v /fpga/current/z80/zbus.v /fpga/current/z80/zclock.v /fpga/current/z80/zint.v /fpga/current/z80/zmem.v /fpga/current/z80/zports.v
4	2009-11-21 21:06:56	lvd	/	initial commit of FPGA files		/fpga /fpga/_ver0.00 /fpga/_ver0.00/common /fpga/_ver0.00/common/resetter.v /fpga/_ver0.00/common/spi2.v /fpga/_ver0.00/dram /fpga/_ver0.00/dram/arbiter.png /fpga/_ver0.00/dram/arbiter.v /fpga/_ver0.00/dram/cycles.txt /fpga/_ver0.00/dram/dram.v /fpga/_ver0.00/dram/test_compile /fpga/_ver0.00/dram/test_compile/arbiter.cvwf /fpga/_ver0.00/dram/test_compile/arbiter.qsf /fpga/_ver0.00/dram/test_compile/arbiter_description.txt /fpga/_ver0.00/dram/test_compile/test_compile.qpf /fpga/_ver0.00/dram/test_compile/test_compile.qws /fpga/_ver0.00/dram/test_compile/test_compile.v /fpga/_ver0.00/dram_access.txt /fpga/_ver0.00/include /fpga/_ver0.00/include/tune.v /fpga/_ver0.00/keyboard /fpga/_ver0.00/main.v /fpga/_ver0.00/readme.txt /fpga/_ver0.00/sim_cdv /fpga/_ver0.00/sim_cdv/a /fpga/_ver0.00/sim_cdv/b /fpga/_ver0.00/sim_cdv/sim_cdv.cr.mti /fpga/_ver0.00/sim_cdv/sim_cdv.mpf /fpga/_ver0.00/sim_cdv/tb.v /fpga/_ver0.00/sim_models /fpga/_ver0.00/sim_models/T80.vhd /fpga/_ver0.00/sim_models/T80_ALU.vhd /fpga/_ver0.00/sim_models/T80_MCode.vhd /fpga/_ver0.00/sim_models/T80_Pack.vhd /fpga/_ver0.00/sim_models/T80_Reg.vhd /fpga/_ver0.00/sim_models/T80a.vhd /fpga/_ver0.00/sim_models/drammem.v /fpga/_ver0.00/sim_models/ram.v /fpga/_ver0.00/sim_models/rom.v /fpga/_ver0.00/slave /fpga/_ver0.00/slave/slavespi.v /fpga/_ver0.00/slave/zx.h /fpga/_ver0.00/slave/zx_keys.txt /fpga/_ver0.00/vg93 /fpga/_ver0.00/vg93/vg93.v /fpga/_ver0.00/video /fpga/_ver0.00/video/addresses.txt /fpga/_ver0.00/video/fetch.v /fpga/_ver0.00/video/synch.v /fpga/_ver0.00/video/syncv.v /fpga/_ver0.00/video/videoout.v /fpga/_ver0.00/video_modes.txt /fpga/_ver0.00/z80 /fpga/_ver0.00/z80/zbus.v /fpga/_ver0.00/z80/zclock.v /fpga/_ver0.00/z80/zint.v /fpga/_ver0.00/z80/zmem.v /fpga/_ver0.00/z80/zports.v /fpga/_ver0.01 /fpga/_ver0.01/README /fpga/_ver0.01/common /fpga/_ver0.01/common/resetter.v /fpga/_ver0.01/common/spi2.v /fpga/_ver0.01/dram /fpga/_ver0.01/dram/arbiter.png /fpga/_ver0.01/dram/arbiter.v /fpga/_ver0.01/dram/cycles.txt /fpga/_ver0.01/dram/dram.v /fpga/_ver0.01/dram/test_compile.zip /fpga/_ver0.01/include /fpga/_ver0.01/include/tune.v /fpga/_ver0.01/quartus /fpga/_ver0.01/quartus/pentevo_0_01.qpf /fpga/_ver0.01/quartus/pentevo_0_01.qws /fpga/_ver0.01/quartus/top.qsf /fpga/_ver0.01/quartus/top.rbf /fpga/_ver0.01/quartus/top.sof /fpga/_ver0.01/sim_cdv /fpga/_ver0.01/sim_cdv/a /fpga/_ver0.01/sim_cdv/b /fpga/_ver0.01/sim_cdv/tb.v /fpga/_ver0.01/sim_models /fpga/_ver0.01/sim_models/T80.vhd /fpga/_ver0.01/sim_models/T80_ALU.vhd /fpga/_ver0.01/sim_models/T80_MCode.vhd /fpga/_ver0.01/sim_models/T80_Pack.vhd /fpga/_ver0.01/sim_models/T80_Reg.vhd /fpga/_ver0.01/sim_models/T80a.vhd /fpga/_ver0.01/sim_models/drammem.v /fpga/_ver0.01/sim_models/ram.v /fpga/_ver0.01/sim_models/rom.v /fpga/_ver0.01/slave /fpga/_ver0.01/slave/slavespi.v /fpga/_ver0.01/slave/zx.h /fpga/_ver0.01/slave/zx_keys.txt /fpga/_ver0.01/texts /fpga/_ver0.01/texts/dram_access.txt /fpga/_ver0.01/texts/readme.txt /fpga/_ver0.01/texts/video_modes.txt /fpga/_ver0.01/top.v /fpga/_ver0.01/vg93 /fpga/_ver0.01/vg93/vg93.v /fpga/_ver0.01/video /fpga/_ver0.01/video/addresses.txt /fpga/_ver0.01/video/fetch.v /fpga/_ver0.01/video/synch.v /fpga/_ver0.01/video/syncv.v /fpga/_ver0.01/video/videoout.v /fpga/_ver0.01/z80 /fpga/_ver0.01/z80/zbus.v /fpga/_ver0.01/z80/zclock.v /fpga/_ver0.01/z80/zint.v /fpga/_ver0.01/z80/zmem.v /fpga/_ver0.01/z80/zports.v /fpga/current /fpga/current/README /fpga/current/common /fpga/current/common/resetter.v /fpga/current/common/spi2.v /fpga/current/dram /fpga/current/dram/arbiter.png /fpga/current/dram/arbiter.v /fpga/current/dram/cycles.txt /fpga/current/dram/dram.v /fpga/current/dram/test_compile.zip /fpga/current/include /fpga/current/include/tune.v /fpga/current/quartus /fpga/current/quartus/pentevo_0_01.qpf /fpga/current/quartus/pentevo_0_01.qws /fpga/current/quartus/top.qsf /fpga/current/quartus/top.rbf /fpga/current/quartus/top.sof /fpga/current/quartus/top_fix_ide_maybe.zip /fpga/current/sim_cdv /fpga/current/sim_cdv/a /fpga/current/sim_cdv/b /fpga/current/sim_cdv/tb.v /fpga/current/sim_models /fpga/current/sim_models/T80.vhd /fpga/current/sim_models/T80_ALU.vhd /fpga/current/sim_models/T80_MCode.vhd /fpga/current/sim_models/T80_Pack.vhd /fpga/current/sim_models/T80_Reg.vhd /fpga/current/sim_models/T80a.vhd /fpga/current/sim_models/drammem.v /fpga/current/sim_models/ram.v /fpga/current/sim_models/rom.v /fpga/current/slave /fpga/current/slave/slavespi.v /fpga/current/slave/zx.h /fpga/current/slave/zx_keys.txt /fpga/current/texts /fpga/current/texts/dram_access.txt /fpga/current/texts/readme.txt /fpga/current/texts/video_modes.txt /fpga/current/top.v /fpga/current/vg93 /fpga/current/vg93/vg93.v /fpga/current/video /fpga/current/video/addresses.txt /fpga/current/video/fetch.v /fpga/current/video/synch.v /fpga/current/video/syncv.v /fpga/current/video/videoout.v /fpga/current/z80 /fpga/current/z80/zbus.v /fpga/current/z80/zclock.v /fpga/current/z80/zint.v /fpga/current/z80/zmem.v /fpga/current/z80/zports.v /fpga/tests /fpga/tests/test_dram /fpga/tests/test_dram/dram.v /fpga/tests/test_dram/dram_control.v /fpga/tests/test_dram/main.qsf /fpga/tests/test_dram/main.rbf /fpga/tests/test_dram/main.sof /fpga/tests/test_dram/main.v /fpga/tests/test_dram/main_.v /fpga/tests/test_dram/mem_tester.v /fpga/tests/test_dram/resetter.v /fpga/tests/test_dram/rnd_vec_gen.v /fpga/tests/test_dram/sram_control.v /fpga/tests/test_dram/stable.sof /fpga/tests/test_dram/test_dram.qpf /fpga/tests/test_dram/test_dram.qws /fpga/tests/test_ledblink /fpga/tests/test_ledblink/dram.v /fpga/tests/test_ledblink/main.qsf /fpga/tests/test_ledblink/main.v /fpga/tests/test_ledblink/stable.sof /fpga/tests/test_ledblink/test_ledblink.qpf /fpga/tests/test_ledblink/test_ledblink.qws /file1st