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Rev	Age	Author	Path	Log message	Diff	Changes
905	2020-11-15 16:52:48	lvd	/	fpga: trdemu: changing dir structure		/fpga/base_trdemu /fpga/base_trdemu/trunk/doc /fpga/base_trdemu/trunk/doc/zxevo_trdemu.odt /fpga/base_trdemu/trunk/dram/test_compile.zip /fpga/base_trdemu/trunk/z80/clocking /fpga/base_trdemu/trunk/zxevo_base_configuration.odt /fpga/base_trdemu/trunk/zxevo_fw.bin /fpga/trdemu /cfgs/standalone_baseconf/trunk/make.sh /fpga/base_trdemu/trunk/video/video_modedecode.v
896	2020-11-14 20:24:33	lvd	/	pentevo: changing repo structure		/cfgs /cfgs/standalone_baseconf /cfgs/standalone_baseconf/trunk /cfgs/standalone_baseconf/trunk/README /fpga/baseconf /fpga/baseconf/trunk /fpga/baseconf/trunk/GPL /fpga/baseconf/trunk/TODO /fpga/baseconf/trunk/ULAPLUS /fpga/baseconf/trunk/common /fpga/baseconf/trunk/dram /fpga/baseconf/trunk/include /fpga/baseconf/trunk/mem /fpga/baseconf/trunk/quartus /fpga/baseconf/trunk/sim_models /fpga/baseconf/trunk/sim_top /fpga/baseconf/trunk/slave /fpga/baseconf/trunk/sound /fpga/baseconf/trunk/spihub /fpga/baseconf/trunk/texts /fpga/baseconf/trunk/top.v /fpga/baseconf/trunk/vg93 /fpga/baseconf/trunk/video /fpga/baseconf/trunk/z80 /fpga/trdemu/trunk /fpga/trdemu/trunk/TODO /fpga/trdemu/trunk/ULAPLUS /fpga/trdemu/trunk/common /fpga/trdemu/trunk/dram /fpga/trdemu/trunk/include /fpga/trdemu/trunk/mem /fpga/trdemu/trunk/quartus /fpga/trdemu/trunk/sim_models /fpga/trdemu/trunk/sim_top /fpga/trdemu/trunk/slave /fpga/trdemu/trunk/sound /fpga/trdemu/trunk/spihub /fpga/trdemu/trunk/texts /fpga/trdemu/trunk/top.v /fpga/trdemu/trunk/vg93 /fpga/trdemu/trunk/video /fpga/trdemu/trunk/z80 /fpga/trdemu/trunk/zxevo_base_configuration.odt /fpga/trdemu/trunk/zxevo_fw.bin
849	2020-01-09 23:16:31	lvd	/fpga/trdemu/	spawned a branch, added fdd mask register		/fpga/trdemu /fpga/trdemu/slave/slavespi.v /fpga/trdemu/slave/spi_fmt.txt /fpga/trdemu/top.v /fpga/trdemu/z80/zports.v
280	2010-11-10 10:05:08	lvd	/fpga/current/	fpga/current: merged important changes from atm_mem2		/fpga/current/sim_top/cg /fpga/current/sim_top/cg.bat /fpga/current/sim_top/gate /fpga/current/sim_top/vlog-gate.opt /fpga/current/sim_top/zxevo_rom.v /fpga/current /fpga/current/quartus/pentevo.qws /fpga/current/quartus/top.qsf /fpga/current/quartus/top.rbf /fpga/current/quartus/top.sof /fpga/current/sim_top/rom_top.v /fpga/current/sim_top/s /fpga/current/sim_top/s.bat /fpga/current/sim_top/tb_top.v /fpga/current/sim_top/testrom.v /fpga/current/sim_top/wave.do /fpga/current/z80/zwait.v
279	2010-11-07 23:25:57	lvd	/fpga/atm_mem2/sim_top/	gate-level for atm_mem2: functions OK		/fpga/atm_mem2/sim_top/cg /fpga/atm_mem2/sim_top/cg.bat /fpga/atm_mem2/sim_top/vlog-gate.opt /fpga/atm_mem2/sim_top/s /fpga/atm_mem2/sim_top/s.bat /fpga/atm_mem2/sim_top/tb_top.v /fpga/atm_mem2/sim_top/wave.do
264	2010-10-18 10:53:06	lvd	/fpga/atm_mem2/	branched current to atm_mem2 - almost finished, needs final test after negluck rom fixes		/fpga/atm_mem2
200	2010-04-30 01:29:13	lvd	/fpga/current/	merged atm_mem to current		/fpga/current/FIXME /fpga/current/mem /fpga/current/sim_top/c /fpga/current/sim_top/d /fpga/current/sim_top/l /fpga/current/sim_top/s /fpga/current/sim_top/test.rom /fpga/current/sim_top/testrom.v /fpga/current/sim_top/zxevo_rom.v /fpga/current/z80/zdos.v /fpga/current/quartus/top_fix_ide_maybe.zip /fpga/current/slave/zx.h /fpga/current /fpga/current/dram/dram.v /fpga/current/quartus/top.qsf /fpga/current/quartus/top.rbf /fpga/current/quartus/top.sof /fpga/current/sim_models/drammem.v /fpga/current/sim_top/rom_top.v /fpga/current/sim_top/tb_top.v /fpga/current/sim_top/vlog.opt /fpga/current/sim_top/wave.do /fpga/current/slave/slavespi.v /fpga/current/top.v /fpga/current/z80/zclock.v /fpga/current/z80/zint.v /fpga/current/z80/zkbdmus.v /fpga/current/z80/zmem.v /fpga/current/z80/zports.v /fpga/current/z80/zwait.v
34	2009-12-05 12:25:39	lvd	/fpga/current/	tb somehow works, added timing info (oscillospoce screenshots) to z80/clocking		/fpga/current/z80/clocking /fpga/current/z80/clocking/DS0000.BMP /fpga/current/z80/clocking/DS0001.BMP /fpga/current/z80/clocking/DS0002.BMP /fpga/current/z80/clocking/DS0003.BMP /fpga/current/z80/clocking/DS0004.BMP /fpga/current/z80/clocking/DS0005.BMP /fpga/current/z80/clocking/DS0006.BMP /fpga/current/z80/clocking/DS0007.BMP /fpga/current/z80/clocking/DS0008.BMP /fpga/current/z80/clocking/DS0009.BMP /fpga/current/z80/clocking/DS0010.BMP /fpga/current/z80/clocking/DS0011.BMP /fpga/current/z80/clocking/DS0012.BMP /fpga/current/z80/clocking/DS0013.BMP /fpga/current/z80/clocking/DS0014.BMP /fpga/current/z80/clocking/DS0015.BMP /fpga/current/z80/clocking/DS0016.BMP /fpga/current/z80/clocking/DS0017.BMP /fpga/current/z80/clocking/DS0018.BMP /fpga/current/z80/clocking/DS0019.BMP /fpga/current/z80/clocking/DS0020.BMP /fpga/current/z80/clocking/DS0021.BMP /fpga/current/z80/clocking/DS0022.BMP /fpga/current/z80/clocking/DS0023.BMP /fpga/current/z80/clocking/DS0024.BMP /fpga/current/z80/clocking/DS0025.BMP /fpga/current/sim_top/tb_top.v /fpga/current/sim_top/vlog.opt /fpga/current/sim_top/wave.do
29	2009-12-03 00:09:33	lvd	/fpga/current/sim_top/	complete testbench. does not work.		/fpga/current/sim_top /fpga/current/sim_top/c.bat /fpga/current/sim_top/d.bat /fpga/current/sim_top/l.bat /fpga/current/sim_top/s.bat /fpga/current/sim_top/tb_top.v /fpga/current/sim_top/vcom.opt /fpga/current/sim_top/vlog.opt /fpga/current/sim_top/wave.do