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Rev	Age	Author	Path	Log message	Diff	Changes
905	2020-11-15 16:52:48	lvd	/	fpga: trdemu: changing dir structure		/fpga/base_trdemu /fpga/base_trdemu/trunk/doc /fpga/base_trdemu/trunk/doc/zxevo_trdemu.odt /fpga/base_trdemu/trunk/dram/test_compile.zip /fpga/base_trdemu/trunk/z80/clocking /fpga/base_trdemu/trunk/zxevo_base_configuration.odt /fpga/base_trdemu/trunk/zxevo_fw.bin /fpga/trdemu /cfgs/standalone_baseconf/trunk/make.sh /fpga/base_trdemu/trunk/video/video_modedecode.v
896	2020-11-14 20:24:33	lvd	/	pentevo: changing repo structure		/cfgs /cfgs/standalone_baseconf /cfgs/standalone_baseconf/trunk /cfgs/standalone_baseconf/trunk/README /fpga/baseconf /fpga/baseconf/trunk /fpga/baseconf/trunk/GPL /fpga/baseconf/trunk/TODO /fpga/baseconf/trunk/ULAPLUS /fpga/baseconf/trunk/common /fpga/baseconf/trunk/dram /fpga/baseconf/trunk/include /fpga/baseconf/trunk/mem /fpga/baseconf/trunk/quartus /fpga/baseconf/trunk/sim_models /fpga/baseconf/trunk/sim_top /fpga/baseconf/trunk/slave /fpga/baseconf/trunk/sound /fpga/baseconf/trunk/spihub /fpga/baseconf/trunk/texts /fpga/baseconf/trunk/top.v /fpga/baseconf/trunk/vg93 /fpga/baseconf/trunk/video /fpga/baseconf/trunk/z80 /fpga/trdemu/trunk /fpga/trdemu/trunk/TODO /fpga/trdemu/trunk/ULAPLUS /fpga/trdemu/trunk/common /fpga/trdemu/trunk/dram /fpga/trdemu/trunk/include /fpga/trdemu/trunk/mem /fpga/trdemu/trunk/quartus /fpga/trdemu/trunk/sim_models /fpga/trdemu/trunk/sim_top /fpga/trdemu/trunk/slave /fpga/trdemu/trunk/sound /fpga/trdemu/trunk/spihub /fpga/trdemu/trunk/texts /fpga/trdemu/trunk/top.v /fpga/trdemu/trunk/vg93 /fpga/trdemu/trunk/video /fpga/trdemu/trunk/z80 /fpga/trdemu/trunk/zxevo_base_configuration.odt /fpga/trdemu/trunk/zxevo_fw.bin
863	2020-02-20 17:34:38	lvd	/fpga/trdemu/	fpga: spawned new simulation dir		/fpga/trdemu/sim_top/tb_trdemu /fpga/trdemu/sim_top/tb_trdemu/Makefile /fpga/trdemu/sim_top/tb_trdemu/c /fpga/trdemu/sim_top/tb_trdemu/d /fpga/trdemu/sim_top/tb_trdemu/pixer.v /fpga/trdemu/sim_top/tb_trdemu/rom_top.v /fpga/trdemu/sim_top/tb_trdemu/sc /fpga/trdemu/sim_top/tb_trdemu/sg /fpga/trdemu/sim_top/tb_trdemu/sndpix.c /fpga/trdemu/sim_top/tb_trdemu/sndpix.h /fpga/trdemu/sim_top/tb_trdemu/tb_top.v /fpga/trdemu/sim_top/tb_trdemu/vcom.opt /fpga/trdemu/sim_top/tb_trdemu/viewer.c /fpga/trdemu/sim_top/tb_trdemu/vlog.opt /fpga/trdemu/sim_top/tb_trdemu/zxevo_rom.v /fpga/trdemu/sim_top/gate/top.vo /fpga/trdemu/sim_top/gate/top_v.sdo /fpga/trdemu/top.v
849	2020-01-09 23:16:31	lvd	/fpga/trdemu/	spawned a branch, added fdd mask register		/fpga/trdemu /fpga/trdemu/slave/slavespi.v /fpga/trdemu/slave/spi_fmt.txt /fpga/trdemu/top.v /fpga/trdemu/z80/zports.v
31	2009-12-03 21:38:49	lvd	/fpga/current/sim_top/	T80 does not work in simulation		/fpga/current/sim_top/c.bat /fpga/current/sim_top/s.bat /fpga/current/sim_top/tb_top.v /fpga/current/sim_top/vcom.opt /fpga/current/sim_top/wave.do
29	2009-12-03 00:09:33	lvd	/fpga/current/sim_top/	complete testbench. does not work.		/fpga/current/sim_top /fpga/current/sim_top/c.bat /fpga/current/sim_top/d.bat /fpga/current/sim_top/l.bat /fpga/current/sim_top/s.bat /fpga/current/sim_top/tb_top.v /fpga/current/sim_top/vcom.opt /fpga/current/sim_top/vlog.opt /fpga/current/sim_top/wave.do