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37 2010-04-29 22:32:25 lvd /cpld/cpld5_buf/sim/ gate-level passes test!  
/cpld/cpld5_buf/sim/tb.v
/cpld/cpld5_buf/sim/wave.do
34 2010-04-21 23:23:36 lvd /cpld/cpld5_buf/ next iteration...  
/cpld/cpld5_buf/GS_cpld.v
/cpld/cpld5_buf/sim/tb.v
/cpld/cpld5_buf/sim/wave.do
29 2010-04-16 00:57:41 lvd /cpld/cpld5_buf/sim/ cpld tb up to fpga handover  
/cpld/cpld5_buf/sim/tb.v
/cpld/cpld5_buf/sim/wave.do
26 2010-04-12 10:35:28 lvd /cpld/cpld5_buf/sim/ same as below  
/cpld/cpld5_buf/sim/tb.v
/cpld/cpld5_buf/sim/wave.do
25 2010-04-09 23:26:34 lvd /cpld/cpld5_buf/ writing testbench for cpld_buf in progress  
/cpld/cpld5_buf/sim/GS_3032.txt
/cpld/cpld5_buf/GS_cpld.pof
/cpld/cpld5_buf/GS_cpld.qsf
/cpld/cpld5_buf/GS_cpld.v
/cpld/cpld5_buf/sim/tb.v
/cpld/cpld5_buf/sim/wave.do
/cpld/cpld5_buf/test1.cvwf
23 2010-04-07 23:58:41 lvd /cpld/cpld5_buf/sim/ Qua simulator suxx: using modelsim  
/cpld/cpld5_buf/sim
/cpld/cpld5_buf/sim/c
/cpld/cpld5_buf/sim/c.bat
/cpld/cpld5_buf/sim/cg
/cpld/cpld5_buf/sim/cg.bat
/cpld/cpld5_buf/sim/clocker_sim.v
/cpld/cpld5_buf/sim/d
/cpld/cpld5_buf/sim/d.bat
/cpld/cpld5_buf/sim/gate
/cpld/cpld5_buf/sim/gate/GS_cpld.vo
/cpld/cpld5_buf/sim/gate/GS_cpld_v.sdo
/cpld/cpld5_buf/sim/l
/cpld/cpld5_buf/sim/l.bat
/cpld/cpld5_buf/sim/s
/cpld/cpld5_buf/sim/s.bat
/cpld/cpld5_buf/sim/tb.v
/cpld/cpld5_buf/sim/vlog.opt
/cpld/cpld5_buf/sim/wave.do