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Rev Age Author Path Log message Diff
37 2010-04-29 22:32:25 lvd /cpld/cpld5_buf/sim/ gate-level passes test!  
34 2010-04-21 23:23:36 lvd /cpld/cpld5_buf/ next iteration...  
29 2010-04-16 00:57:41 lvd /cpld/cpld5_buf/sim/ cpld tb up to fpga handover  
26 2010-04-12 10:35:28 lvd /cpld/cpld5_buf/sim/ same as below  
25 2010-04-09 23:26:34 lvd /cpld/cpld5_buf/ writing testbench for cpld_buf in progress  
23 2010-04-07 23:58:41 lvd /cpld/cpld5_buf/sim/ Qua simulator suxx: using modelsim