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Rev Age Author Path Log message Diff
186 2020-02-24 16:56:32 lvd /branches/p2666fix_smaller_brd_bwr/ making some branches for p2666 fixes  
185 2020-02-23 19:48:04 lvd /trunk/cpld/rtl/tb/ zxiznet: test for 28mhz done, memmap is temporarily not tested  
184 2020-01-20 00:42:01 lvd /trunk/cpld/rtl/tb/ zxiznet: preparations to add 28mhz cpu support  
157 2018-12-24 17:59:02 lvd /trunk/ merged newports into trunk  
121 2018-02-12 01:18:17 lvd /trunk/cpld/ zxiznet: fixing for 14mhz: sl811 seems to work also, but fix overall is BAAAD. Will do lOOOng tests though  
84 2017-11-12 21:01:52 lvd /trunk/ zxiznet: newclk branch merged back to trunk: tested verilog  
76 2017-09-28 15:00:24 lvd /trunk/ zxiznet: TODO updated  
75 2017-09-26 17:40:44 lvd /trunk/ zxiznet: revC TODO added  
72 2017-09-19 13:30:36 lvd /trunk/cpld/rtl/ trunk: added clocked filter, patched testbench to pass tests with that filter  
71 2017-09-19 11:08:25 lvd /trunk/cpld/rtl/tb/ trunk: fixed obvious bug in tests  
60 2013-10-03 10:12:41 lvd /trunk/cpld/ zxiznet: dir structure  
59 2013-10-03 10:09:34 lvd /trunk/cpld/ zxiznet: trying to fix glitches...  
35 2012-11-12 16:23:58 lvd /trunk/cpld/rtl/tb/ gate-level passed  
33 2012-11-12 10:15:27 lvd /trunk/cpld/ trying to add gate-level  
32 2012-11-11 22:20:16 lvd /trunk/ added port access to w5300 (HDL code, testbench, specs all updated)  
31 2012-11-11 20:04:06 lvd /trunk/cpld/ finished testbench for current cpld code  
30 2012-11-11 16:03:39 lvd /trunk/cpld/rtl/ basic tests OK  
29 2012-11-11 10:20:58 lvd /trunk/cpld/rtl/tb/ started writing testbench tests  
28 2012-11-07 06:09:01 lvd /trunk/cpld/rtl/tb/ updated tb a little  
23 2012-10-31 11:25:00 lvd /trunk/cpld/rtl/ updated verilog code according to new specs  

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