| Rev |
Age |
Author |
Path |
Log message |
Diff |
| 200 |
2010-04-30 01:29:13 |
lvd |
/unsupported/solegstar/fpga/current/top.v |
merged atm_mem to current |
|
| 134 |
2010-02-23 11:53:32 |
ddp |
/unsupported/solegstar/fpga/current/top.v |
fpga back to rev.127 |
|
| 128 |
2010-02-21 18:14:13 |
ddp |
/unsupported/solegstar/fpga/current/top.v |
finest tune video-out |
|
| 123 |
2010-02-14 20:55:39 |
lvd |
/unsupported/solegstar/fpga/current/top.v |
added nmi control |
|
| 110 |
2010-02-04 00:18:05 |
lvd |
/unsupported/solegstar/fpga/current/top.v |
slave spi addressing changed, KJ port added (see spi_fmt.txt) |
|
| 98 |
2010-01-28 20:57:17 |
lvd |
/unsupported/solegstar/fpga/current/top.v |
border brightness fixed, vga on-off added (AVR control), docs has now 'supported_monitors' file |
|
| 93 |
2010-01-27 00:52:08 |
lvd |
/unsupported/solegstar/fpga/current/top.v |
VGA mode WORKS!. avr is not updated, at rev.76. Needs adding clock support. gluckrom won't work. Use BBMV to upload directly to FPGA |
|
| 92 |
2010-01-26 23:57:16 |
lvd |
/unsupported/solegstar/fpga/current/top.v |
vga scan-doubling initial commit (mey not work) |
|
| 88 |
2010-01-24 23:02:30 |
lvd |
/unsupported/solegstar/fpga/current/top.v |
wait-regs for gluck clocks made: gluck rom not working without software support in atmega; press F9-F11 to reset out of gluck rom. |
|
| 78 |
2010-01-23 20:16:50 |
chrv |
/unsupported/solegstar/fpga/current/top.v |
hsync has now 31khz, while csync still 15khz, no scan-doubling. |
|
| 77 |
2010-01-23 19:56:51 |
lvd |
/unsupported/solegstar/fpga/current/top.v |
31kHz on separate hsync output, no scandoubling |
|
| 70 |
2010-01-19 00:04:20 |
lvd |
/unsupported/solegstar/fpga/current/top.v |
bugs fixed, kbd works now |
|
| 67 |
2010-01-15 00:46:56 |
lvd |
/unsupported/solegstar/fpga/current/top.v |
making new SPI slave engine in FPGA, not tested by now, and can be totally broken! |
|
| 41 |
2009-12-11 00:31:20 |
lvd |
/unsupported/solegstar/fpga/current/top.v |
continuing... |
|
| 40 |
2009-12-08 00:12:49 |
lvd |
/unsupported/solegstar/fpga/current/top.v |
starting redesign from two clocks (zports.v) to single clock (fclk) and zpos-zneg strobes (zclock.v). May be broken now, not tested in hardware |
|
| 30 |
2009-12-03 00:09:55 |
lvd |
/unsupported/solegstar/fpga/current/top.v |
complete testbench. does not work. |
|
| 4 |
2009-11-21 21:06:56 |
lvd |
/unsupported/solegstar/fpga/current/top.v |
initial commit of FPGA files |
|