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Rev Age Author Path Log message Diff
510 2011-12-26 00:26:58 lvd /fpga/base_trdemu/trunk/sim_top/tb_top.v changed dram init in model; added waves to wave.do  
469 2011-07-18 13:22:03 lvd /fpga/base_trdemu/trunk/sim_top/tb_top.v fpga/current: added 16bit buffer for read data  
467 2011-07-14 23:08:27 lvd /fpga/base_trdemu/trunk/sim_top/tb_top.v merged z14 with trunk  
425 2011-06-05 17:12:18 lvd /fpga/base_trdemu/trunk/sim_top/tb_top.v atm_nmi merging with current  
280 2010-11-10 10:05:08 lvd /fpga/base_trdemu/trunk/sim_top/tb_top.v fpga/current: merged important changes from atm_mem2  
200 2010-04-30 01:29:13 lvd /fpga/base_trdemu/trunk/sim_top/tb_top.v merged atm_mem to current  
37 2009-12-06 00:21:46 lvd /fpga/base_trdemu/trunk/sim_top/tb_top.v Added timing info for z84c0010, tmpz84c00ap-8 and z0840008, modelling with z0840008 timings  
34 2009-12-05 12:25:39 lvd /fpga/base_trdemu/trunk/sim_top/tb_top.v tb somehow works, added timing info (oscillospoce screenshots) to z80/clocking  
33 2009-12-04 00:39:35 lvd /fpga/base_trdemu/trunk/sim_top/tb_top.v fixed bugs with Pullup1 going to vhld model  
31 2009-12-03 21:38:49 lvd /fpga/base_trdemu/trunk/sim_top/tb_top.v T80 does not work in simulation  
29 2009-12-03 00:09:33 lvd /fpga/base_trdemu/trunk/sim_top/tb_top.v complete testbench. does not work.  

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