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Rev Age Author Path Log message Diff
826 2019-05-16 14:29:51 lvd /fpga/current/ new features addition in progress  
668 2014-07-29 10:01:19 lvd / pentevo: added ulaplus, fixed NMI to RAM (DimkaM request)  
543 2012-01-15 23:09:23 lvd / fpga/current: merged all features to current (avr sdcard access, updated NMI behavior, font read, some bugfixes), built new zxevo_fw.bin  
476 2011-07-31 20:02:32 lvd / fpga/current: added self-nmi-generation, added ports for savelij  
425 2011-06-05 17:12:18 lvd /fpga/current/ atm_nmi merging with current  
284 2010-11-12 01:54:50 lvd / fpga/current: changed shadow gluclock access, added tapeout-beeper mux, docs changed accordingly, zxevo_fw.bin built accordingly  
228 2010-08-26 21:38:01 lvd /fpga/current/ fpga/current: adding SDcard in trdos, thinking about nemo-divide. added description of RS232 ports  
213 2010-06-21 03:30:22 lvd /fpga/current/ fpga: added tape_read bit (.d6)  
200 2010-04-30 01:29:13 lvd /fpga/current/ merged atm_mem to current  
123 2010-02-14 20:55:39 lvd /fpga/current/ added nmi control  
110 2010-02-04 00:18:05 lvd / slave spi addressing changed, KJ port added (see spi_fmt.txt)  
98 2010-01-28 20:57:17 lvd / border brightness fixed, vga on-off added (AVR control), docs has now 'supported_monitors' file  
95 2010-01-28 00:50:08 lvd / probably status bug fixed  
88 2010-01-24 23:02:30 lvd /fpga/current/ wait-regs for gluck clocks made: gluck rom not working without software support in atmega; press F9-F11 to reset out of gluck rom.  
70 2010-01-19 00:04:20 lvd / bugs fixed, kbd works now  
69 2010-01-17 22:10:20 lvd / probably bug in rev67 fixed  
67 2010-01-15 00:46:56 lvd / making new SPI slave engine in FPGA, not tested by now, and can be totally broken!  
40 2009-12-08 00:12:49 lvd /fpga/current/ starting redesign from two clocks (zports.v) to single clock (fclk) and zpos-zneg strobes (zclock.v). May be broken now, not tested in hardware  
30 2009-12-03 00:09:55 lvd /fpga/current/ complete testbench. does not work.  
4 2009-11-21 21:06:56 lvd / initial commit of FPGA files