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Rev Age Author Path Log message Diff
65 2013-11-10 00:38:45 lvd /branches/glitch_fixes/cpld/rtl/ zxiznet: glitch_fixes branch: returned LCELLS parameter to 1  
63 2013-10-05 21:39:42 lvd /branches/glitch_fixes/cpld/ zxiznet: changed to epm3128, added variable lcell delay, using delayed rd,wr,iorq everywhere, not functioning at all with LCELLS=7, still USB glitches with LCELLS=6  
61 2013-10-03 10:13:46 lvd /branches/glitch_fixes/ branching glitch fixes code  
60 2013-10-03 10:12:41 lvd /trunk/cpld/ zxiznet: dir structure  
59 2013-10-03 10:09:34 lvd /trunk/cpld/ zxiznet: trying to fix glitches...  
58 2013-09-22 20:18:15 lvd /trunk/cpld/ zxiznet: partially removed glitch problem by adding filters to cpld design, more glitches to kill  
57 2013-06-18 08:55:57 dimkam /trunk/ update doc  
56 2013-06-05 19:40:39 dimkam /trunk/doc/  
55 2013-06-05 10:54:15 lvd /trunk/doc/ zxiznet: 1st version of doc  
54 2013-06-05 09:52:17 lvd /trunk/doc/ zxiznet: started doc  
53 2013-04-16 00:49:08 chrv /trunk/ Revision B started  
52 2013-04-04 16:07:25 lvd /trunk/cpld/quartus/ zxiznet: fixed nasty bug with not assigning pins and letting qva spread em randomly while changing RTL -- previous rev is therefore non-functional  
51 2013-04-04 14:52:55 lvd /trunk/pdfs/ zxiznet: added errata to sl811 concerning autoincrement mode  
50 2013-04-04 12:05:15 lvd /trunk/specs/ zxiznet: fixed typo in specs  
49 2013-04-04 09:45:38 chrv /trunk/ Update documents  
48 2013-04-04 00:17:48 lvd /trunk/ zxiznet: fixed reset behavior of ms bit: now it's reset only on zx reset, not on sl811 reset. doc fixed, new .pof built  
47 2013-03-30 00:17:12 dimkam /trunk/drivers/ replacement driver for 8 bit version  
46 2013-03-25 19:00:25 chrv /trunk/pcad/  
45 2012-12-02 23:58:56 chrv /trunk/pcad/ LIB: Add MIC2025-YM
SCH: Alternative usb power switch on MIC2025-YM
PCB: Add alternative power switch on bottom side		  
44 2012-11-24 14:04:44 chrv /trunk/pcad/ PCB:
- C31R11R12 and C32R13R14 to bottom side;
- add some text on board.		  

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