Subversion Repositories pentevo

// Copyright (C) 1991-2006 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files from any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Altera Program License 
// Subscription Agreement, Altera MegaCore Function License 
// Agreement, or other applicable license agreement, including, 
// without limitation, that your use is for the sole purpose of 
// programming logic devices manufactured by Altera and sold by 
// Altera or its authorized distributors.  Please refer to the 
// applicable agreement for further details.

// VENDOR "Altera"
// PROGRAM "Quartus II"
// VERSION "Version 6.1 Build 201 11/27/2006 SJ Full Version"

// DATE "11/05/2010 20:17:05"

// 
// Device: Altera EP1K50QC208-3 Package PQFP208
// 

// 
// This Verilog file should be used for ModelSim (Verilog) only
// 

`timescale 1 ps/ 1 ps

module top (
        fclk,
        clkz_out,
        clkz_in,
        iorq_n,
        mreq_n,
        rd_n,
        wr_n,
        m1_n,
        rfsh_n,
        int_n,
        nmi_n,
        wait_n,
        res,
        d,
        a,
        csrom,
        romoe_n,
        romwe_n,
        rompg0_n,
        dos_n,
        rompg2,
        rompg3,
        rompg4,
        iorqge1,
        iorqge2,
        iorq1_n,
        iorq2_n,
        rd,
        ra,
        rwe_n,
        rucas_n,
        rlcas_n,
        rras0_n,
        rras1_n,
        vred,
        vgrn,
        vblu,
        vhsync,
        vvsync,
        vcsync,
        ay_clk,
        ay_bdir,
        ay_bc1,
        beep,
        ide_a,
        ide_d,
        ide_dir,
        ide_rdy,
        ide_cs0_n,
        ide_cs1_n,
        ide_rs_n,
        ide_rd_n,
        ide_wr_n,
        vg_clk,
        vg_cs_n,
        vg_res_n,
        vg_hrdy,
        vg_rclk,
        vg_rawr,
        vg_a,
        vg_wrd,
        vg_side,
        step,
        vg_sl,
        vg_sr,
        vg_tr43,
        rdat_b_n,
        vg_wf_de,
        vg_drq,
        vg_irq,
        vg_wd,
        sdcs_n,
        sddo,
        sdclk,
        sddi,
        spics_n,
        spick,
        spido,
        spidi,
        spiint_n);
input   fclk;
output  clkz_out;
input   clkz_in;
input   iorq_n;
input   mreq_n;
input   rd_n;
input   wr_n;
input   m1_n;
input   rfsh_n;
output  int_n;
output  nmi_n;
output  wait_n;
output  res;
inout   [7:0] d;
input   [15:0] a;
output  csrom;
output  romoe_n;
output  romwe_n;
output  rompg0_n;
output  dos_n;
output  rompg2;
output  rompg3;
output  rompg4;
input   iorqge1;
input   iorqge2;
output  iorq1_n;
output  iorq2_n;
inout   [15:0] rd;
output  [9:0] ra;
output  rwe_n;
output  rucas_n;
output  rlcas_n;
output  rras0_n;
output  rras1_n;
output  [1:0] vred;
output  [1:0] vgrn;
output  [1:0] vblu;
output  vhsync;
output  vvsync;
output  vcsync;
output  ay_clk;
output  ay_bdir;
output  ay_bc1;
output  beep;
output  [2:0] ide_a;
inout   [15:0] ide_d;
output  ide_dir;
input   ide_rdy;
output  ide_cs0_n;
output  ide_cs1_n;
output  ide_rs_n;
output  ide_rd_n;
output  ide_wr_n;
output  vg_clk;
output  vg_cs_n;
output  vg_res_n;
output  vg_hrdy;
output  vg_rclk;
output  vg_rawr;
output  [1:0] vg_a;
output  vg_wrd;
output  vg_side;
input   step;
input   vg_sl;
input   vg_sr;
input   vg_tr43;
input   rdat_b_n;
input   vg_wf_de;
input   vg_drq;
input   vg_irq;
input   vg_wd;
output  sdcs_n;
output  sddo;
output  sdclk;
input   sddi;
input   spics_n;
input   spick;
input   spido;
output  spidi;
output  spiint_n;

wire gnd = 1'b0;
wire vcc = 1'b1;

tri1 devclrn;
tri1 devpor;
tri1 devoe;
// synopsys translate_off
initial $sdf_annotate("top_v.sdo");
// synopsys translate_on

wire \zclock|zclk_out ;
wire \preryv|int_n ;
wire \myrst|rst_out_n ;
wire \instantiate_atm_pagers[1].atm_pager|romnram ;
wire \instantiate_atm_pagers[2].atm_pager|romnram ;
wire \instantiate_atm_pagers[0].atm_pager|romnram ;
wire \instantiate_atm_pagers[3].atm_pager|romnram ;
wire \z80mem|Mux8~3 ;
wire \z80mem|romoe_n ;
wire \zports|romrw_en_reg ;
wire \z80mem|romwe_n~15 ;
wire \z80mem|Mux7~3 ;
wire \z80mem|Mux6~3 ;
wire \z80mem|Mux5~10 ;
wire \z80mem|Mux4~3 ;
wire \z80mem|Mux3~3 ;
wire \zdos|dos ;
wire \zports|always0~81 ;
wire \zports|porthit~584 ;
wire \zxbus|iorq1_n ;
wire \zxbus|iorq2_n ;
wire \dram|rwe_n~COMB ;
wire \dram|rucas_n~COMB ;
wire \dram|rlcas_n~COMB ;
wire \dram|rras0_n~COMB ;
wire \dram|rras1_n~COMB ;
wire \vidia|vred[0]~COMB ;
wire \vidia|vred[1]~COMB ;
wire \vidia|vgrn[0]~COMB ;
wire \vidia|vgrn[1]~COMB ;
wire \vidia|vblu[0]~COMB ;
wire \vidia|vblu[1]~COMB ;
wire \vidia|vhsync ;
wire \vidia|vvsync ;
wire \vidia|vcsync ;
wire \zports|ay_bdir ;
wire \zports|ay_bc1~38 ;
wire \zports|beep ;
wire \zports|ide_rd_n~64 ;
wire \zports|ide_cs0_n ;
wire \zports|ide_cs1_n ;
wire \zports|ide_wr_n~73 ;
wire \zports|vg_cs_n ;
wire \vgshka|vg_res_n ;
wire \vgshka|vg_hrdy ;
wire \vgshka|vg_rclk ;
wire \vgshka|vg_rawr ;
wire \vgshka|vg_wrd ;
wire \vgshka|vg_side ;
wire \zports|sdcs_n ;
wire \zwait|WideNor0 ;
wire \zclock|zneg ;
wire \zclock|zpos ;
wire \slavespi|genrst ;
wire \zports|atm_pen ;
wire \instantiate_atm_pagers[2].atm_pager|always0~47 ;
wire \instantiate_atm_pagers[1].atm_pager|always0~47 ;
wire \WideOr0~82 ;
wire \zports|atm_cpm_n ;
wire \z80mem|cpu_rnw~38 ;
wire \z80mem|cpu_req ;
wire \dramarb|Equal2~38 ;
wire \dramarb|next_cycle[0]~256 ;
wire \dram|Selector1~73 ;
wire \fecher|go ;
wire \dramarb|next_cycle[1]~258 ;
wire \vert_sync|vpix ;
wire \horiz_sync|hpix ;
wire \vert_sync|vblank ;
wire \horiz_sync|hblank ;
wire \fecher|Mux10~30 ;
wire \fecher|zxcolor[3]~196 ;
wire \fecher|Mux15~30 ;
wire \fecher|zxcolor~199 ;
wire \fecher|zxcolor[1]~200 ;
wire \fecher|Mux14~30 ;
wire \fecher|zxcolor~202 ;
wire \fecher|zxcolor[2]~203 ;
wire \fecher|Mux16~30 ;
wire \fecher|zxcolor~205 ;
wire \fecher|zxcolor[0]~206 ;
wire \vga_synch|vga_hsync ;
wire \horiz_sync|hsync ;
wire \vert_sync|vsync ;
wire \zports|port_wr ;
wire \zports|vg_wrFF ;
wire \zports|sd_start ;
wire \slavespi|sel_waitreg~8 ;
wire \zports|wait_start_comport~22 ;
wire \zports|wait_start_gluclock~58 ;
wire \dram|cbeg ;
wire \dramarb|pre_cend ;
wire \WideOr0~83 ;
wire WideOr0;
wire \zports|atmF7_wr_fclk ;
wire \instantiate_atm_pagers[0].atm_pager|dos_7ffd[0]~81 ;
wire \instantiate_atm_pagers[0].atm_pager|dos_turn_off~58 ;
wire \instantiate_atm_pagers[0].atm_pager|dos_exec_stb~122 ;
wire \zports|pre_bc1~13 ;
wire \instantiate_atm_pagers[3].atm_pager|dos_exec_stb~67 ;
wire \instantiate_atm_pagers[1].atm_pager|ramnrom[0]~66 ;
wire \instantiate_atm_pagers[1].atm_pager|dos_exec_stb~67 ;
wire \instantiate_atm_pagers[2].atm_pager|ramnrom[0]~66 ;
wire \instantiate_atm_pagers[2].atm_pager|dos_exec_stb~67 ;
wire \instantiate_atm_pagers[0].atm_pager|dos_exec_stb~123 ;
wire \vert_sync|int_start ;
wire \zports|Selector7~1858 ;
wire \zports|Selector2~1452 ;
wire \zports|Selector1~1384 ;
wire \zports|Selector0~1454 ;
wire \zports|ideout[0]~64 ;
wire \zports|ideout[1]~65 ;
wire \zports|ideout[2]~66 ;
wire \zports|ideout[3]~67 ;
wire \zports|ideout[4]~68 ;
wire \zports|ideout[5]~69 ;
wire \zports|ideout[6]~70 ;
wire \zports|ideout[7]~71 ;
wire \zports|ideout[8]~72 ;
wire \zports|ideout[9]~73 ;
wire \zports|ideout[10]~74 ;
wire \zports|ideout[11]~75 ;
wire \zports|ideout[12]~76 ;
wire \zports|ideout[13]~77 ;
wire \zports|ideout[14]~78 ;
wire \zports|ideout[15]~79 ;
wire \instantiate_atm_pagers[3].atm_pager|dos_turn_off~39 ;
wire \instantiate_atm_pagers[0].atm_pager|dos_turn_off~59 ;
wire \dramarb|video_next ;
wire \horiz_sync|line_start ;
wire \dramarb|next_cycle[0]~259 ;
wire \dramarb|dram_addr[11]~2017 ;
wire \dramarb|dram_addr[12]~2018 ;
wire \dramarb|dram_addr[13]~2019 ;
wire \z80mem|Mux2~3 ;
wire \dramarb|dram_addr[9]~2026 ;
wire \z80mem|Mux1~3 ;
wire \dramarb|dram_addr[10]~2027 ;
wire \z80mem|Mux0~3 ;
wire \dramarb|cend ;
wire \vga_synch|scanout_start ;
wire \horiz_sync|hsync_start ;
wire \dramarb|video_strobe ;
wire \horiz_sync|hint_start ;
wire \dramarb|cpu_strobe ;
wire \slavespi|mus_ystb ;
wire \slavespi|mus_xstb ;
wire \slavespi|mus_btnstb~12 ;
wire \dramarb|dram_addr[7]~2032 ;
wire \dramarb|dram_addr[8]~2033 ;
wire \zports|Selector0~1469 ;
wire \zports|dataout~113 ;
wire \zports|Selector7~1898 ;
wire \zports|Selector7~1899 ;
wire \zports|Selector6~1408 ;
wire \zports|Selector6~1409 ;
wire \zports|Selector5~1408 ;
wire \zports|Selector5~1409 ;
wire \zports|Selector4~1408 ;
wire \zports|Selector4~1409 ;
wire \zports|Selector3~1408 ;
wire \zports|Selector3~1409 ;
wire \zports|Selector2~1468 ;
wire \zports|Selector1~1400 ;
wire \zports|Selector0~1470 ;
wire \slavespi|kj_stb~12 ;
wire \slavespi|kbd_stb~30 ;
wire \zports|wait_rnw ;
wire \zports|Selector6~1407 ;
wire \zports|Selector5~1407 ;
wire \zports|Selector4~1407 ;
wire \zports|Selector3~1407 ;
wire \zports|Selector2~1467 ;
wire \zports|Selector1~1399 ;
wire \mreq_n~dataout ;
wire \wr_n~dataout ;
wire \iorqge1~dataout ;
wire \clkz_in~dataout ;
wire \rfsh_n~dataout ;
wire \spics_n~dataout ;
wire \spick~dataout ;
wire \spido~dataout ;
wire \step~dataout ;
wire \vg_drq~dataout ;
wire \vg_wd~dataout ;
wire \vg_irq~dataout ;
wire \rdat_b_n~dataout ;
wire \vg_sr~dataout ;
wire \vg_sl~dataout ;
wire \vg_tr43~dataout ;
wire \sddi~dataout ;
wire \horiz_sync|line_start~_wirecell ;
wire \vert_sync|int_start~_wirecell ;
wire \zports|sd_start~_wirecell ;
wire \myrst|rst_out_n~9 ;
wire \zports|ide_rd_n~66 ;
wire \zwait|WideNor0~1 ;
wire \dram|int_wrdata[0]~24 ;
wire \dram|int_wrdata[1]~25 ;
wire \dram|int_wrdata[2]~26 ;
wire \dram|int_wrdata[3]~27 ;
wire \dram|int_wrdata[4]~28 ;
wire \dram|int_wrdata[5]~29 ;
wire \dram|int_wrdata[6]~30 ;
wire \dram|int_wrdata[7]~31 ;
wire \dram|rwe_n ;
wire \dram|rucas_n ;
wire \dram|rlcas_n ;
wire \dram|rras0_n ;
wire \dram|rras1_n ;
wire \d[0]~7 ;
wire \d[1]~6 ;
wire \d[2]~5 ;
wire \d[3]~4 ;
wire \d[4]~3 ;
wire \d[5]~2 ;
wire \d[6]~1 ;
wire \d[7]~0 ;
wire \rd[0]~15 ;
wire \rd[1]~14 ;
wire \rd[2]~13 ;
wire \rd[3]~12 ;
wire \rd[4]~11 ;
wire \rd[5]~10 ;
wire \rd[6]~9 ;
wire \rd[7]~8 ;
wire \rd[8]~7 ;
wire \rd[9]~6 ;
wire \rd[10]~5 ;
wire \rd[11]~4 ;
wire \rd[12]~3 ;
wire \rd[13]~2 ;
wire \rd[14]~1 ;
wire \rd[15]~0 ;
wire \ide_d[0]~15 ;
wire \ide_d[1]~14 ;
wire \ide_d[2]~13 ;
wire \ide_d[3]~12 ;
wire \ide_d[4]~11 ;
wire \ide_d[5]~10 ;
wire \ide_d[6]~9 ;
wire \ide_d[7]~8 ;
wire \ide_d[8]~7 ;
wire \ide_d[9]~6 ;
wire \ide_d[10]~5 ;
wire \ide_d[11]~4 ;
wire \ide_d[12]~3 ;
wire \ide_d[13]~2 ;
wire \ide_d[14]~1 ;
wire \ide_d[15]~0 ;
wire \fclk~dataout ;
wire \ayclk_gen_rtl_0|wysi_counter|counter_cell[0]~COUT ;
wire \ayclk_gen_rtl_0|wysi_counter|counter_cell[1]~COUT ;
wire \ayclk_gen_rtl_0|wysi_counter|counter_cell[2]~COUT ;
wire \ide_a[0]~0 ;
wire \ide_a[1]~1 ;
wire \ide_a[2]~2 ;
wire \ide_dir~0 ;
wire \d~4437 ;
wire \d~4436 ;
wire \d~4438 ;
wire \m1_n~dataout ;
wire \iorq_n~dataout ;
wire \m1_n~9 ;
wire \iorqge2~dataout ;
wire \rd_n~dataout ;
wire \iorqge2~17 ;
wire \d~25 ;
wire \d~4440 ;
wire \d~4439 ;
wire \d~4441 ;
wire \d~4443 ;
wire \d~4442 ;
wire \d~4444 ;
wire \d~4446 ;
wire \d~4445 ;
wire \d~4447 ;
wire \d~4449 ;
wire \d~4448 ;
wire \d~4450 ;
wire \d~4452 ;
wire \d~4451 ;
wire \d~4453 ;
wire \d~4455 ;
wire \d~4454 ;
wire \d~4456 ;
wire \d~4458 ;
wire \d~4457 ;
wire \d~4459 ;
wire [7:0] \zspi|dout ;
wire [7:0] \zspi|shiftout ;
wire [1:0] \vgshka|drq_sync ;
wire [1:0] \vgshka|intrq_sync ;
wire [1:0] \vgshka|vg_a ;
wire [1:0] \vgshka|vgclk_div4 ;
wire [6:0] \zwait|waits ;
wire [2:0] \zports|border ;
wire [2:0] \zports|comport_addr ;
wire [7:0] \zports|gluclock_addr ;
wire [7:0] \zports|p7ffd_int ;
wire [7:0] \zports|peff7_int ;
wire [2:0] \zports|sd_stgl ;
wire [7:0] \zports|wait_write ;
wire [39:0] \zkbdmus|kbd ;
wire [4:0] \zkbdmus|kj_data ;
wire [7:0] \zkbdmus|musbtn ;
wire [7:0] \zkbdmus|musx ;
wire [7:0] \zkbdmus|musy ;
wire [7:0] \slavespi|cfg0_reg_out ;
wire [39:0] \slavespi|kbd_reg ;
wire [7:0] \slavespi|mouse_buf ;
wire [7:0] \slavespi|shift_out ;
wire [2:0] \slavespi|spics_n_sync ;
wire [7:0] \slavespi|wait_reg ;
wire [1:0] \fecher|dcnt ;
wire [15:0] \dram|int_wrdata ;
wire [9:0] \dram|ra ;
wire [15:0] \dram|rddata ;
wire [7:0] \z80mem|zd_out ;
wire [7:0] \instantiate_atm_pagers[3].atm_pager|page ;
wire [2:0] \instantiate_atm_pagers[3].atm_pager|stall_count ;
wire [7:0] \instantiate_atm_pagers[2].atm_pager|page ;
wire [2:0] \instantiate_atm_pagers[2].atm_pager|stall_count ;
wire [7:0] \instantiate_atm_pagers[1].atm_pager|page ;
wire [2:0] \instantiate_atm_pagers[1].atm_pager|stall_count ;
wire [7:0] \instantiate_atm_pagers[0].atm_pager|page ;
wire [2:0] \instantiate_atm_pagers[0].atm_pager|stall_count ;
wire [15:0] \a~dataout ;
wire [3:0] \fecher|hcnt_rtl_11|wysi_counter|q ;
wire [7:0] \fecher|vcnt_rtl_10|wysi_counter|q ;
wire [4:0] \zspi|counter_rtl_1|wysi_counter|q ;
wire [3:0] \ayclk_gen_rtl_0|wysi_counter|q ;


resetter myrst(
        .rst_out_n(\myrst|rst_out_n ),
        .rst_in_n(\slavespi|genrst ),
        .clk(\fclk~dataout ),
        .rst_out_n1(\myrst|rst_out_n~9 ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

zclock zclock_1(
        .zclk_out(\zclock|zclk_out ),
        .zneg(\zclock|zneg ),
        .zpos(\zclock|zpos ),
        .cbeg(\dram|cbeg ),
        .pre_cend(\dramarb|pre_cend ),
        .WideOr0(WideOr0),
        .peff7_int_4(\zports|peff7_int [4]),
        .fclk(\fclk~dataout ),
        .rfsh_n(\rfsh_n~dataout ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

zbus zxbus(
        .porthit(\zports|porthit~584 ),
        .iorq1_n(\zxbus|iorq1_n ),
        .iorq2_n(\zxbus|iorq2_n ),
        .iorq_n(\iorq_n~dataout ),
        .iorqge1(\iorqge1~dataout ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

atm_pager \instantiate_atm_pagers[0].atm_pager (
        .romnram(\instantiate_atm_pagers[0].atm_pager|romnram ),
        .page_0(\instantiate_atm_pagers[0].atm_pager|page [0]),
        .page_1(\instantiate_atm_pagers[0].atm_pager|page [1]),
        .page_2(\instantiate_atm_pagers[0].atm_pager|page [2]),
        .page_3(\instantiate_atm_pagers[0].atm_pager|page [3]),
        .page_4(\instantiate_atm_pagers[0].atm_pager|page [4]),
        .dos(\zdos|dos ),
        .zneg(\zclock|zneg ),
        .zpos(\zclock|zpos ),
        .p7ffd_int_4(\zports|p7ffd_int [4]),
        .atm_pen(\zports|atm_pen ),
        .peff7_int_3(\zports|peff7_int [3]),
        .p7ffd_int_0(\zports|p7ffd_int [0]),
        .p7ffd_int_1(\zports|p7ffd_int [1]),
        .p7ffd_int_2(\zports|p7ffd_int [2]),
        .p7ffd_int_5(\zports|p7ffd_int [5]),
        .peff7_int_2(\zports|peff7_int [2]),
        .p7ffd_int_6(\zports|p7ffd_int [6]),
        .stall_count_2(\instantiate_atm_pagers[0].atm_pager|stall_count [2]),
        .atmF7_wr_fclk(\zports|atmF7_wr_fclk ),
        .dos_7ffd_0(\instantiate_atm_pagers[0].atm_pager|dos_7ffd[0]~81 ),
        .dos_turn_off(\instantiate_atm_pagers[0].atm_pager|dos_turn_off~58 ),
        .dos_exec_stb(\instantiate_atm_pagers[0].atm_pager|dos_exec_stb~122 ),
        .dos_exec_stb1(\instantiate_atm_pagers[0].atm_pager|dos_exec_stb~123 ),
        .dos_turn_off1(\instantiate_atm_pagers[0].atm_pager|dos_turn_off~59 ),
        .page_5(\instantiate_atm_pagers[0].atm_pager|page [5]),
        .page_6(\instantiate_atm_pagers[0].atm_pager|page [6]),
        .page_7(\instantiate_atm_pagers[0].atm_pager|page [7]),
        .p7ffd_int_7(\zports|p7ffd_int [7]),
        .a_14(\a~dataout [14]),
        .a_15(\a~dataout [15]),
        .mreq_n(\mreq_n~dataout ),
        .fclk(\fclk~dataout ),
        .m1_n(\m1_n~dataout ),
        .a_8(\a~dataout [8]),
        .a_11(\a~dataout [11]),
        .a_12(\a~dataout [12]),
        .a_13(\a~dataout [13]),
        .a_10(\a~dataout [10]),
        .a_9(\a~dataout [9]),
        .d_0(\d[0]~7 ),
        .d_1(\d[1]~6 ),
        .d_2(\d[2]~5 ),
        .d_3(\d[3]~4 ),
        .d_4(\d[4]~3 ),
        .d_5(\d[5]~2 ),
        .d_6(\d[6]~1 ),
        .d_7(\d[7]~0 ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

atm_pager_1 \instantiate_atm_pagers[1].atm_pager (
        .romnram(\instantiate_atm_pagers[1].atm_pager|romnram ),
        .page_0(\instantiate_atm_pagers[1].atm_pager|page [0]),
        .page_1(\instantiate_atm_pagers[1].atm_pager|page [1]),
        .page_2(\instantiate_atm_pagers[1].atm_pager|page [2]),
        .page_3(\instantiate_atm_pagers[1].atm_pager|page [3]),
        .page_4(\instantiate_atm_pagers[1].atm_pager|page [4]),
        .dos(\zdos|dos ),
        .p7ffd_int_4(\zports|p7ffd_int [4]),
        .atm_pen(\zports|atm_pen ),
        .p7ffd_int_0(\zports|p7ffd_int [0]),
        .always0(\instantiate_atm_pagers[1].atm_pager|always0~47 ),
        .p7ffd_int_1(\zports|p7ffd_int [1]),
        .p7ffd_int_2(\zports|p7ffd_int [2]),
        .p7ffd_int_5(\zports|p7ffd_int [5]),
        .peff7_int_2(\zports|peff7_int [2]),
        .p7ffd_int_6(\zports|p7ffd_int [6]),
        .stall_count_2(\instantiate_atm_pagers[1].atm_pager|stall_count [2]),
        .atmF7_wr_fclk(\zports|atmF7_wr_fclk ),
        .dos_7ffd_0(\instantiate_atm_pagers[0].atm_pager|dos_7ffd[0]~81 ),
        .dos_exec_stb(\instantiate_atm_pagers[0].atm_pager|dos_exec_stb~122 ),
        .ramnrom_0(\instantiate_atm_pagers[1].atm_pager|ramnrom[0]~66 ),
        .dos_exec_stb1(\instantiate_atm_pagers[1].atm_pager|dos_exec_stb~67 ),
        .page_5(\instantiate_atm_pagers[1].atm_pager|page [5]),
        .page_6(\instantiate_atm_pagers[1].atm_pager|page [6]),
        .page_7(\instantiate_atm_pagers[1].atm_pager|page [7]),
        .p7ffd_int_7(\zports|p7ffd_int [7]),
        .a_14(\a~dataout [14]),
        .a_15(\a~dataout [15]),
        .fclk(\fclk~dataout ),
        .a_11(\a~dataout [11]),
        .d_0(\d[0]~7 ),
        .d_1(\d[1]~6 ),
        .d_2(\d[2]~5 ),
        .d_3(\d[3]~4 ),
        .d_4(\d[4]~3 ),
        .d_5(\d[5]~2 ),
        .d_6(\d[6]~1 ),
        .d_7(\d[7]~0 ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

atm_pager_2 \instantiate_atm_pagers[2].atm_pager (
        .romnram(\instantiate_atm_pagers[2].atm_pager|romnram ),
        .page_0(\instantiate_atm_pagers[2].atm_pager|page [0]),
        .page_1(\instantiate_atm_pagers[2].atm_pager|page [1]),
        .page_2(\instantiate_atm_pagers[2].atm_pager|page [2]),
        .page_3(\instantiate_atm_pagers[2].atm_pager|page [3]),
        .page_4(\instantiate_atm_pagers[2].atm_pager|page [4]),
        .dos(\zdos|dos ),
        .p7ffd_int_4(\zports|p7ffd_int [4]),
        .atm_pen(\zports|atm_pen ),
        .p7ffd_int_0(\zports|p7ffd_int [0]),
        .always0(\instantiate_atm_pagers[2].atm_pager|always0~47 ),
        .p7ffd_int_1(\zports|p7ffd_int [1]),
        .p7ffd_int_2(\zports|p7ffd_int [2]),
        .p7ffd_int_5(\zports|p7ffd_int [5]),
        .peff7_int_2(\zports|peff7_int [2]),
        .p7ffd_int_6(\zports|p7ffd_int [6]),
        .stall_count_2(\instantiate_atm_pagers[2].atm_pager|stall_count [2]),
        .atmF7_wr_fclk(\zports|atmF7_wr_fclk ),
        .dos_7ffd_0(\instantiate_atm_pagers[0].atm_pager|dos_7ffd[0]~81 ),
        .dos_exec_stb(\instantiate_atm_pagers[0].atm_pager|dos_exec_stb~122 ),
        .ramnrom_0(\instantiate_atm_pagers[2].atm_pager|ramnrom[0]~66 ),
        .dos_exec_stb1(\instantiate_atm_pagers[2].atm_pager|dos_exec_stb~67 ),
        .page_5(\instantiate_atm_pagers[2].atm_pager|page [5]),
        .page_6(\instantiate_atm_pagers[2].atm_pager|page [6]),
        .page_7(\instantiate_atm_pagers[2].atm_pager|page [7]),
        .p7ffd_int_7(\zports|p7ffd_int [7]),
        .a_14(\a~dataout [14]),
        .a_15(\a~dataout [15]),
        .fclk(\fclk~dataout ),
        .a_11(\a~dataout [11]),
        .d_0(\d[0]~7 ),
        .d_1(\d[1]~6 ),
        .d_2(\d[2]~5 ),
        .d_3(\d[3]~4 ),
        .d_4(\d[4]~3 ),
        .d_5(\d[5]~2 ),
        .d_6(\d[6]~1 ),
        .d_7(\d[7]~0 ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

atm_pager_3 \instantiate_atm_pagers[3].atm_pager (
        .romnram(\instantiate_atm_pagers[3].atm_pager|romnram ),
        .page_0(\instantiate_atm_pagers[3].atm_pager|page [0]),
        .page_1(\instantiate_atm_pagers[3].atm_pager|page [1]),
        .page_2(\instantiate_atm_pagers[3].atm_pager|page [2]),
        .page_3(\instantiate_atm_pagers[3].atm_pager|page [3]),
        .page_4(\instantiate_atm_pagers[3].atm_pager|page [4]),
        .dos(\zdos|dos ),
        .p7ffd_int_4(\zports|p7ffd_int [4]),
        .atm_pen(\zports|atm_pen ),
        .p7ffd_int_0(\zports|p7ffd_int [0]),
        .p7ffd_int_1(\zports|p7ffd_int [1]),
        .p7ffd_int_2(\zports|p7ffd_int [2]),
        .p7ffd_int_5(\zports|p7ffd_int [5]),
        .peff7_int_2(\zports|peff7_int [2]),
        .p7ffd_int_6(\zports|p7ffd_int [6]),
        .stall_count_2(\instantiate_atm_pagers[3].atm_pager|stall_count [2]),
        .atmF7_wr_fclk(\zports|atmF7_wr_fclk ),
        .dos_7ffd_0(\instantiate_atm_pagers[0].atm_pager|dos_7ffd[0]~81 ),
        .dos_exec_stb(\instantiate_atm_pagers[0].atm_pager|dos_exec_stb~122 ),
        .pre_bc1(\zports|pre_bc1~13 ),
        .dos_exec_stb1(\instantiate_atm_pagers[3].atm_pager|dos_exec_stb~67 ),
        .dos_turn_off(\instantiate_atm_pagers[3].atm_pager|dos_turn_off~39 ),
        .page_5(\instantiate_atm_pagers[3].atm_pager|page [5]),
        .page_6(\instantiate_atm_pagers[3].atm_pager|page [6]),
        .page_7(\instantiate_atm_pagers[3].atm_pager|page [7]),
        .p7ffd_int_7(\zports|p7ffd_int [7]),
        .a_14(\a~dataout [14]),
        .a_15(\a~dataout [15]),
        .fclk(\fclk~dataout ),
        .a_11(\a~dataout [11]),
        .d_0(\d[0]~7 ),
        .d_1(\d[1]~6 ),
        .d_2(\d[2]~5 ),
        .d_3(\d[3]~4 ),
        .d_4(\d[4]~3 ),
        .d_5(\d[5]~2 ),
        .d_6(\d[6]~1 ),
        .d_7(\d[7]~0 ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

zdos zdos_1(
        .rst_out_n(\myrst|rst_out_n ),
        .dos(\zdos|dos ),
        .always0(\instantiate_atm_pagers[2].atm_pager|always0~47 ),
        .always01(\instantiate_atm_pagers[1].atm_pager|always0~47 ),
        .WideOr0(\WideOr0~82 ),
        .atm_cpm_n(\zports|atm_cpm_n ),
        .dos_turn_off(\instantiate_atm_pagers[0].atm_pager|dos_turn_off~58 ),
        .ramnrom_0(\instantiate_atm_pagers[1].atm_pager|ramnrom[0]~66 ),
        .ramnrom_01(\instantiate_atm_pagers[2].atm_pager|ramnrom[0]~66 ),
        .dos_turn_off1(\instantiate_atm_pagers[3].atm_pager|dos_turn_off~39 ),
        .dos_turn_off2(\instantiate_atm_pagers[0].atm_pager|dos_turn_off~59 ),
        .fclk(\fclk~dataout ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

zmem z80mem(
        .romnram(\instantiate_atm_pagers[1].atm_pager|romnram ),
        .romnram1(\instantiate_atm_pagers[2].atm_pager|romnram ),
        .romnram2(\instantiate_atm_pagers[0].atm_pager|romnram ),
        .romnram3(\instantiate_atm_pagers[3].atm_pager|romnram ),
        .Mux8(\z80mem|Mux8~3 ),
        .romoe_n(\z80mem|romoe_n ),
        .romrw_en_reg(\zports|romrw_en_reg ),
        .romwe_n(\z80mem|romwe_n~15 ),
        .page_0(\instantiate_atm_pagers[2].atm_pager|page [0]),
        .page_01(\instantiate_atm_pagers[1].atm_pager|page [0]),
        .page_02(\instantiate_atm_pagers[0].atm_pager|page [0]),
        .page_03(\instantiate_atm_pagers[3].atm_pager|page [0]),
        .Mux7(\z80mem|Mux7~3 ),
        .page_1(\instantiate_atm_pagers[1].atm_pager|page [1]),
        .page_11(\instantiate_atm_pagers[2].atm_pager|page [1]),
        .page_12(\instantiate_atm_pagers[0].atm_pager|page [1]),
        .page_13(\instantiate_atm_pagers[3].atm_pager|page [1]),
        .Mux6(\z80mem|Mux6~3 ),
        .page_2(\instantiate_atm_pagers[2].atm_pager|page [2]),
        .page_21(\instantiate_atm_pagers[1].atm_pager|page [2]),
        .page_22(\instantiate_atm_pagers[0].atm_pager|page [2]),
        .page_23(\instantiate_atm_pagers[3].atm_pager|page [2]),
        .Mux5(\z80mem|Mux5~10 ),
        .page_3(\instantiate_atm_pagers[1].atm_pager|page [3]),
        .page_31(\instantiate_atm_pagers[2].atm_pager|page [3]),
        .page_32(\instantiate_atm_pagers[0].atm_pager|page [3]),
        .page_33(\instantiate_atm_pagers[3].atm_pager|page [3]),
        .Mux4(\z80mem|Mux4~3 ),
        .page_4(\instantiate_atm_pagers[2].atm_pager|page [4]),
        .page_41(\instantiate_atm_pagers[1].atm_pager|page [4]),
        .page_42(\instantiate_atm_pagers[0].atm_pager|page [4]),
        .page_43(\instantiate_atm_pagers[3].atm_pager|page [4]),
        .Mux3(\z80mem|Mux3~3 ),
        .cpu_rnw(\z80mem|cpu_rnw~38 ),
        .cpu_req(\z80mem|cpu_req ),
        .page_5(\instantiate_atm_pagers[1].atm_pager|page [5]),
        .page_51(\instantiate_atm_pagers[2].atm_pager|page [5]),
        .page_52(\instantiate_atm_pagers[0].atm_pager|page [5]),
        .page_53(\instantiate_atm_pagers[3].atm_pager|page [5]),
        .Mux2(\z80mem|Mux2~3 ),
        .page_6(\instantiate_atm_pagers[2].atm_pager|page [6]),
        .page_61(\instantiate_atm_pagers[1].atm_pager|page [6]),
        .page_62(\instantiate_atm_pagers[0].atm_pager|page [6]),
        .page_63(\instantiate_atm_pagers[3].atm_pager|page [6]),
        .Mux1(\z80mem|Mux1~3 ),
        .page_7(\instantiate_atm_pagers[1].atm_pager|page [7]),
        .page_71(\instantiate_atm_pagers[2].atm_pager|page [7]),
        .page_72(\instantiate_atm_pagers[0].atm_pager|page [7]),
        .page_73(\instantiate_atm_pagers[3].atm_pager|page [7]),
        .Mux0(\z80mem|Mux0~3 ),
        .cend(\dramarb|cend ),
        .rddata_15(\dram|rddata [15]),
        .rddata_6(\dram|rddata [6]),
        .rddata_14(\dram|rddata [14]),
        .rddata_7(\dram|rddata [7]),
        .rddata_1(\dram|rddata [1]),
        .rddata_12(\dram|rddata [12]),
        .rddata_9(\dram|rddata [9]),
        .rddata_4(\dram|rddata [4]),
        .rddata_5(\dram|rddata [5]),
        .rddata_13(\dram|rddata [13]),
        .rddata_2(\dram|rddata [2]),
        .rddata_10(\dram|rddata [10]),
        .rddata_3(\dram|rddata [3]),
        .rddata_11(\dram|rddata [11]),
        .rddata_0(\dram|rddata [0]),
        .rddata_8(\dram|rddata [8]),
        .cpu_strobe(\dramarb|cpu_strobe ),
        .zd_out_0(\z80mem|zd_out [0]),
        .zd_out_1(\z80mem|zd_out [1]),
        .zd_out_2(\z80mem|zd_out [2]),
        .zd_out_3(\z80mem|zd_out [3]),
        .zd_out_4(\z80mem|zd_out [4]),
        .zd_out_5(\z80mem|zd_out [5]),
        .zd_out_6(\z80mem|zd_out [6]),
        .zd_out_7(\z80mem|zd_out [7]),
        .a_14(\a~dataout [14]),
        .a_15(\a~dataout [15]),
        .rd_n(\rd_n~dataout ),
        .mreq_n(\mreq_n~dataout ),
        .wr_n(\wr_n~dataout ),
        .a_0(\a~dataout [0]),
        .fclk(\fclk~dataout ),
        .rfsh_n(\rfsh_n~dataout ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

dram dram_1(
        .rst_out_n(\myrst|rst_out_n ),
        .Mux6(\z80mem|Mux6~3 ),
        .Mux5(\z80mem|Mux5~10 ),
        .Mux4(\z80mem|Mux4~3 ),
        .Mux3(\z80mem|Mux3~3 ),
        .ra_0(\dram|ra [0]),
        .ra_1(\dram|ra [1]),
        .ra_2(\dram|ra [2]),
        .ra_3(\dram|ra [3]),
        .ra_4(\dram|ra [4]),
        .ra_5(\dram|ra [5]),
        .ra_6(\dram|ra [6]),
        .ra_7(\dram|ra [7]),
        .ra_8(\dram|ra [8]),
        .ra_9(\dram|ra [9]),
        .rwe_n(\dram|rwe_n~COMB ),
        .rucas_n(\dram|rucas_n~COMB ),
        .rlcas_n(\dram|rlcas_n~COMB ),
        .rras0_n(\dram|rras0_n~COMB ),
        .rras1_n(\dram|rras1_n~COMB ),
        .cpu_rnw(\z80mem|cpu_rnw~38 ),
        .cpu_req(\z80mem|cpu_req ),
        .Equal2(\dramarb|Equal2~38 ),
        .next_cycle_0(\dramarb|next_cycle[0]~256 ),
        .Selector1(\dram|Selector1~73 ),
        .next_cycle_1(\dramarb|next_cycle[1]~258 ),
        .cbeg(\dram|cbeg ),
        .q_1(\fecher|hcnt_rtl_11|wysi_counter|q [1]),
        .q_2(\fecher|hcnt_rtl_11|wysi_counter|q [2]),
        .q_3(\fecher|hcnt_rtl_11|wysi_counter|q [3]),
        .q_31(\fecher|vcnt_rtl_10|wysi_counter|q [3]),
        .p7ffd_int_3(\zports|p7ffd_int [3]),
        .q_4(\fecher|vcnt_rtl_10|wysi_counter|q [4]),
        .q_5(\fecher|vcnt_rtl_10|wysi_counter|q [5]),
        .q_0(\fecher|hcnt_rtl_11|wysi_counter|q [0]),
        .int_wrdata_0(\dram|int_wrdata [0]),
        .int_wrdata_1(\dram|int_wrdata [1]),
        .int_wrdata_2(\dram|int_wrdata [2]),
        .int_wrdata_3(\dram|int_wrdata [3]),
        .int_wrdata_4(\dram|int_wrdata [4]),
        .int_wrdata_5(\dram|int_wrdata [5]),
        .int_wrdata_6(\dram|int_wrdata [6]),
        .int_wrdata_7(\dram|int_wrdata [7]),
        .next_cycle_01(\dramarb|next_cycle[0]~259 ),
        .dram_addr_11(\dramarb|dram_addr[11]~2017 ),
        .dram_addr_12(\dramarb|dram_addr[12]~2018 ),
        .dram_addr_13(\dramarb|dram_addr[13]~2019 ),
        .Mux2(\z80mem|Mux2~3 ),
        .dram_addr_9(\dramarb|dram_addr[9]~2026 ),
        .Mux1(\z80mem|Mux1~3 ),
        .dram_addr_10(\dramarb|dram_addr[10]~2027 ),
        .Mux0(\z80mem|Mux0~3 ),
        .rddata_15(\dram|rddata [15]),
        .rddata_6(\dram|rddata [6]),
        .rddata_14(\dram|rddata [14]),
        .rddata_7(\dram|rddata [7]),
        .rddata_1(\dram|rddata [1]),
        .rddata_12(\dram|rddata [12]),
        .rddata_9(\dram|rddata [9]),
        .rddata_4(\dram|rddata [4]),
        .rddata_5(\dram|rddata [5]),
        .rddata_13(\dram|rddata [13]),
        .rddata_2(\dram|rddata [2]),
        .rddata_10(\dram|rddata [10]),
        .rddata_3(\dram|rddata [3]),
        .rddata_11(\dram|rddata [11]),
        .rddata_0(\dram|rddata [0]),
        .rddata_8(\dram|rddata [8]),
        .dram_addr_7(\dramarb|dram_addr[7]~2032 ),
        .dram_addr_8(\dramarb|dram_addr[8]~2033 ),
        .a_3(\a~dataout [3]),
        .a_4(\a~dataout [4]),
        .a_0(\a~dataout [0]),
        .a_1(\a~dataout [1]),
        .a_2(\a~dataout [2]),
        .a_6(\a~dataout [6]),
        .a_5(\a~dataout [5]),
        .a_7(\a~dataout [7]),
        .clk(\fclk~dataout ),
        .a_8(\a~dataout [8]),
        .a_11(\a~dataout [11]),
        .a_12(\a~dataout [12]),
        .a_13(\a~dataout [13]),
        .a_10(\a~dataout [10]),
        .a_9(\a~dataout [9]),
        .rucas_n1(\dram|rucas_n ),
        .rlcas_n1(\dram|rlcas_n ),
        .rras0_n1(\dram|rras0_n ),
        .rras1_n1(\dram|rras1_n ),
        .d_0(\d[0]~7 ),
        .d_1(\d[1]~6 ),
        .d_2(\d[2]~5 ),
        .d_3(\d[3]~4 ),
        .d_4(\d[4]~3 ),
        .d_5(\d[5]~2 ),
        .d_6(\d[6]~1 ),
        .d_7(\d[7]~0 ),
        .rd_0(\rd[0]~15 ),
        .rd_1(\rd[1]~14 ),
        .rd_2(\rd[2]~13 ),
        .rd_3(\rd[3]~12 ),
        .rd_4(\rd[4]~11 ),
        .rd_5(\rd[5]~10 ),
        .rd_6(\rd[6]~9 ),
        .rd_7(\rd[7]~8 ),
        .rd_8(\rd[8]~7 ),
        .rd_9(\rd[9]~6 ),
        .rd_10(\rd[10]~5 ),
        .rd_11(\rd[11]~4 ),
        .rd_12(\rd[12]~3 ),
        .rd_13(\rd[13]~2 ),
        .rd_14(\rd[14]~1 ),
        .rd_15(\rd[15]~0 ),
        .int_wrdata_01(\dram|int_wrdata[0]~24 ),
        .int_wrdata_11(\dram|int_wrdata[1]~25 ),
        .int_wrdata_21(\dram|int_wrdata[2]~26 ),
        .int_wrdata_31(\dram|int_wrdata[3]~27 ),
        .int_wrdata_41(\dram|int_wrdata[4]~28 ),
        .int_wrdata_51(\dram|int_wrdata[5]~29 ),
        .int_wrdata_61(\dram|int_wrdata[6]~30 ),
        .int_wrdata_71(\dram|int_wrdata[7]~31 ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

arbiter dramarb(
        .Mux7(\z80mem|Mux7~3 ),
        .cpu_rnw(\z80mem|cpu_rnw~38 ),
        .cpu_req(\z80mem|cpu_req ),
        .Equal2(\dramarb|Equal2~38 ),
        .next_cycle_0(\dramarb|next_cycle[0]~256 ),
        .Selector1(\dram|Selector1~73 ),
        .go(\fecher|go ),
        .next_cycle_1(\dramarb|next_cycle[1]~258 ),
        .peff7_int_0(\zports|peff7_int [0]),
        .cbeg(\dram|cbeg ),
        .pre_cend(\dramarb|pre_cend ),
        .dcnt_0(\fecher|dcnt [0]),
        .video_next(\dramarb|video_next ),
        .dcnt_1(\fecher|dcnt [1]),
        .next_cycle_01(\dramarb|next_cycle[0]~259 ),
        .q_7(\fecher|vcnt_rtl_10|wysi_counter|q [7]),
        .peff7_int_5(\zports|peff7_int [5]),
        .dram_addr_11(\dramarb|dram_addr[11]~2017 ),
        .dram_addr_12(\dramarb|dram_addr[12]~2018 ),
        .dram_addr_13(\dramarb|dram_addr[13]~2019 ),
        .q_2(\fecher|vcnt_rtl_10|wysi_counter|q [2]),
        .dram_addr_9(\dramarb|dram_addr[9]~2026 ),
        .q_6(\fecher|vcnt_rtl_10|wysi_counter|q [6]),
        .dram_addr_10(\dramarb|dram_addr[10]~2027 ),
        .cend(\dramarb|cend ),
        .video_strobe(\dramarb|video_strobe ),
        .cpu_strobe(\dramarb|cpu_strobe ),
        .q_1(\fecher|vcnt_rtl_10|wysi_counter|q [1]),
        .q_0(\fecher|vcnt_rtl_10|wysi_counter|q [0]),
        .dram_addr_7(\dramarb|dram_addr[7]~2032 ),
        .dram_addr_8(\dramarb|dram_addr[8]~2033 ),
        .clk(\fclk~dataout ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

synch horiz_sync(
        .hpix(\horiz_sync|hpix ),
        .hblank(\horiz_sync|hblank ),
        .hsync(\horiz_sync|hsync ),
        .pre_cend(\dramarb|pre_cend ),
        .line_start(\horiz_sync|line_start ),
        .cend(\dramarb|cend ),
        .hsync_start(\horiz_sync|hsync_start ),
        .hint_start(\horiz_sync|hint_start ),
        .clk(\fclk~dataout ),
        .line_start1(\horiz_sync|line_start~_wirecell ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

syncv vert_sync(
        .vpix(\vert_sync|vpix ),
        .vblank(\vert_sync|vblank ),
        .vsync(\vert_sync|vsync ),
        .int_start(\vert_sync|int_start ),
        .line_start(\horiz_sync|line_start ),
        .hsync_start(\horiz_sync|hsync_start ),
        .hint_start(\horiz_sync|hint_start ),
        .clk(\fclk~dataout ),
        .int_start1(\vert_sync|int_start~_wirecell ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

vga_synch vga_synch_1(
        .vga_hsync(\vga_synch|vga_hsync ),
        .scanout_start(\vga_synch|scanout_start ),
        .hsync_start(\horiz_sync|hsync_start ),
        .clk(\fclk~dataout ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

fetch fecher(
        .go(\fecher|go ),
        .vpix(\vert_sync|vpix ),
        .Mux10(\fecher|Mux10~30 ),
        .zxcolor_3(\fecher|zxcolor[3]~196 ),
        .peff7_int_0(\zports|peff7_int [0]),
        .Mux15(\fecher|Mux15~30 ),
        .zxcolor(\fecher|zxcolor~199 ),
        .zxcolor_1(\fecher|zxcolor[1]~200 ),
        .Mux14(\fecher|Mux14~30 ),
        .zxcolor1(\fecher|zxcolor~202 ),
        .zxcolor_2(\fecher|zxcolor[2]~203 ),
        .Mux16(\fecher|Mux16~30 ),
        .zxcolor2(\fecher|zxcolor~205 ),
        .zxcolor_0(\fecher|zxcolor[0]~206 ),
        .q_1(\fecher|hcnt_rtl_11|wysi_counter|q [1]),
        .q_2(\fecher|hcnt_rtl_11|wysi_counter|q [2]),
        .q_3(\fecher|hcnt_rtl_11|wysi_counter|q [3]),
        .q_31(\fecher|vcnt_rtl_10|wysi_counter|q [3]),
        .q_4(\fecher|vcnt_rtl_10|wysi_counter|q [4]),
        .q_5(\fecher|vcnt_rtl_10|wysi_counter|q [5]),
        .q_0(\fecher|hcnt_rtl_11|wysi_counter|q [0]),
        .int_start(\vert_sync|int_start ),
        .dcnt_0(\fecher|dcnt [0]),
        .video_next(\dramarb|video_next ),
        .dcnt_1(\fecher|dcnt [1]),
        .line_start(\horiz_sync|line_start ),
        .q_7(\fecher|vcnt_rtl_10|wysi_counter|q [7]),
        .q_21(\fecher|vcnt_rtl_10|wysi_counter|q [2]),
        .q_6(\fecher|vcnt_rtl_10|wysi_counter|q [6]),
        .cend(\dramarb|cend ),
        .rddata_15(\dram|rddata [15]),
        .video_strobe(\dramarb|video_strobe ),
        .rddata_6(\dram|rddata [6]),
        .rddata_14(\dram|rddata [14]),
        .rddata_7(\dram|rddata [7]),
        .rddata_1(\dram|rddata [1]),
        .rddata_12(\dram|rddata [12]),
        .rddata_9(\dram|rddata [9]),
        .rddata_4(\dram|rddata [4]),
        .rddata_5(\dram|rddata [5]),
        .rddata_13(\dram|rddata [13]),
        .rddata_2(\dram|rddata [2]),
        .rddata_10(\dram|rddata [10]),
        .rddata_3(\dram|rddata [3]),
        .rddata_11(\dram|rddata [11]),
        .rddata_0(\dram|rddata [0]),
        .rddata_8(\dram|rddata [8]),
        .q_11(\fecher|vcnt_rtl_10|wysi_counter|q [1]),
        .q_01(\fecher|vcnt_rtl_10|wysi_counter|q [0]),
        .clk(\fclk~dataout ),
        .line_start1(\horiz_sync|line_start~_wirecell ),
        .int_start1(\vert_sync|int_start~_wirecell ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

videoout vidia(
        .vred_0(\vidia|vred[0]~COMB ),
        .vred_1(\vidia|vred[1]~COMB ),
        .vgrn_0(\vidia|vgrn[0]~COMB ),
        .vgrn_1(\vidia|vgrn[1]~COMB ),
        .vblu_0(\vidia|vblu[0]~COMB ),
        .vblu_1(\vidia|vblu[1]~COMB ),
        .vhsync(\vidia|vhsync ),
        .vvsync(\vidia|vvsync ),
        .vcsync(\vidia|vcsync ),
        .vpix(\vert_sync|vpix ),
        .hpix(\horiz_sync|hpix ),
        .vblank(\vert_sync|vblank ),
        .hblank(\horiz_sync|hblank ),
        .Mux10(\fecher|Mux10~30 ),
        .zxcolor_3(\fecher|zxcolor[3]~196 ),
        .peff7_int_0(\zports|peff7_int [0]),
        .Mux15(\fecher|Mux15~30 ),
        .zxcolor(\fecher|zxcolor~199 ),
        .cfg0_reg_out_0(\slavespi|cfg0_reg_out [0]),
        .zxcolor_1(\fecher|zxcolor[1]~200 ),
        .border_1(\zports|border [1]),
        .Mux14(\fecher|Mux14~30 ),
        .zxcolor1(\fecher|zxcolor~202 ),
        .border_2(\zports|border [2]),
        .zxcolor_2(\fecher|zxcolor[2]~203 ),
        .Mux16(\fecher|Mux16~30 ),
        .zxcolor2(\fecher|zxcolor~205 ),
        .border_0(\zports|border [0]),
        .zxcolor_0(\fecher|zxcolor[0]~206 ),
        .vga_hsync(\vga_synch|vga_hsync ),
        .hsync(\horiz_sync|hsync ),
        .vsync(\vert_sync|vsync ),
        .line_start(\horiz_sync|line_start ),
        .scanout_start(\vga_synch|scanout_start ),
        .hsync_start(\horiz_sync|hsync_start ),
        .fclk(\fclk~dataout ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

slavespi slavespi_1(
        .shift_out_0(\slavespi|shift_out [0]),
        .waits_1(\zwait|waits [1]),
        .waits_0(\zwait|waits [0]),
        .cfg0_reg_out_1(\slavespi|cfg0_reg_out [1]),
        .spics_n_sync_1(\slavespi|spics_n_sync [1]),
        .spics_n_sync_2(\slavespi|spics_n_sync [2]),
        .genrst(\slavespi|genrst ),
        .cfg0_reg_out_0(\slavespi|cfg0_reg_out [0]),
        .wait_write_0(\zports|wait_write [0]),
        .gluclock_addr_0(\zports|gluclock_addr [0]),
        .comport_addr_0(\zports|comport_addr [0]),
        .sel_waitreg(\slavespi|sel_waitreg~8 ),
        .wait_write_1(\zports|wait_write [1]),
        .gluclock_addr_1(\zports|gluclock_addr [1]),
        .comport_addr_1(\zports|comport_addr [1]),
        .cfg0_reg_out_2(\slavespi|cfg0_reg_out [2]),
        .wait_write_2(\zports|wait_write [2]),
        .gluclock_addr_2(\zports|gluclock_addr [2]),
        .comport_addr_2(\zports|comport_addr [2]),
        .mouse_buf_5(\slavespi|mouse_buf [5]),
        .mus_ystb(\slavespi|mus_ystb ),
        .mus_xstb(\slavespi|mus_xstb ),
        .mus_btnstb(\slavespi|mus_btnstb~12 ),
        .mouse_buf_6(\slavespi|mouse_buf [6]),
        .mouse_buf_7(\slavespi|mouse_buf [7]),
        .wait_write_3(\zports|wait_write [3]),
        .gluclock_addr_3(\zports|gluclock_addr [3]),
        .wait_reg_0(\slavespi|wait_reg [0]),
        .wait_reg_1(\slavespi|wait_reg [1]),
        .wait_reg_2(\slavespi|wait_reg [2]),
        .wait_reg_3(\slavespi|wait_reg [3]),
        .wait_reg_4(\slavespi|wait_reg [4]),
        .wait_reg_5(\slavespi|wait_reg [5]),
        .wait_reg_6(\slavespi|wait_reg [6]),
        .wait_reg_7(\slavespi|wait_reg [7]),
        .wait_write_4(\zports|wait_write [4]),
        .gluclock_addr_4(\zports|gluclock_addr [4]),
        .mouse_buf_0(\slavespi|mouse_buf [0]),
        .kj_stb(\slavespi|kj_stb~12 ),
        .mouse_buf_1(\slavespi|mouse_buf [1]),
        .mouse_buf_2(\slavespi|mouse_buf [2]),
        .mouse_buf_3(\slavespi|mouse_buf [3]),
        .mouse_buf_4(\slavespi|mouse_buf [4]),
        .wait_write_5(\zports|wait_write [5]),
        .gluclock_addr_5(\zports|gluclock_addr [5]),
        .wait_write_6(\zports|wait_write [6]),
        .gluclock_addr_6(\zports|gluclock_addr [6]),
        .kbd_reg_34(\slavespi|kbd_reg [34]),
        .kbd_stb(\slavespi|kbd_stb~30 ),
        .kbd_reg_39(\slavespi|kbd_reg [39]),
        .kbd_reg_33(\slavespi|kbd_reg [33]),
        .kbd_reg_38(\slavespi|kbd_reg [38]),
        .kbd_reg_37(\slavespi|kbd_reg [37]),
        .kbd_reg_32(\slavespi|kbd_reg [32]),
        .kbd_reg_35(\slavespi|kbd_reg [35]),
        .kbd_reg_36(\slavespi|kbd_reg [36]),
        .kbd_reg_26(\slavespi|kbd_reg [26]),
        .kbd_reg_31(\slavespi|kbd_reg [31]),
        .kbd_reg_25(\slavespi|kbd_reg [25]),
        .kbd_reg_30(\slavespi|kbd_reg [30]),
        .kbd_reg_29(\slavespi|kbd_reg [29]),
        .kbd_reg_24(\slavespi|kbd_reg [24]),
        .kbd_reg_27(\slavespi|kbd_reg [27]),
        .kbd_reg_28(\slavespi|kbd_reg [28]),
        .kbd_reg_18(\slavespi|kbd_reg [18]),
        .kbd_reg_23(\slavespi|kbd_reg [23]),
        .kbd_reg_17(\slavespi|kbd_reg [17]),
        .kbd_reg_22(\slavespi|kbd_reg [22]),
        .kbd_reg_21(\slavespi|kbd_reg [21]),
        .kbd_reg_16(\slavespi|kbd_reg [16]),
        .kbd_reg_19(\slavespi|kbd_reg [19]),
        .kbd_reg_20(\slavespi|kbd_reg [20]),
        .kbd_reg_10(\slavespi|kbd_reg [10]),
        .kbd_reg_15(\slavespi|kbd_reg [15]),
        .kbd_reg_9(\slavespi|kbd_reg [9]),
        .kbd_reg_14(\slavespi|kbd_reg [14]),
        .kbd_reg_13(\slavespi|kbd_reg [13]),
        .kbd_reg_8(\slavespi|kbd_reg [8]),
        .kbd_reg_11(\slavespi|kbd_reg [11]),
        .kbd_reg_12(\slavespi|kbd_reg [12]),
        .kbd_reg_2(\slavespi|kbd_reg [2]),
        .kbd_reg_7(\slavespi|kbd_reg [7]),
        .kbd_reg_1(\slavespi|kbd_reg [1]),
        .kbd_reg_6(\slavespi|kbd_reg [6]),
        .kbd_reg_5(\slavespi|kbd_reg [5]),
        .kbd_reg_0(\slavespi|kbd_reg [0]),
        .kbd_reg_3(\slavespi|kbd_reg [3]),
        .kbd_reg_4(\slavespi|kbd_reg [4]),
        .wait_write_7(\zports|wait_write [7]),
        .gluclock_addr_7(\zports|gluclock_addr [7]),
        .wait_rnw(\zports|wait_rnw ),
        .fclk(\fclk~dataout ),
        .spics_n(\spics_n~dataout ),
        .spick(\spick~dataout ),
        .spido(\spido~dataout ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

zkbdmus zkbdmus_1(
        .musy_5(\zkbdmus|musy [5]),
        .musx_5(\zkbdmus|musx [5]),
        .musbtn_5(\zkbdmus|musbtn [5]),
        .musy_6(\zkbdmus|musy [6]),
        .musx_6(\zkbdmus|musx [6]),
        .musbtn_6(\zkbdmus|musbtn [6]),
        .musy_7(\zkbdmus|musy [7]),
        .musx_7(\zkbdmus|musx [7]),
        .musbtn_7(\zkbdmus|musbtn [7]),
        .mouse_buf_5(\slavespi|mouse_buf [5]),
        .mus_ystb(\slavespi|mus_ystb ),
        .mus_xstb(\slavespi|mus_xstb ),
        .mus_btnstb(\slavespi|mus_btnstb~12 ),
        .mouse_buf_6(\slavespi|mouse_buf [6]),
        .mouse_buf_7(\slavespi|mouse_buf [7]),
        .musy_0(\zkbdmus|musy [0]),
        .musx_0(\zkbdmus|musx [0]),
        .musbtn_0(\zkbdmus|musbtn [0]),
        .kj_data_0(\zkbdmus|kj_data [0]),
        .musy_1(\zkbdmus|musy [1]),
        .musx_1(\zkbdmus|musx [1]),
        .musbtn_1(\zkbdmus|musbtn [1]),
        .kj_data_1(\zkbdmus|kj_data [1]),
        .musy_2(\zkbdmus|musy [2]),
        .musx_2(\zkbdmus|musx [2]),
        .musbtn_2(\zkbdmus|musbtn [2]),
        .kj_data_2(\zkbdmus|kj_data [2]),
        .musy_3(\zkbdmus|musy [3]),
        .musx_3(\zkbdmus|musx [3]),
        .musbtn_3(\zkbdmus|musbtn [3]),
        .kj_data_3(\zkbdmus|kj_data [3]),
        .musy_4(\zkbdmus|musy [4]),
        .musx_4(\zkbdmus|musx [4]),
        .musbtn_4(\zkbdmus|musbtn [4]),
        .kj_data_4(\zkbdmus|kj_data [4]),
        .mouse_buf_0(\slavespi|mouse_buf [0]),
        .kj_stb(\slavespi|kj_stb~12 ),
        .mouse_buf_1(\slavespi|mouse_buf [1]),
        .mouse_buf_2(\slavespi|mouse_buf [2]),
        .mouse_buf_3(\slavespi|mouse_buf [3]),
        .mouse_buf_4(\slavespi|mouse_buf [4]),
        .kbd_34(\zkbdmus|kbd [34]),
        .kbd_39(\zkbdmus|kbd [39]),
        .kbd_33(\zkbdmus|kbd [33]),
        .kbd_38(\zkbdmus|kbd [38]),
        .kbd_37(\zkbdmus|kbd [37]),
        .kbd_32(\zkbdmus|kbd [32]),
        .kbd_35(\zkbdmus|kbd [35]),
        .kbd_36(\zkbdmus|kbd [36]),
        .kbd_26(\zkbdmus|kbd [26]),
        .kbd_31(\zkbdmus|kbd [31]),
        .kbd_25(\zkbdmus|kbd [25]),
        .kbd_30(\zkbdmus|kbd [30]),
        .kbd_29(\zkbdmus|kbd [29]),
        .kbd_24(\zkbdmus|kbd [24]),
        .kbd_27(\zkbdmus|kbd [27]),
        .kbd_28(\zkbdmus|kbd [28]),
        .kbd_18(\zkbdmus|kbd [18]),
        .kbd_23(\zkbdmus|kbd [23]),
        .kbd_17(\zkbdmus|kbd [17]),
        .kbd_22(\zkbdmus|kbd [22]),
        .kbd_21(\zkbdmus|kbd [21]),
        .kbd_16(\zkbdmus|kbd [16]),
        .kbd_19(\zkbdmus|kbd [19]),
        .kbd_20(\zkbdmus|kbd [20]),
        .kbd_10(\zkbdmus|kbd [10]),
        .kbd_15(\zkbdmus|kbd [15]),
        .kbd_9(\zkbdmus|kbd [9]),
        .kbd_14(\zkbdmus|kbd [14]),
        .kbd_13(\zkbdmus|kbd [13]),
        .kbd_8(\zkbdmus|kbd [8]),
        .kbd_11(\zkbdmus|kbd [11]),
        .kbd_12(\zkbdmus|kbd [12]),
        .kbd_2(\zkbdmus|kbd [2]),
        .kbd_7(\zkbdmus|kbd [7]),
        .kbd_1(\zkbdmus|kbd [1]),
        .kbd_6(\zkbdmus|kbd [6]),
        .kbd_5(\zkbdmus|kbd [5]),
        .kbd_0(\zkbdmus|kbd [0]),
        .kbd_3(\zkbdmus|kbd [3]),
        .kbd_4(\zkbdmus|kbd [4]),
        .kbd_reg_34(\slavespi|kbd_reg [34]),
        .kbd_stb(\slavespi|kbd_stb~30 ),
        .kbd_reg_39(\slavespi|kbd_reg [39]),
        .kbd_reg_33(\slavespi|kbd_reg [33]),
        .kbd_reg_38(\slavespi|kbd_reg [38]),
        .kbd_reg_37(\slavespi|kbd_reg [37]),
        .kbd_reg_32(\slavespi|kbd_reg [32]),
        .kbd_reg_35(\slavespi|kbd_reg [35]),
        .kbd_reg_36(\slavespi|kbd_reg [36]),
        .kbd_reg_26(\slavespi|kbd_reg [26]),
        .kbd_reg_31(\slavespi|kbd_reg [31]),
        .kbd_reg_25(\slavespi|kbd_reg [25]),
        .kbd_reg_30(\slavespi|kbd_reg [30]),
        .kbd_reg_29(\slavespi|kbd_reg [29]),
        .kbd_reg_24(\slavespi|kbd_reg [24]),
        .kbd_reg_27(\slavespi|kbd_reg [27]),
        .kbd_reg_28(\slavespi|kbd_reg [28]),
        .kbd_reg_18(\slavespi|kbd_reg [18]),
        .kbd_reg_23(\slavespi|kbd_reg [23]),
        .kbd_reg_17(\slavespi|kbd_reg [17]),
        .kbd_reg_22(\slavespi|kbd_reg [22]),
        .kbd_reg_21(\slavespi|kbd_reg [21]),
        .kbd_reg_16(\slavespi|kbd_reg [16]),
        .kbd_reg_19(\slavespi|kbd_reg [19]),
        .kbd_reg_20(\slavespi|kbd_reg [20]),
        .kbd_reg_10(\slavespi|kbd_reg [10]),
        .kbd_reg_15(\slavespi|kbd_reg [15]),
        .kbd_reg_9(\slavespi|kbd_reg [9]),
        .kbd_reg_14(\slavespi|kbd_reg [14]),
        .kbd_reg_13(\slavespi|kbd_reg [13]),
        .kbd_reg_8(\slavespi|kbd_reg [8]),
        .kbd_reg_11(\slavespi|kbd_reg [11]),
        .kbd_reg_12(\slavespi|kbd_reg [12]),
        .kbd_reg_2(\slavespi|kbd_reg [2]),
        .kbd_reg_7(\slavespi|kbd_reg [7]),
        .kbd_reg_1(\slavespi|kbd_reg [1]),
        .kbd_reg_6(\slavespi|kbd_reg [6]),
        .kbd_reg_5(\slavespi|kbd_reg [5]),
        .kbd_reg_0(\slavespi|kbd_reg [0]),
        .kbd_reg_3(\slavespi|kbd_reg [3]),
        .kbd_reg_4(\slavespi|kbd_reg [4]),
        .fclk(\fclk~dataout ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

zports zports_1(
        .rst_n(\myrst|rst_out_n ),
        .romrw_en_reg(\zports|romrw_en_reg ),
        .dos(\zdos|dos ),
        .always0(\zports|always0~81 ),
        .porthit(\zports|porthit~584 ),
        .ay_bdir(\zports|ay_bdir ),
        .ay_bc1(\zports|ay_bc1~38 ),
        .beep(\zports|beep ),
        .ide_rd_n(\zports|ide_rd_n~64 ),
        .ide_cs0_n(\zports|ide_cs0_n ),
        .ide_cs1_n(\zports|ide_cs1_n ),
        .ide_wr_n(\zports|ide_wr_n~73 ),
        .vg_cs_n(\zports|vg_cs_n ),
        .sdcs_n(\zports|sdcs_n ),
        .zpos(\zclock|zpos ),
        .p7ffd_int_4(\zports|p7ffd_int [4]),
        .atm_pen(\zports|atm_pen ),
        .peff7_int_3(\zports|peff7_int [3]),
        .p7ffd_int_0(\zports|p7ffd_int [0]),
        .p7ffd_int_1(\zports|p7ffd_int [1]),
        .p7ffd_int_2(\zports|p7ffd_int [2]),
        .p7ffd_int_5(\zports|p7ffd_int [5]),
        .peff7_int_2(\zports|peff7_int [2]),
        .p7ffd_int_6(\zports|p7ffd_int [6]),
        .atm_cpm_n(\zports|atm_cpm_n ),
        .peff7_int_0(\zports|peff7_int [0]),
        .border_1(\zports|border [1]),
        .border_2(\zports|border [2]),
        .border_0(\zports|border [0]),
        .port_wr(\zports|port_wr ),
        .vg_wrFF(\zports|vg_wrFF ),
        .sd_stgl_2(\zports|sd_stgl [2]),
        .sd_stgl_1(\zports|sd_stgl [1]),
        .sd_start(\zports|sd_start ),
        .wait_write_0(\zports|wait_write [0]),
        .gluclock_addr_0(\zports|gluclock_addr [0]),
        .comport_addr_0(\zports|comport_addr [0]),
        .wait_start_comport(\zports|wait_start_comport~22 ),
        .wait_start_gluclock(\zports|wait_start_gluclock~58 ),
        .atmF7_wr_fclk(\zports|atmF7_wr_fclk ),
        .pre_bc1(\zports|pre_bc1~13 ),
        .p7ffd_int_3(\zports|p7ffd_int [3]),
        .wait_write_1(\zports|wait_write [1]),
        .gluclock_addr_1(\zports|gluclock_addr [1]),
        .comport_addr_1(\zports|comport_addr [1]),
        .Selector7(\zports|Selector7~1858 ),
        .musy_5(\zkbdmus|musy [5]),
        .musx_5(\zkbdmus|musx [5]),
        .musbtn_5(\zkbdmus|musbtn [5]),
        .Selector2(\zports|Selector2~1452 ),
        .drq_sync_1(\vgshka|drq_sync [1]),
        .cfg0_reg_out_2(\slavespi|cfg0_reg_out [2]),
        .musy_6(\zkbdmus|musy [6]),
        .musx_6(\zkbdmus|musx [6]),
        .musbtn_6(\zkbdmus|musbtn [6]),
        .Selector1(\zports|Selector1~1384 ),
        .intrq_sync_1(\vgshka|intrq_sync [1]),
        .musy_7(\zkbdmus|musy [7]),
        .musx_7(\zkbdmus|musx [7]),
        .musbtn_7(\zkbdmus|musbtn [7]),
        .Selector0(\zports|Selector0~1454 ),
        .ideout_0(\zports|ideout[0]~64 ),
        .ideout_1(\zports|ideout[1]~65 ),
        .ideout_2(\zports|ideout[2]~66 ),
        .ideout_3(\zports|ideout[3]~67 ),
        .ideout_4(\zports|ideout[4]~68 ),
        .ideout_5(\zports|ideout[5]~69 ),
        .ideout_6(\zports|ideout[6]~70 ),
        .ideout_7(\zports|ideout[7]~71 ),
        .ideout_8(\zports|ideout[8]~72 ),
        .ideout_9(\zports|ideout[9]~73 ),
        .ideout_10(\zports|ideout[10]~74 ),
        .ideout_11(\zports|ideout[11]~75 ),
        .ideout_12(\zports|ideout[12]~76 ),
        .ideout_13(\zports|ideout[13]~77 ),
        .ideout_14(\zports|ideout[14]~78 ),
        .ideout_15(\zports|ideout[15]~79 ),
        .peff7_int_4(\zports|peff7_int [4]),
        .peff7_int_5(\zports|peff7_int [5]),
        .wait_write_2(\zports|wait_write [2]),
        .gluclock_addr_2(\zports|gluclock_addr [2]),
        .comport_addr_2(\zports|comport_addr [2]),
        .p7ffd_int_7(\zports|p7ffd_int [7]),
        .wait_write_3(\zports|wait_write [3]),
        .gluclock_addr_3(\zports|gluclock_addr [3]),
        .wait_reg_0(\slavespi|wait_reg [0]),
        .Selector01(\zports|Selector0~1469 ),
        .dataout(\zports|dataout~113 ),
        .dout_0(\zspi|dout [0]),
        .Selector71(\zports|Selector7~1898 ),
        .musy_0(\zkbdmus|musy [0]),
        .musx_0(\zkbdmus|musx [0]),
        .musbtn_0(\zkbdmus|musbtn [0]),
        .kj_data_0(\zkbdmus|kj_data [0]),
        .Selector72(\zports|Selector7~1899 ),
        .wait_reg_1(\slavespi|wait_reg [1]),
        .dout_1(\zspi|dout [1]),
        .Selector6(\zports|Selector6~1408 ),
        .musy_1(\zkbdmus|musy [1]),
        .musx_1(\zkbdmus|musx [1]),
        .musbtn_1(\zkbdmus|musbtn [1]),
        .kj_data_1(\zkbdmus|kj_data [1]),
        .Selector61(\zports|Selector6~1409 ),
        .wait_reg_2(\slavespi|wait_reg [2]),
        .dout_2(\zspi|dout [2]),
        .Selector5(\zports|Selector5~1408 ),
        .musy_2(\zkbdmus|musy [2]),
        .musx_2(\zkbdmus|musx [2]),
        .musbtn_2(\zkbdmus|musbtn [2]),
        .kj_data_2(\zkbdmus|kj_data [2]),
        .Selector51(\zports|Selector5~1409 ),
        .wait_reg_3(\slavespi|wait_reg [3]),
        .dout_3(\zspi|dout [3]),
        .Selector4(\zports|Selector4~1408 ),
        .musy_3(\zkbdmus|musy [3]),
        .musx_3(\zkbdmus|musx [3]),
        .musbtn_3(\zkbdmus|musbtn [3]),
        .kj_data_3(\zkbdmus|kj_data [3]),
        .Selector41(\zports|Selector4~1409 ),
        .wait_reg_4(\slavespi|wait_reg [4]),
        .dout_4(\zspi|dout [4]),
        .Selector3(\zports|Selector3~1408 ),
        .musy_4(\zkbdmus|musy [4]),
        .musx_4(\zkbdmus|musx [4]),
        .musbtn_4(\zkbdmus|musbtn [4]),
        .kj_data_4(\zkbdmus|kj_data [4]),
        .Selector31(\zports|Selector3~1409 ),
        .wait_reg_5(\slavespi|wait_reg [5]),
        .dout_5(\zspi|dout [5]),
        .Selector21(\zports|Selector2~1468 ),
        .wait_reg_6(\slavespi|wait_reg [6]),
        .dout_6(\zspi|dout [6]),
        .Selector11(\zports|Selector1~1400 ),
        .wait_reg_7(\slavespi|wait_reg [7]),
        .dout_7(\zspi|dout [7]),
        .Selector02(\zports|Selector0~1470 ),
        .wait_write_4(\zports|wait_write [4]),
        .gluclock_addr_4(\zports|gluclock_addr [4]),
        .wait_write_5(\zports|wait_write [5]),
        .gluclock_addr_5(\zports|gluclock_addr [5]),
        .kbd_34(\zkbdmus|kbd [34]),
        .kbd_39(\zkbdmus|kbd [39]),
        .kbd_33(\zkbdmus|kbd [33]),
        .kbd_38(\zkbdmus|kbd [38]),
        .kbd_37(\zkbdmus|kbd [37]),
        .kbd_32(\zkbdmus|kbd [32]),
        .kbd_35(\zkbdmus|kbd [35]),
        .kbd_36(\zkbdmus|kbd [36]),
        .kbd_26(\zkbdmus|kbd [26]),
        .kbd_31(\zkbdmus|kbd [31]),
        .kbd_25(\zkbdmus|kbd [25]),
        .kbd_30(\zkbdmus|kbd [30]),
        .kbd_29(\zkbdmus|kbd [29]),
        .kbd_24(\zkbdmus|kbd [24]),
        .kbd_27(\zkbdmus|kbd [27]),
        .kbd_28(\zkbdmus|kbd [28]),
        .kbd_18(\zkbdmus|kbd [18]),
        .kbd_23(\zkbdmus|kbd [23]),
        .kbd_17(\zkbdmus|kbd [17]),
        .kbd_22(\zkbdmus|kbd [22]),
        .kbd_21(\zkbdmus|kbd [21]),
        .kbd_16(\zkbdmus|kbd [16]),
        .kbd_19(\zkbdmus|kbd [19]),
        .kbd_20(\zkbdmus|kbd [20]),
        .kbd_10(\zkbdmus|kbd [10]),
        .kbd_15(\zkbdmus|kbd [15]),
        .kbd_9(\zkbdmus|kbd [9]),
        .kbd_14(\zkbdmus|kbd [14]),
        .kbd_13(\zkbdmus|kbd [13]),
        .kbd_8(\zkbdmus|kbd [8]),
        .kbd_11(\zkbdmus|kbd [11]),
        .kbd_12(\zkbdmus|kbd [12]),
        .kbd_2(\zkbdmus|kbd [2]),
        .kbd_7(\zkbdmus|kbd [7]),
        .kbd_1(\zkbdmus|kbd [1]),
        .kbd_6(\zkbdmus|kbd [6]),
        .kbd_5(\zkbdmus|kbd [5]),
        .kbd_0(\zkbdmus|kbd [0]),
        .kbd_3(\zkbdmus|kbd [3]),
        .kbd_4(\zkbdmus|kbd [4]),
        .wait_write_6(\zports|wait_write [6]),
        .gluclock_addr_6(\zports|gluclock_addr [6]),
        .wait_write_7(\zports|wait_write [7]),
        .gluclock_addr_7(\zports|gluclock_addr [7]),
        .wait_rnw(\zports|wait_rnw ),
        .Selector62(\zports|Selector6~1407 ),
        .Selector52(\zports|Selector5~1407 ),
        .Selector42(\zports|Selector4~1407 ),
        .Selector32(\zports|Selector3~1407 ),
        .Selector22(\zports|Selector2~1467 ),
        .Selector12(\zports|Selector1~1399 ),
        .a_14(\a~dataout [14]),
        .a_15(\a~dataout [15]),
        .rd_n(\rd_n~dataout ),
        .wr_n(\wr_n~dataout ),
        .iorq_n(\iorq_n~dataout ),
        .a_3(\a~dataout [3]),
        .a_4(\a~dataout [4]),
        .a_0(\a~dataout [0]),
        .a_1(\a~dataout [1]),
        .a_2(\a~dataout [2]),
        .a_6(\a~dataout [6]),
        .a_5(\a~dataout [5]),
        .a_7(\a~dataout [7]),
        .fclk(\fclk~dataout ),
        .zclk(\clkz_in~dataout ),
        .a_8(\a~dataout [8]),
        .a_11(\a~dataout [11]),
        .a_12(\a~dataout [12]),
        .a_13(\a~dataout [13]),
        .a_10(\a~dataout [10]),
        .a_9(\a~dataout [9]),
        .d_0(\d[0]~7 ),
        .d_1(\d[1]~6 ),
        .d_2(\d[2]~5 ),
        .d_3(\d[3]~4 ),
        .d_4(\d[4]~3 ),
        .d_5(\d[5]~2 ),
        .d_6(\d[6]~1 ),
        .d_7(\d[7]~0 ),
        .ide_d_0(\ide_d[0]~15 ),
        .ide_d_1(\ide_d[1]~14 ),
        .ide_d_2(\ide_d[2]~13 ),
        .ide_d_3(\ide_d[3]~12 ),
        .ide_d_4(\ide_d[4]~11 ),
        .ide_d_5(\ide_d[5]~10 ),
        .ide_d_6(\ide_d[6]~9 ),
        .ide_d_7(\ide_d[7]~8 ),
        .ide_d_8(\ide_d[8]~7 ),
        .ide_d_9(\ide_d[9]~6 ),
        .ide_d_10(\ide_d[10]~5 ),
        .ide_d_11(\ide_d[11]~4 ),
        .ide_d_12(\ide_d[12]~3 ),
        .ide_d_13(\ide_d[13]~2 ),
        .ide_d_14(\ide_d[14]~1 ),
        .ide_d_15(\ide_d[15]~0 ),
        .sd_start1(\zports|sd_start~_wirecell ),
        .ide_rd_n1(\zports|ide_rd_n~66 ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

zint preryv(
        .int_n(\preryv|int_n ),
        .m1_n(\m1_n~9 ),
        .int_start(\vert_sync|int_start ),
        .fclk(\fclk~dataout ),
        .zclk(\clkz_in~dataout ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

zwait zwait_1(
        .rst_out_n(\myrst|rst_out_n ),
        .waits_1(\zwait|waits [1]),
        .waits_0(\zwait|waits [0]),
        .WideNor0(\zwait|WideNor0 ),
        .spics_n_sync_1(\slavespi|spics_n_sync [1]),
        .spics_n_sync_2(\slavespi|spics_n_sync [2]),
        .sel_waitreg(\slavespi|sel_waitreg~8 ),
        .wait_start_comport(\zports|wait_start_comport~22 ),
        .wait_start_gluclock(\zports|wait_start_gluclock~58 ),
        .WideNor01(\zwait|WideNor0~1 ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

vg93 vgshka(
        .rst_n(\myrst|rst_out_n ),
        .always0(\zports|always0~81 ),
        .vgclk_div4_1(\vgshka|vgclk_div4 [1]),
        .vg_res_n(\vgshka|vg_res_n ),
        .vg_hrdy(\vgshka|vg_hrdy ),
        .vg_rclk(\vgshka|vg_rclk ),
        .vg_rawr(\vgshka|vg_rawr ),
        .vg_a_0(\vgshka|vg_a [0]),
        .vg_a_1(\vgshka|vg_a [1]),
        .vg_wrd(\vgshka|vg_wrd ),
        .vg_side(\vgshka|vg_side ),
        .port_wr(\zports|port_wr ),
        .vg_wrFF(\zports|vg_wrFF ),
        .drq_sync_1(\vgshka|drq_sync [1]),
        .intrq_sync_1(\vgshka|intrq_sync [1]),
        .fclk(\fclk~dataout ),
        .zclk(\clkz_in~dataout ),
        .step(\step~dataout ),
        .vg_drq(\vg_drq~dataout ),
        .vg_wd(\vg_wd~dataout ),
        .vg_irq(\vg_irq~dataout ),
        .rdat_b_n(\rdat_b_n~dataout ),
        .vg_sr(\vg_sr~dataout ),
        .vg_sl(\vg_sl~dataout ),
        .vg_tr43(\vg_tr43~dataout ),
        .d_0(\d[0]~7 ),
        .d_1(\d[1]~6 ),
        .d_2(\d[2]~5 ),
        .d_3(\d[3]~4 ),
        .d_4(\d[4]~3 ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

spi2 zspi(
        .shiftout_7(\zspi|shiftout [7]),
        .q_0(\zspi|counter_rtl_1|wysi_counter|q [0]),
        .sd_stgl_2(\zports|sd_stgl [2]),
        .sd_stgl_1(\zports|sd_stgl [1]),
        .sd_start(\zports|sd_start ),
        .dout_0(\zspi|dout [0]),
        .dout_1(\zspi|dout [1]),
        .dout_2(\zspi|dout [2]),
        .dout_3(\zspi|dout [3]),
        .dout_4(\zspi|dout [4]),
        .dout_5(\zspi|dout [5]),
        .dout_6(\zspi|dout [6]),
        .dout_7(\zspi|dout [7]),
        .wr_n(\wr_n~dataout ),
        .clock(\fclk~dataout ),
        .sddi(\sddi~dataout ),
        .d_0(\d[0]~7 ),
        .d_1(\d[1]~6 ),
        .d_2(\d[2]~5 ),
        .d_3(\d[3]~4 ),
        .d_4(\d[4]~3 ),
        .d_5(\d[5]~2 ),
        .d_6(\d[6]~1 ),
        .d_7(\d[7]~0 ),
        .sd_start1(\zports|sd_start~_wirecell ),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

// atom is at PIN_24
flex10ke_io \a[14]~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\a~dataout [14]),
        .padio(a[14]));
// synopsys translate_off
defparam \a[14]~I .feedback_mode = "from_pin";
defparam \a[14]~I .operation_mode = "input";
defparam \a[14]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_19
flex10ke_io \a[15]~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\a~dataout [15]),
        .padio(a[15]));
// synopsys translate_off
defparam \a[15]~I .feedback_mode = "from_pin";
defparam \a[15]~I .operation_mode = "input";
defparam \a[15]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_8
flex10ke_io \mreq_n~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\mreq_n~dataout ),
        .padio(mreq_n));
// synopsys translate_off
defparam \mreq_n~I .feedback_mode = "from_pin";
defparam \mreq_n~I .operation_mode = "input";
defparam \mreq_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_140
flex10ke_io \wr_n~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\wr_n~dataout ),
        .padio(wr_n));
// synopsys translate_off
defparam \wr_n~I .feedback_mode = "from_pin";
defparam \wr_n~I .operation_mode = "input";
defparam \wr_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_44
flex10ke_io \a[0]~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\a~dataout [0]),
        .padio(a[0]));
// synopsys translate_off
defparam \a[0]~I .feedback_mode = "from_pin";
defparam \a[0]~I .operation_mode = "input";
defparam \a[0]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_41
flex10ke_io \a[1]~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\a~dataout [1]),
        .padio(a[1]));
// synopsys translate_off
defparam \a[1]~I .feedback_mode = "from_pin";
defparam \a[1]~I .operation_mode = "input";
defparam \a[1]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_40
flex10ke_io \a[2]~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\a~dataout [2]),
        .padio(a[2]));
// synopsys translate_off
defparam \a[2]~I .feedback_mode = "from_pin";
defparam \a[2]~I .operation_mode = "input";
defparam \a[2]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_78
flex10ke_io \iorqge1~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\iorqge1~dataout ),
        .padio(iorqge1));
// synopsys translate_off
defparam \iorqge1~I .feedback_mode = "from_pin";
defparam \iorqge1~I .operation_mode = "input";
defparam \iorqge1~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_79
flex10ke_io \clkz_in~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\clkz_in~dataout ),
        .padio(clkz_in));
// synopsys translate_off
defparam \clkz_in~I .feedback_mode = "from_pin";
defparam \clkz_in~I .operation_mode = "input";
defparam \clkz_in~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at LC8_A2
flex10ke_lcell \WideOr0~82_I (
// Equation(s):
// \WideOr0~82  = !dos_exec_stb1 & !dos_exec_stb1 & !dos_exec_stb1 & !dos_exec_stb1

        .dataa(\instantiate_atm_pagers[0].atm_pager|dos_exec_stb~123 ),
        .datab(\instantiate_atm_pagers[2].atm_pager|dos_exec_stb~67 ),
        .datac(\instantiate_atm_pagers[1].atm_pager|dos_exec_stb~67 ),
        .datad(\instantiate_atm_pagers[3].atm_pager|dos_exec_stb~67 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\WideOr0~82 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \WideOr0~82_I .clock_enable_mode = "false";
defparam \WideOr0~82_I .lut_mask = "0001";
defparam \WideOr0~82_I .operation_mode = "normal";
defparam \WideOr0~82_I .output_mode = "comb_only";
defparam \WideOr0~82_I .packed_mode = "false";
// synopsys translate_on

// atom is at PIN_147
flex10ke_io \rfsh_n~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rfsh_n~dataout ),
        .padio(rfsh_n));
// synopsys translate_off
defparam \rfsh_n~I .feedback_mode = "from_pin";
defparam \rfsh_n~I .operation_mode = "input";
defparam \rfsh_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_30
flex10ke_io \a[8]~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\a~dataout [8]),
        .padio(a[8]));
// synopsys translate_off
defparam \a[8]~I .feedback_mode = "from_pin";
defparam \a[8]~I .operation_mode = "input";
defparam \a[8]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at LC8_A8
flex10ke_lcell \WideOr0~83_I (
// Equation(s):
// \WideOr0~83  = stall_count_2 # stall_count_2

        .dataa(vcc),
        .datab(vcc),
        .datac(\instantiate_atm_pagers[3].atm_pager|stall_count [2]),
        .datad(\instantiate_atm_pagers[2].atm_pager|stall_count [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\WideOr0~83 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \WideOr0~83_I .clock_enable_mode = "false";
defparam \WideOr0~83_I .lut_mask = "fff0";
defparam \WideOr0~83_I .operation_mode = "normal";
defparam \WideOr0~83_I .output_mode = "comb_only";
defparam \WideOr0~83_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A2
flex10ke_lcell \WideOr0~I (
// Equation(s):
// WideOr0 = \WideOr0~83  # stall_count_2 # stall_count_2 # !\WideOr0~82 

        .dataa(\WideOr0~82 ),
        .datab(\WideOr0~83 ),
        .datac(\instantiate_atm_pagers[1].atm_pager|stall_count [2]),
        .datad(\instantiate_atm_pagers[0].atm_pager|stall_count [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(WideOr0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \WideOr0~I .clock_enable_mode = "false";
defparam \WideOr0~I .lut_mask = "fffd";
defparam \WideOr0~I .operation_mode = "normal";
defparam \WideOr0~I .output_mode = "comb_only";
defparam \WideOr0~I .packed_mode = "false";
// synopsys translate_on

// atom is at PIN_27
flex10ke_io \a[11]~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\a~dataout [11]),
        .padio(a[11]));
// synopsys translate_off
defparam \a[11]~I .feedback_mode = "from_pin";
defparam \a[11]~I .operation_mode = "input";
defparam \a[11]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_26
flex10ke_io \a[12]~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\a~dataout [12]),
        .padio(a[12]));
// synopsys translate_off
defparam \a[12]~I .feedback_mode = "from_pin";
defparam \a[12]~I .operation_mode = "input";
defparam \a[12]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_25
flex10ke_io \a[13]~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\a~dataout [13]),
        .padio(a[13]));
// synopsys translate_off
defparam \a[13]~I .feedback_mode = "from_pin";
defparam \a[13]~I .operation_mode = "input";
defparam \a[13]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_28
flex10ke_io \a[10]~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\a~dataout [10]),
        .padio(a[10]));
// synopsys translate_off
defparam \a[10]~I .feedback_mode = "from_pin";
defparam \a[10]~I .operation_mode = "input";
defparam \a[10]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_29
flex10ke_io \a[9]~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\a~dataout [9]),
        .padio(a[9]));
// synopsys translate_off
defparam \a[9]~I .feedback_mode = "from_pin";
defparam \a[9]~I .operation_mode = "input";
defparam \a[9]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_182
flex10ke_io \spics_n~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\spics_n~dataout ),
        .padio(spics_n));
// synopsys translate_off
defparam \spics_n~I .feedback_mode = "from_pin";
defparam \spics_n~I .operation_mode = "input";
defparam \spics_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_184
flex10ke_io \spick~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\spick~dataout ),
        .padio(spick));
// synopsys translate_off
defparam \spick~I .feedback_mode = "from_pin";
defparam \spick~I .operation_mode = "input";
defparam \spick~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_157
flex10ke_io \spido~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\spido~dataout ),
        .padio(spido));
// synopsys translate_off
defparam \spido~I .feedback_mode = "from_pin";
defparam \spido~I .operation_mode = "input";
defparam \spido~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_46
flex10ke_io \step~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\step~dataout ),
        .padio(step));
// synopsys translate_off
defparam \step~I .feedback_mode = "from_pin";
defparam \step~I .operation_mode = "input";
defparam \step~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_63
flex10ke_io \vg_drq~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\vg_drq~dataout ),
        .padio(vg_drq));
// synopsys translate_off
defparam \vg_drq~I .feedback_mode = "from_pin";
defparam \vg_drq~I .operation_mode = "input";
defparam \vg_drq~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_61
flex10ke_io \vg_wd~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\vg_wd~dataout ),
        .padio(vg_wd));
// synopsys translate_off
defparam \vg_wd~I .feedback_mode = "from_pin";
defparam \vg_wd~I .operation_mode = "input";
defparam \vg_wd~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_64
flex10ke_io \vg_irq~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\vg_irq~dataout ),
        .padio(vg_irq));
// synopsys translate_off
defparam \vg_irq~I .feedback_mode = "from_pin";
defparam \vg_irq~I .operation_mode = "input";
defparam \vg_irq~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_68
flex10ke_io \rdat_b_n~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rdat_b_n~dataout ),
        .padio(rdat_b_n));
// synopsys translate_off
defparam \rdat_b_n~I .feedback_mode = "from_pin";
defparam \rdat_b_n~I .operation_mode = "input";
defparam \rdat_b_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_53
flex10ke_io \vg_sr~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\vg_sr~dataout ),
        .padio(vg_sr));
// synopsys translate_off
defparam \vg_sr~I .feedback_mode = "from_pin";
defparam \vg_sr~I .operation_mode = "input";
defparam \vg_sr~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_47
flex10ke_io \vg_sl~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\vg_sl~dataout ),
        .padio(vg_sl));
// synopsys translate_off
defparam \vg_sl~I .feedback_mode = "from_pin";
defparam \vg_sl~I .operation_mode = "input";
defparam \vg_sl~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_60
flex10ke_io \vg_tr43~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\vg_tr43~dataout ),
        .padio(vg_tr43));
// synopsys translate_off
defparam \vg_tr43~I .feedback_mode = "from_pin";
defparam \vg_tr43~I .operation_mode = "input";
defparam \vg_tr43~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_115
flex10ke_io \sddi~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\sddi~dataout ),
        .padio(sddi));
// synopsys translate_off
defparam \sddi~I .feedback_mode = "from_pin";
defparam \sddi~I .operation_mode = "input";
defparam \sddi~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_187
flex10ke_io \rwe_n~I (
        .datain(\dram|rwe_n~COMB ),
        .clk(\fclk~dataout ),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\dram|rwe_n ),
        .padio(rwe_n));
// synopsys translate_off
defparam \rwe_n~I .feedback_mode = "from_reg";
defparam \rwe_n~I .operation_mode = "output";
defparam \rwe_n~I .reg_source_mode = "data_in_to_pin";
// synopsys translate_on

// atom is at PIN_186
flex10ke_io \rucas_n~I (
        .datain(\dram|rucas_n~COMB ),
        .clk(\fclk~dataout ),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\dram|rucas_n ),
        .padio(rucas_n));
// synopsys translate_off
defparam \rucas_n~I .feedback_mode = "from_reg";
defparam \rucas_n~I .operation_mode = "output";
defparam \rucas_n~I .reg_source_mode = "data_in_to_pin";
// synopsys translate_on

// atom is at PIN_189
flex10ke_io \rlcas_n~I (
        .datain(\dram|rlcas_n~COMB ),
        .clk(\fclk~dataout ),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\dram|rlcas_n ),
        .padio(rlcas_n));
// synopsys translate_off
defparam \rlcas_n~I .feedback_mode = "from_reg";
defparam \rlcas_n~I .operation_mode = "output";
defparam \rlcas_n~I .reg_source_mode = "data_in_to_pin";
// synopsys translate_on

// atom is at PIN_190
flex10ke_io \rras0_n~I (
        .datain(\dram|rras0_n~COMB ),
        .clk(\fclk~dataout ),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\dram|rras0_n ),
        .padio(rras0_n));
// synopsys translate_off
defparam \rras0_n~I .feedback_mode = "from_reg";
defparam \rras0_n~I .operation_mode = "output";
defparam \rras0_n~I .reg_source_mode = "data_in_to_pin";
// synopsys translate_on

// atom is at PIN_168
flex10ke_io \rras1_n~I (
        .datain(\dram|rras1_n~COMB ),
        .clk(\fclk~dataout ),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\dram|rras1_n ),
        .padio(rras1_n));
// synopsys translate_off
defparam \rras1_n~I .feedback_mode = "from_reg";
defparam \rras1_n~I .operation_mode = "output";
defparam \rras1_n~I .reg_source_mode = "data_in_to_pin";
// synopsys translate_on

// atom is at PIN_18
flex10ke_io \d[0]~I (
        .datain(\d~4438 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\d~25 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\d[0]~7 ),
        .padio(d[0]));
// synopsys translate_off
defparam \d[0]~I .feedback_mode = "from_pin";
defparam \d[0]~I .operation_mode = "bidir";
defparam \d[0]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_17
flex10ke_io \d[1]~I (
        .datain(\d~4441 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\d~25 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\d[1]~6 ),
        .padio(d[1]));
// synopsys translate_off
defparam \d[1]~I .feedback_mode = "from_pin";
defparam \d[1]~I .operation_mode = "bidir";
defparam \d[1]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_16
flex10ke_io \d[2]~I (
        .datain(\d~4444 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\d~25 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\d[2]~5 ),
        .padio(d[2]));
// synopsys translate_off
defparam \d[2]~I .feedback_mode = "from_pin";
defparam \d[2]~I .operation_mode = "bidir";
defparam \d[2]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_15
flex10ke_io \d[3]~I (
        .datain(\d~4447 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\d~25 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\d[3]~4 ),
        .padio(d[3]));
// synopsys translate_off
defparam \d[3]~I .feedback_mode = "from_pin";
defparam \d[3]~I .operation_mode = "bidir";
defparam \d[3]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_14
flex10ke_io \d[4]~I (
        .datain(\d~4450 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\d~25 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\d[4]~3 ),
        .padio(d[4]));
// synopsys translate_off
defparam \d[4]~I .feedback_mode = "from_pin";
defparam \d[4]~I .operation_mode = "bidir";
defparam \d[4]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_13
flex10ke_io \d[5]~I (
        .datain(\d~4453 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\d~25 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\d[5]~2 ),
        .padio(d[5]));
// synopsys translate_off
defparam \d[5]~I .feedback_mode = "from_pin";
defparam \d[5]~I .operation_mode = "bidir";
defparam \d[5]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_12
flex10ke_io \d[6]~I (
        .datain(\d~4456 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\d~25 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\d[6]~1 ),
        .padio(d[6]));
// synopsys translate_off
defparam \d[6]~I .feedback_mode = "from_pin";
defparam \d[6]~I .operation_mode = "bidir";
defparam \d[6]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_11
flex10ke_io \d[7]~I (
        .datain(\d~4459 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\d~25 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\d[7]~0 ),
        .padio(d[7]));
// synopsys translate_off
defparam \d[7]~I .feedback_mode = "from_pin";
defparam \d[7]~I .operation_mode = "bidir";
defparam \d[7]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_208
flex10ke_io \rd[0]~I (
        .datain(\dram|int_wrdata [0]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(!\dram|rwe_n ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd[0]~15 ),
        .padio(rd[0]));
// synopsys translate_off
defparam \rd[0]~I .feedback_mode = "from_pin";
defparam \rd[0]~I .operation_mode = "bidir";
defparam \rd[0]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_206
flex10ke_io \rd[1]~I (
        .datain(\dram|int_wrdata [1]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(!\dram|rwe_n ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd[1]~14 ),
        .padio(rd[1]));
// synopsys translate_off
defparam \rd[1]~I .feedback_mode = "from_pin";
defparam \rd[1]~I .operation_mode = "bidir";
defparam \rd[1]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_204
flex10ke_io \rd[2]~I (
        .datain(\dram|int_wrdata [2]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(!\dram|rwe_n ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd[2]~13 ),
        .padio(rd[2]));
// synopsys translate_off
defparam \rd[2]~I .feedback_mode = "from_pin";
defparam \rd[2]~I .operation_mode = "bidir";
defparam \rd[2]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_202
flex10ke_io \rd[3]~I (
        .datain(\dram|int_wrdata [3]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(!\dram|rwe_n ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd[3]~12 ),
        .padio(rd[3]));
// synopsys translate_off
defparam \rd[3]~I .feedback_mode = "from_pin";
defparam \rd[3]~I .operation_mode = "bidir";
defparam \rd[3]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_199
flex10ke_io \rd[4]~I (
        .datain(\dram|int_wrdata [4]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(!\dram|rwe_n ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd[4]~11 ),
        .padio(rd[4]));
// synopsys translate_off
defparam \rd[4]~I .feedback_mode = "from_pin";
defparam \rd[4]~I .operation_mode = "bidir";
defparam \rd[4]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_197
flex10ke_io \rd[5]~I (
        .datain(\dram|int_wrdata [5]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(!\dram|rwe_n ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd[5]~10 ),
        .padio(rd[5]));
// synopsys translate_off
defparam \rd[5]~I .feedback_mode = "from_pin";
defparam \rd[5]~I .operation_mode = "bidir";
defparam \rd[5]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_195
flex10ke_io \rd[6]~I (
        .datain(\dram|int_wrdata [6]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(!\dram|rwe_n ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd[6]~9 ),
        .padio(rd[6]));
// synopsys translate_off
defparam \rd[6]~I .feedback_mode = "from_pin";
defparam \rd[6]~I .operation_mode = "bidir";
defparam \rd[6]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_192
flex10ke_io \rd[7]~I (
        .datain(\dram|int_wrdata [7]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(!\dram|rwe_n ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd[7]~8 ),
        .padio(rd[7]));
// synopsys translate_off
defparam \rd[7]~I .feedback_mode = "from_pin";
defparam \rd[7]~I .operation_mode = "bidir";
defparam \rd[7]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_191
flex10ke_io \rd[8]~I (
        .datain(\dram|int_wrdata[0]~24 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(!\dram|rwe_n ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd[8]~7 ),
        .padio(rd[8]));
// synopsys translate_off
defparam \rd[8]~I .feedback_mode = "from_pin";
defparam \rd[8]~I .operation_mode = "bidir";
defparam \rd[8]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_193
flex10ke_io \rd[9]~I (
        .datain(\dram|int_wrdata[1]~25 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(!\dram|rwe_n ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd[9]~6 ),
        .padio(rd[9]));
// synopsys translate_off
defparam \rd[9]~I .feedback_mode = "from_pin";
defparam \rd[9]~I .operation_mode = "bidir";
defparam \rd[9]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_196
flex10ke_io \rd[10]~I (
        .datain(\dram|int_wrdata[2]~26 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(!\dram|rwe_n ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd[10]~5 ),
        .padio(rd[10]));
// synopsys translate_off
defparam \rd[10]~I .feedback_mode = "from_pin";
defparam \rd[10]~I .operation_mode = "bidir";
defparam \rd[10]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_198
flex10ke_io \rd[11]~I (
        .datain(\dram|int_wrdata[3]~27 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(!\dram|rwe_n ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd[11]~4 ),
        .padio(rd[11]));
// synopsys translate_off
defparam \rd[11]~I .feedback_mode = "from_pin";
defparam \rd[11]~I .operation_mode = "bidir";
defparam \rd[11]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_200
flex10ke_io \rd[12]~I (
        .datain(\dram|int_wrdata[4]~28 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(!\dram|rwe_n ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd[12]~3 ),
        .padio(rd[12]));
// synopsys translate_off
defparam \rd[12]~I .feedback_mode = "from_pin";
defparam \rd[12]~I .operation_mode = "bidir";
defparam \rd[12]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_203
flex10ke_io \rd[13]~I (
        .datain(\dram|int_wrdata[5]~29 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(!\dram|rwe_n ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd[13]~2 ),
        .padio(rd[13]));
// synopsys translate_off
defparam \rd[13]~I .feedback_mode = "from_pin";
defparam \rd[13]~I .operation_mode = "bidir";
defparam \rd[13]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_205
flex10ke_io \rd[14]~I (
        .datain(\dram|int_wrdata[6]~30 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(!\dram|rwe_n ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd[14]~1 ),
        .padio(rd[14]));
// synopsys translate_off
defparam \rd[14]~I .feedback_mode = "from_pin";
defparam \rd[14]~I .operation_mode = "bidir";
defparam \rd[14]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_207
flex10ke_io \rd[15]~I (
        .datain(\dram|int_wrdata[7]~31 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(!\dram|rwe_n ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd[15]~0 ),
        .padio(rd[15]));
// synopsys translate_off
defparam \rd[15]~I .feedback_mode = "from_pin";
defparam \rd[15]~I .operation_mode = "bidir";
defparam \rd[15]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_96
flex10ke_io \ide_d[0]~I (
        .datain(\zports|ideout[0]~64 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\zports|ide_rd_n~64 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\ide_d[0]~15 ),
        .padio(ide_d[0]));
// synopsys translate_off
defparam \ide_d[0]~I .feedback_mode = "from_pin";
defparam \ide_d[0]~I .operation_mode = "bidir";
defparam \ide_d[0]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_94
flex10ke_io \ide_d[1]~I (
        .datain(\zports|ideout[1]~65 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\zports|ide_rd_n~64 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\ide_d[1]~14 ),
        .padio(ide_d[1]));
// synopsys translate_off
defparam \ide_d[1]~I .feedback_mode = "from_pin";
defparam \ide_d[1]~I .operation_mode = "bidir";
defparam \ide_d[1]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_92
flex10ke_io \ide_d[2]~I (
        .datain(\zports|ideout[2]~66 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\zports|ide_rd_n~64 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\ide_d[2]~13 ),
        .padio(ide_d[2]));
// synopsys translate_off
defparam \ide_d[2]~I .feedback_mode = "from_pin";
defparam \ide_d[2]~I .operation_mode = "bidir";
defparam \ide_d[2]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_89
flex10ke_io \ide_d[3]~I (
        .datain(\zports|ideout[3]~67 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\zports|ide_rd_n~64 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\ide_d[3]~12 ),
        .padio(ide_d[3]));
// synopsys translate_off
defparam \ide_d[3]~I .feedback_mode = "from_pin";
defparam \ide_d[3]~I .operation_mode = "bidir";
defparam \ide_d[3]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_87
flex10ke_io \ide_d[4]~I (
        .datain(\zports|ideout[4]~68 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\zports|ide_rd_n~64 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\ide_d[4]~11 ),
        .padio(ide_d[4]));
// synopsys translate_off
defparam \ide_d[4]~I .feedback_mode = "from_pin";
defparam \ide_d[4]~I .operation_mode = "bidir";
defparam \ide_d[4]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_85
flex10ke_io \ide_d[5]~I (
        .datain(\zports|ideout[5]~69 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\zports|ide_rd_n~64 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\ide_d[5]~10 ),
        .padio(ide_d[5]));
// synopsys translate_off
defparam \ide_d[5]~I .feedback_mode = "from_pin";
defparam \ide_d[5]~I .operation_mode = "bidir";
defparam \ide_d[5]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_75
flex10ke_io \ide_d[6]~I (
        .datain(\zports|ideout[6]~70 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\zports|ide_rd_n~64 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\ide_d[6]~9 ),
        .padio(ide_d[6]));
// synopsys translate_off
defparam \ide_d[6]~I .feedback_mode = "from_pin";
defparam \ide_d[6]~I .operation_mode = "bidir";
defparam \ide_d[6]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_73
flex10ke_io \ide_d[7]~I (
        .datain(\zports|ideout[7]~71 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\zports|ide_rd_n~64 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\ide_d[7]~8 ),
        .padio(ide_d[7]));
// synopsys translate_off
defparam \ide_d[7]~I .feedback_mode = "from_pin";
defparam \ide_d[7]~I .operation_mode = "bidir";
defparam \ide_d[7]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_71
flex10ke_io \ide_d[8]~I (
        .datain(\zports|ideout[8]~72 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\zports|ide_rd_n~64 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\ide_d[8]~7 ),
        .padio(ide_d[8]));
// synopsys translate_off
defparam \ide_d[8]~I .feedback_mode = "from_pin";
defparam \ide_d[8]~I .operation_mode = "bidir";
defparam \ide_d[8]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_74
flex10ke_io \ide_d[9]~I (
        .datain(\zports|ideout[9]~73 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\zports|ide_rd_n~64 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\ide_d[9]~6 ),
        .padio(ide_d[9]));
// synopsys translate_off
defparam \ide_d[9]~I .feedback_mode = "from_pin";
defparam \ide_d[9]~I .operation_mode = "bidir";
defparam \ide_d[9]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_83
flex10ke_io \ide_d[10]~I (
        .datain(\zports|ideout[10]~74 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\zports|ide_rd_n~64 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\ide_d[10]~5 ),
        .padio(ide_d[10]));
// synopsys translate_off
defparam \ide_d[10]~I .feedback_mode = "from_pin";
defparam \ide_d[10]~I .operation_mode = "bidir";
defparam \ide_d[10]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_86
flex10ke_io \ide_d[11]~I (
        .datain(\zports|ideout[11]~75 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\zports|ide_rd_n~64 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\ide_d[11]~4 ),
        .padio(ide_d[11]));
// synopsys translate_off
defparam \ide_d[11]~I .feedback_mode = "from_pin";
defparam \ide_d[11]~I .operation_mode = "bidir";
defparam \ide_d[11]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_88
flex10ke_io \ide_d[12]~I (
        .datain(\zports|ideout[12]~76 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\zports|ide_rd_n~64 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\ide_d[12]~3 ),
        .padio(ide_d[12]));
// synopsys translate_off
defparam \ide_d[12]~I .feedback_mode = "from_pin";
defparam \ide_d[12]~I .operation_mode = "bidir";
defparam \ide_d[12]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_90
flex10ke_io \ide_d[13]~I (
        .datain(\zports|ideout[13]~77 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\zports|ide_rd_n~64 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\ide_d[13]~2 ),
        .padio(ide_d[13]));
// synopsys translate_off
defparam \ide_d[13]~I .feedback_mode = "from_pin";
defparam \ide_d[13]~I .operation_mode = "bidir";
defparam \ide_d[13]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_93
flex10ke_io \ide_d[14]~I (
        .datain(\zports|ideout[14]~78 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\zports|ide_rd_n~64 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\ide_d[14]~1 ),
        .padio(ide_d[14]));
// synopsys translate_off
defparam \ide_d[14]~I .feedback_mode = "from_pin";
defparam \ide_d[14]~I .operation_mode = "bidir";
defparam \ide_d[14]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_95
flex10ke_io \ide_d[15]~I (
        .datain(\zports|ideout[15]~79 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(\zports|ide_rd_n~64 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\ide_d[15]~0 ),
        .padio(ide_d[15]));
// synopsys translate_off
defparam \ide_d[15]~I .feedback_mode = "from_pin";
defparam \ide_d[15]~I .operation_mode = "bidir";
defparam \ide_d[15]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_183
flex10ke_io \fclk~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\fclk~dataout ),
        .padio(fclk));
// synopsys translate_off
defparam \fclk~I .feedback_mode = "from_pin";
defparam \fclk~I .operation_mode = "input";
defparam \fclk~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at LC6_E3
flex10ke_lcell \ayclk_gen_rtl_0|wysi_counter|counter_cell[0] (
// Equation(s):
// \ayclk_gen_rtl_0|wysi_counter|counter_cell[0]~COUT  = CARRY()

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(\fclk~dataout ),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\ayclk_gen_rtl_0|wysi_counter|q [0]),
        .cout(\ayclk_gen_rtl_0|wysi_counter|counter_cell[0]~COUT ),
        .cascout());
// synopsys translate_off
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[0] .clock_enable_mode = "false";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[0] .lut_mask = "33aa";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[0] .operation_mode = "up_dn_cntr";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[0] .output_mode = "none";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[0] .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_E3
flex10ke_lcell \ayclk_gen_rtl_0|wysi_counter|counter_cell[1] (
// Equation(s):
// \ayclk_gen_rtl_0|wysi_counter|counter_cell[1]~COUT  = CARRY( & (\ayclk_gen_rtl_0|wysi_counter|counter_cell[0]~COUT ))

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(\fclk~dataout ),
        .cin(\ayclk_gen_rtl_0|wysi_counter|counter_cell[0]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\ayclk_gen_rtl_0|wysi_counter|q [1]),
        .cout(\ayclk_gen_rtl_0|wysi_counter|counter_cell[1]~COUT ),
        .cascout());
// synopsys translate_off
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[1] .cin_used = "true";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[1] .clock_enable_mode = "false";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[1] .lut_mask = "3ca0";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[1] .operation_mode = "up_dn_cntr";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[1] .output_mode = "none";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[1] .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_E3
flex10ke_lcell \ayclk_gen_rtl_0|wysi_counter|counter_cell[2] (
// Equation(s):
// \ayclk_gen_rtl_0|wysi_counter|counter_cell[2]~COUT  = CARRY( & (\ayclk_gen_rtl_0|wysi_counter|counter_cell[1]~COUT ))

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(\fclk~dataout ),
        .cin(\ayclk_gen_rtl_0|wysi_counter|counter_cell[1]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\ayclk_gen_rtl_0|wysi_counter|q [2]),
        .cout(\ayclk_gen_rtl_0|wysi_counter|counter_cell[2]~COUT ),
        .cascout());
// synopsys translate_off
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[2] .cin_used = "true";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[2] .clock_enable_mode = "false";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[2] .lut_mask = "3ca0";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[2] .operation_mode = "up_dn_cntr";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[2] .output_mode = "none";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[2] .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_E5
flex10ke_lcell \ayclk_gen_rtl_0|wysi_counter|counter_cell[3] (
// Equation(s):
// \ayclk_gen_rtl_0|wysi_counter|q [3] = DFFEA(\ayclk_gen_rtl_0|wysi_counter|q [3] $ \ayclk_gen_rtl_0|wysi_counter|counter_cell[2]~COUT , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(\fclk~dataout ),
        .cin(\ayclk_gen_rtl_0|wysi_counter|counter_cell[2]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\ayclk_gen_rtl_0|wysi_counter|q [3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[3] .cin_used = "true";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[3] .clock_enable_mode = "false";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[3] .lut_mask = "3c3c";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[3] .operation_mode = "up_dn_cntr";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[3] .output_mode = "reg_only";
defparam \ayclk_gen_rtl_0|wysi_counter|counter_cell[3] .packed_mode = "false";
// synopsys translate_on

// atom is at PIN_37
flex10ke_io \a[5]~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\a~dataout [5]),
        .padio(a[5]));
// synopsys translate_off
defparam \a[5]~I .feedback_mode = "from_pin";
defparam \a[5]~I .operation_mode = "input";
defparam \a[5]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at LC4_H1
flex10ke_lcell \ide_a[0]~0_I (
// Equation(s):
// \ide_a[0]~0  = \a~dataout [5]

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\a~dataout [5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ide_a[0]~0 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ide_a[0]~0_I .clock_enable_mode = "false";
defparam \ide_a[0]~0_I .lut_mask = "ff00";
defparam \ide_a[0]~0_I .operation_mode = "normal";
defparam \ide_a[0]~0_I .output_mode = "comb_only";
defparam \ide_a[0]~0_I .packed_mode = "false";
// synopsys translate_on

// atom is at PIN_36
flex10ke_io \a[6]~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\a~dataout [6]),
        .padio(a[6]));
// synopsys translate_off
defparam \a[6]~I .feedback_mode = "from_pin";
defparam \a[6]~I .operation_mode = "input";
defparam \a[6]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at LC3_H1
flex10ke_lcell \ide_a[1]~1_I (
// Equation(s):
// \ide_a[1]~1  = \a~dataout [6]

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\a~dataout [6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ide_a[1]~1 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ide_a[1]~1_I .clock_enable_mode = "false";
defparam \ide_a[1]~1_I .lut_mask = "ff00";
defparam \ide_a[1]~1_I .operation_mode = "normal";
defparam \ide_a[1]~1_I .output_mode = "comb_only";
defparam \ide_a[1]~1_I .packed_mode = "false";
// synopsys translate_on

// atom is at PIN_31
flex10ke_io \a[7]~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\a~dataout [7]),
        .padio(a[7]));
// synopsys translate_off
defparam \a[7]~I .feedback_mode = "from_pin";
defparam \a[7]~I .operation_mode = "input";
defparam \a[7]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at LC8_D21
flex10ke_lcell \ide_a[2]~2_I (
// Equation(s):
// \ide_a[2]~2  = \a~dataout [7]

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\a~dataout [7]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ide_a[2]~2 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ide_a[2]~2_I .clock_enable_mode = "false";
defparam \ide_a[2]~2_I .lut_mask = "ff00";
defparam \ide_a[2]~2_I .operation_mode = "normal";
defparam \ide_a[2]~2_I .output_mode = "comb_only";
defparam \ide_a[2]~2_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J8
flex10ke_lcell \ide_dir~0_I (
// Equation(s):
// \ide_dir~0  = ide_rd_n

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\zports|ide_rd_n~64 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ide_dir~0 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ide_dir~0_I .clock_enable_mode = "false";
defparam \ide_dir~0_I .lut_mask = "ff00";
defparam \ide_dir~0_I .operation_mode = "normal";
defparam \ide_dir~0_I .output_mode = "comb_only";
defparam \ide_dir~0_I .packed_mode = "false";
// synopsys translate_on

// atom is at PIN_39
flex10ke_io \a[3]~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\a~dataout [3]),
        .padio(a[3]));
// synopsys translate_off
defparam \a[3]~I .feedback_mode = "from_pin";
defparam \a[3]~I .operation_mode = "input";
defparam \a[3]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_38
flex10ke_io \a[4]~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\a~dataout [4]),
        .padio(a[4]));
// synopsys translate_off
defparam \a[4]~I .feedback_mode = "from_pin";
defparam \a[4]~I .operation_mode = "input";
defparam \a[4]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at LC2_H5
flex10ke_lcell \d~4437_I (
// Equation(s):
// \d~4437  = \a~dataout [4] & (\a~dataout [3] & !Selector72 # !\a~dataout [3] & (!Selector71))

        .dataa(\zports|Selector7~1899 ),
        .datab(\zports|Selector7~1898 ),
        .datac(\a~dataout [3]),
        .datad(\a~dataout [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4437 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4437_I .clock_enable_mode = "false";
defparam \d~4437_I .lut_mask = "5300";
defparam \d~4437_I .operation_mode = "normal";
defparam \d~4437_I .output_mode = "comb_only";
defparam \d~4437_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H5
flex10ke_lcell \d~4436_I (
// Equation(s):
// \d~4436  = !\a~dataout [4] & (Selector7 # !\a~dataout [3]) # !dataout

        .dataa(\zports|dataout~113 ),
        .datab(\a~dataout [4]),
        .datac(\a~dataout [3]),
        .datad(\zports|Selector7~1858 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4436 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4436_I .clock_enable_mode = "false";
defparam \d~4436_I .lut_mask = "7757";
defparam \d~4436_I .operation_mode = "normal";
defparam \d~4436_I .output_mode = "comb_only";
defparam \d~4436_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H5
flex10ke_lcell \d~4438_I (
// Equation(s):
// \d~4438  = cpu_rnw & (zd_out_0) # !cpu_rnw & (\d~4437  # \d~4436 )

        .dataa(\z80mem|cpu_rnw~38 ),
        .datab(\d~4437 ),
        .datac(\d~4436 ),
        .datad(\z80mem|zd_out [0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4438 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4438_I .clock_enable_mode = "false";
defparam \d~4438_I .lut_mask = "fe54";
defparam \d~4438_I .operation_mode = "normal";
defparam \d~4438_I .output_mode = "comb_only";
defparam \d~4438_I .packed_mode = "false";
// synopsys translate_on

// atom is at PIN_144
flex10ke_io \m1_n~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\m1_n~dataout ),
        .padio(m1_n));
// synopsys translate_off
defparam \m1_n~I .feedback_mode = "from_pin";
defparam \m1_n~I .operation_mode = "input";
defparam \m1_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_7
flex10ke_io \iorq_n~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\iorq_n~dataout ),
        .padio(iorq_n));
// synopsys translate_off
defparam \iorq_n~I .feedback_mode = "from_pin";
defparam \iorq_n~I .operation_mode = "input";
defparam \iorq_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at LC2_E16
flex10ke_lcell \m1_n~9_I (
// Equation(s):
// \m1_n~9  = !\m1_n~dataout  & !\iorq_n~dataout 

        .dataa(vcc),
        .datab(vcc),
        .datac(\m1_n~dataout ),
        .datad(\iorq_n~dataout ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\m1_n~9 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \m1_n~9_I .clock_enable_mode = "false";
defparam \m1_n~9_I .lut_mask = "000f";
defparam \m1_n~9_I .operation_mode = "normal";
defparam \m1_n~9_I .output_mode = "comb_only";
defparam \m1_n~9_I .packed_mode = "false";
// synopsys translate_on

// atom is at PIN_80
flex10ke_io \iorqge2~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\iorqge2~dataout ),
        .padio(iorqge2));
// synopsys translate_off
defparam \iorqge2~I .feedback_mode = "from_pin";
defparam \iorqge2~I .operation_mode = "input";
defparam \iorqge2~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_141
flex10ke_io \rd_n~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(\rd_n~dataout ),
        .padio(rd_n));
// synopsys translate_off
defparam \rd_n~I .feedback_mode = "from_pin";
defparam \rd_n~I .operation_mode = "input";
defparam \rd_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at LC7_E7
flex10ke_lcell \iorqge2~17_I (
// Equation(s):
// \iorqge2~17  = !\iorqge2~dataout  & !\rd_n~dataout  & !iorq2_n

        .dataa(vcc),
        .datab(\iorqge2~dataout ),
        .datac(\rd_n~dataout ),
        .datad(\zxbus|iorq2_n ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\iorqge2~17 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \iorqge2~17_I .clock_enable_mode = "false";
defparam \iorqge2~17_I .lut_mask = "0003";
defparam \iorqge2~17_I .operation_mode = "normal";
defparam \iorqge2~17_I .output_mode = "comb_only";
defparam \iorqge2~17_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_E7
flex10ke_lcell \d~25_I (
// Equation(s):
// \d~25  = cpu_rnw # \m1_n~9  # \iorqge2~17  # dataout

        .dataa(\z80mem|cpu_rnw~38 ),
        .datab(\m1_n~9 ),
        .datac(\iorqge2~17 ),
        .datad(\zports|dataout~113 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~25 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~25_I .clock_enable_mode = "false";
defparam \d~25_I .lut_mask = "fffe";
defparam \d~25_I .operation_mode = "normal";
defparam \d~25_I .output_mode = "comb_only";
defparam \d~25_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H33
flex10ke_lcell \d~4440_I (
// Equation(s):
// \d~4440  = \a~dataout [4] & (\a~dataout [3] & !Selector61 # !\a~dataout [3] & (!Selector6))

        .dataa(\zports|Selector6~1409 ),
        .datab(\zports|Selector6~1408 ),
        .datac(\a~dataout [3]),
        .datad(\a~dataout [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4440 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4440_I .clock_enable_mode = "false";
defparam \d~4440_I .lut_mask = "5300";
defparam \d~4440_I .operation_mode = "normal";
defparam \d~4440_I .output_mode = "comb_only";
defparam \d~4440_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H33
flex10ke_lcell \d~4439_I (
// Equation(s):
// \d~4439  = !\a~dataout [4] & (!\a~dataout [3] # !Selector62) # !dataout

        .dataa(\zports|dataout~113 ),
        .datab(\a~dataout [4]),
        .datac(\zports|Selector6~1407 ),
        .datad(\a~dataout [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4439 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4439_I .clock_enable_mode = "false";
defparam \d~4439_I .lut_mask = "5777";
defparam \d~4439_I .operation_mode = "normal";
defparam \d~4439_I .output_mode = "comb_only";
defparam \d~4439_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H33
flex10ke_lcell \d~4441_I (
// Equation(s):
// \d~4441  = cpu_rnw & (zd_out_1) # !cpu_rnw & (\d~4440  # \d~4439 )

        .dataa(\z80mem|cpu_rnw~38 ),
        .datab(\d~4440 ),
        .datac(\d~4439 ),
        .datad(\z80mem|zd_out [1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4441 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4441_I .clock_enable_mode = "false";
defparam \d~4441_I .lut_mask = "fe54";
defparam \d~4441_I .operation_mode = "normal";
defparam \d~4441_I .output_mode = "comb_only";
defparam \d~4441_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H25
flex10ke_lcell \d~4443_I (
// Equation(s):
// \d~4443  = \a~dataout [4] & (\a~dataout [3] & !Selector51 # !\a~dataout [3] & (!Selector5))

        .dataa(\zports|Selector5~1409 ),
        .datab(\zports|Selector5~1408 ),
        .datac(\a~dataout [3]),
        .datad(\a~dataout [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4443 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4443_I .clock_enable_mode = "false";
defparam \d~4443_I .lut_mask = "5300";
defparam \d~4443_I .operation_mode = "normal";
defparam \d~4443_I .output_mode = "comb_only";
defparam \d~4443_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H25
flex10ke_lcell \d~4442_I (
// Equation(s):
// \d~4442  = !\a~dataout [4] & (!\a~dataout [3] # !Selector52) # !dataout

        .dataa(\zports|dataout~113 ),
        .datab(\a~dataout [4]),
        .datac(\zports|Selector5~1407 ),
        .datad(\a~dataout [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4442 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4442_I .clock_enable_mode = "false";
defparam \d~4442_I .lut_mask = "5777";
defparam \d~4442_I .operation_mode = "normal";
defparam \d~4442_I .output_mode = "comb_only";
defparam \d~4442_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H25
flex10ke_lcell \d~4444_I (
// Equation(s):
// \d~4444  = cpu_rnw & (zd_out_2) # !cpu_rnw & (\d~4443  # \d~4442 )

        .dataa(\z80mem|cpu_rnw~38 ),
        .datab(\d~4443 ),
        .datac(\d~4442 ),
        .datad(\z80mem|zd_out [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4444 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4444_I .clock_enable_mode = "false";
defparam \d~4444_I .lut_mask = "fe54";
defparam \d~4444_I .operation_mode = "normal";
defparam \d~4444_I .output_mode = "comb_only";
defparam \d~4444_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H17
flex10ke_lcell \d~4446_I (
// Equation(s):
// \d~4446  = \a~dataout [4] & (\a~dataout [3] & !Selector41 # !\a~dataout [3] & (!Selector4))

        .dataa(\zports|Selector4~1409 ),
        .datab(\zports|Selector4~1408 ),
        .datac(\a~dataout [3]),
        .datad(\a~dataout [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4446 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4446_I .clock_enable_mode = "false";
defparam \d~4446_I .lut_mask = "5300";
defparam \d~4446_I .operation_mode = "normal";
defparam \d~4446_I .output_mode = "comb_only";
defparam \d~4446_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H17
flex10ke_lcell \d~4445_I (
// Equation(s):
// \d~4445  = !\a~dataout [4] & (!\a~dataout [3] # !Selector42) # !dataout

        .dataa(\zports|dataout~113 ),
        .datab(\a~dataout [4]),
        .datac(\zports|Selector4~1407 ),
        .datad(\a~dataout [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4445 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4445_I .clock_enable_mode = "false";
defparam \d~4445_I .lut_mask = "5777";
defparam \d~4445_I .operation_mode = "normal";
defparam \d~4445_I .output_mode = "comb_only";
defparam \d~4445_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H17
flex10ke_lcell \d~4447_I (
// Equation(s):
// \d~4447  = cpu_rnw & (zd_out_3) # !cpu_rnw & (\d~4446  # \d~4445 )

        .dataa(\z80mem|cpu_rnw~38 ),
        .datab(\d~4446 ),
        .datac(\d~4445 ),
        .datad(\z80mem|zd_out [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4447 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4447_I .clock_enable_mode = "false";
defparam \d~4447_I .lut_mask = "fe54";
defparam \d~4447_I .operation_mode = "normal";
defparam \d~4447_I .output_mode = "comb_only";
defparam \d~4447_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H27
flex10ke_lcell \d~4449_I (
// Equation(s):
// \d~4449  = \a~dataout [4] & (\a~dataout [3] & !Selector31 # !\a~dataout [3] & (!Selector3))

        .dataa(\zports|Selector3~1409 ),
        .datab(\zports|Selector3~1408 ),
        .datac(\a~dataout [3]),
        .datad(\a~dataout [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4449 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4449_I .clock_enable_mode = "false";
defparam \d~4449_I .lut_mask = "5300";
defparam \d~4449_I .operation_mode = "normal";
defparam \d~4449_I .output_mode = "comb_only";
defparam \d~4449_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H27
flex10ke_lcell \d~4448_I (
// Equation(s):
// \d~4448  = !\a~dataout [4] & (!\a~dataout [3] # !Selector32) # !dataout

        .dataa(\zports|dataout~113 ),
        .datab(\a~dataout [4]),
        .datac(\zports|Selector3~1407 ),
        .datad(\a~dataout [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4448 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4448_I .clock_enable_mode = "false";
defparam \d~4448_I .lut_mask = "5777";
defparam \d~4448_I .operation_mode = "normal";
defparam \d~4448_I .output_mode = "comb_only";
defparam \d~4448_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H27
flex10ke_lcell \d~4450_I (
// Equation(s):
// \d~4450  = cpu_rnw & (zd_out_4) # !cpu_rnw & (\d~4449  # \d~4448 )

        .dataa(\z80mem|cpu_rnw~38 ),
        .datab(\d~4449 ),
        .datac(\d~4448 ),
        .datad(\z80mem|zd_out [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4450 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4450_I .clock_enable_mode = "false";
defparam \d~4450_I .lut_mask = "fe54";
defparam \d~4450_I .operation_mode = "normal";
defparam \d~4450_I .output_mode = "comb_only";
defparam \d~4450_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H8
flex10ke_lcell \d~4452_I (
// Equation(s):
// \d~4452  = \a~dataout [4] & (\a~dataout [3] & (Selector2) # !\a~dataout [3] & !Selector21)

        .dataa(\zports|Selector2~1468 ),
        .datab(\a~dataout [3]),
        .datac(\zports|Selector2~1452 ),
        .datad(\a~dataout [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4452 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4452_I .clock_enable_mode = "false";
defparam \d~4452_I .lut_mask = "d100";
defparam \d~4452_I .operation_mode = "normal";
defparam \d~4452_I .output_mode = "comb_only";
defparam \d~4452_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H8
flex10ke_lcell \d~4451_I (
// Equation(s):
// \d~4451  = !\a~dataout [4] & (!\a~dataout [3] # !Selector22) # !dataout

        .dataa(\zports|dataout~113 ),
        .datab(\a~dataout [4]),
        .datac(\zports|Selector2~1467 ),
        .datad(\a~dataout [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4451 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4451_I .clock_enable_mode = "false";
defparam \d~4451_I .lut_mask = "5777";
defparam \d~4451_I .operation_mode = "normal";
defparam \d~4451_I .output_mode = "comb_only";
defparam \d~4451_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H8
flex10ke_lcell \d~4453_I (
// Equation(s):
// \d~4453  = cpu_rnw & (zd_out_5) # !cpu_rnw & (\d~4452  # \d~4451 )

        .dataa(\z80mem|cpu_rnw~38 ),
        .datab(\d~4452 ),
        .datac(\d~4451 ),
        .datad(\z80mem|zd_out [5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4453 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4453_I .clock_enable_mode = "false";
defparam \d~4453_I .lut_mask = "fe54";
defparam \d~4453_I .operation_mode = "normal";
defparam \d~4453_I .output_mode = "comb_only";
defparam \d~4453_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H34
flex10ke_lcell \d~4455_I (
// Equation(s):
// \d~4455  = \a~dataout [4] & (\a~dataout [3] & (Selector1) # !\a~dataout [3] & !Selector11)

        .dataa(\zports|Selector1~1400 ),
        .datab(\a~dataout [3]),
        .datac(\zports|Selector1~1384 ),
        .datad(\a~dataout [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4455 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4455_I .clock_enable_mode = "false";
defparam \d~4455_I .lut_mask = "d100";
defparam \d~4455_I .operation_mode = "normal";
defparam \d~4455_I .output_mode = "comb_only";
defparam \d~4455_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H34
flex10ke_lcell \d~4454_I (
// Equation(s):
// \d~4454  = !\a~dataout [4] & (!\a~dataout [3] # !Selector12) # !dataout

        .dataa(\zports|dataout~113 ),
        .datab(\a~dataout [4]),
        .datac(\zports|Selector1~1399 ),
        .datad(\a~dataout [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4454 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4454_I .clock_enable_mode = "false";
defparam \d~4454_I .lut_mask = "5777";
defparam \d~4454_I .operation_mode = "normal";
defparam \d~4454_I .output_mode = "comb_only";
defparam \d~4454_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H34
flex10ke_lcell \d~4456_I (
// Equation(s):
// \d~4456  = cpu_rnw & (zd_out_6) # !cpu_rnw & (\d~4455  # \d~4454 )

        .dataa(\z80mem|cpu_rnw~38 ),
        .datab(\d~4455 ),
        .datac(\d~4454 ),
        .datad(\z80mem|zd_out [6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4456 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4456_I .clock_enable_mode = "false";
defparam \d~4456_I .lut_mask = "fe54";
defparam \d~4456_I .operation_mode = "normal";
defparam \d~4456_I .output_mode = "comb_only";
defparam \d~4456_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H23
flex10ke_lcell \d~4458_I (
// Equation(s):
// \d~4458  = \a~dataout [4] & (\a~dataout [3] & (Selector0) # !\a~dataout [3] & !Selector02)

        .dataa(\zports|Selector0~1470 ),
        .datab(\a~dataout [3]),
        .datac(\zports|Selector0~1454 ),
        .datad(\a~dataout [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4458 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4458_I .clock_enable_mode = "false";
defparam \d~4458_I .lut_mask = "d100";
defparam \d~4458_I .operation_mode = "normal";
defparam \d~4458_I .output_mode = "comb_only";
defparam \d~4458_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H23
flex10ke_lcell \d~4457_I (
// Equation(s):
// \d~4457  = !\a~dataout [4] & (!\a~dataout [3] # !Selector01) # !dataout

        .dataa(\zports|dataout~113 ),
        .datab(\a~dataout [4]),
        .datac(\zports|Selector0~1469 ),
        .datad(\a~dataout [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4457 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4457_I .clock_enable_mode = "false";
defparam \d~4457_I .lut_mask = "5777";
defparam \d~4457_I .operation_mode = "normal";
defparam \d~4457_I .output_mode = "comb_only";
defparam \d~4457_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H23
flex10ke_lcell \d~4459_I (
// Equation(s):
// \d~4459  = cpu_rnw & (zd_out_7) # !cpu_rnw & (\d~4458  # \d~4457 )

        .dataa(\z80mem|cpu_rnw~38 ),
        .datab(\d~4458 ),
        .datac(\d~4457 ),
        .datad(\z80mem|zd_out [7]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\d~4459 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \d~4459_I .clock_enable_mode = "false";
defparam \d~4459_I .lut_mask = "fe54";
defparam \d~4459_I .operation_mode = "normal";
defparam \d~4459_I .output_mode = "comb_only";
defparam \d~4459_I .packed_mode = "false";
// synopsys translate_on

// atom is at PIN_139
flex10ke_io \clkz_out~I (
        .datain(\zclock|zclk_out ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(clkz_out));
// synopsys translate_off
defparam \clkz_out~I .feedback_mode = "none";
defparam \clkz_out~I .operation_mode = "output";
defparam \clkz_out~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_10
flex10ke_io \int_n~I (
        .datain(\preryv|int_n ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(int_n));
// synopsys translate_off
defparam \int_n~I .feedback_mode = "none";
defparam \int_n~I .operation_mode = "output";
defparam \int_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_9
flex10ke_io \nmi_n~I (
        .datain(!\slavespi|cfg0_reg_out [1]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(nmi_n));
// synopsys translate_off
defparam \nmi_n~I .feedback_mode = "none";
defparam \nmi_n~I .open_drain_output = "true";
defparam \nmi_n~I .operation_mode = "output";
defparam \nmi_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_143
flex10ke_io \wait_n~I (
        .datain(\zwait|WideNor0 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(wait_n));
// synopsys translate_off
defparam \wait_n~I .feedback_mode = "none";
defparam \wait_n~I .open_drain_output = "true";
defparam \wait_n~I .operation_mode = "output";
defparam \wait_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_142
flex10ke_io \res~I (
        .datain(!\myrst|rst_out_n ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(res));
// synopsys translate_off
defparam \res~I .feedback_mode = "none";
defparam \res~I .operation_mode = "output";
defparam \res~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_150
flex10ke_io \csrom~I (
        .datain(\z80mem|Mux8~3 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(csrom));
// synopsys translate_off
defparam \csrom~I .feedback_mode = "none";
defparam \csrom~I .operation_mode = "output";
defparam \csrom~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_167
flex10ke_io \romoe_n~I (
        .datain(\z80mem|romoe_n ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(romoe_n));
// synopsys translate_off
defparam \romoe_n~I .feedback_mode = "none";
defparam \romoe_n~I .operation_mode = "output";
defparam \romoe_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_166
flex10ke_io \romwe_n~I (
        .datain(\z80mem|romwe_n~15 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(romwe_n));
// synopsys translate_off
defparam \romwe_n~I .feedback_mode = "none";
defparam \romwe_n~I .operation_mode = "output";
defparam \romwe_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_161
flex10ke_io \rompg0_n~I (
        .datain(!\z80mem|Mux7~3 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(rompg0_n));
// synopsys translate_off
defparam \rompg0_n~I .feedback_mode = "none";
defparam \rompg0_n~I .operation_mode = "output";
defparam \rompg0_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_160
flex10ke_io \dos_n~I (
        .datain(\z80mem|Mux6~3 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(dos_n));
// synopsys translate_off
defparam \dos_n~I .feedback_mode = "none";
defparam \dos_n~I .operation_mode = "output";
defparam \dos_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_164
flex10ke_io \rompg2~I (
        .datain(\z80mem|Mux5~10 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(rompg2));
// synopsys translate_off
defparam \rompg2~I .feedback_mode = "none";
defparam \rompg2~I .operation_mode = "output";
defparam \rompg2~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_163
flex10ke_io \rompg3~I (
        .datain(\z80mem|Mux4~3 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(rompg3));
// synopsys translate_off
defparam \rompg3~I .feedback_mode = "none";
defparam \rompg3~I .operation_mode = "output";
defparam \rompg3~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_162
flex10ke_io \rompg4~I (
        .datain(\z80mem|Mux3~3 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(rompg4));
// synopsys translate_off
defparam \rompg4~I .feedback_mode = "none";
defparam \rompg4~I .operation_mode = "output";
defparam \rompg4~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_148
flex10ke_io \iorq1_n~I (
        .datain(\zxbus|iorq1_n ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(iorq1_n));
// synopsys translate_off
defparam \iorq1_n~I .feedback_mode = "none";
defparam \iorq1_n~I .operation_mode = "output";
defparam \iorq1_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_149
flex10ke_io \iorq2_n~I (
        .datain(\zxbus|iorq2_n ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(iorq2_n));
// synopsys translate_off
defparam \iorq2_n~I .feedback_mode = "none";
defparam \iorq2_n~I .operation_mode = "output";
defparam \iorq2_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_177
flex10ke_io \ra[0]~I (
        .datain(\dram|ra [0]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ra[0]));
// synopsys translate_off
defparam \ra[0]~I .feedback_mode = "none";
defparam \ra[0]~I .operation_mode = "output";
defparam \ra[0]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_175
flex10ke_io \ra[1]~I (
        .datain(\dram|ra [1]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ra[1]));
// synopsys translate_off
defparam \ra[1]~I .feedback_mode = "none";
defparam \ra[1]~I .operation_mode = "output";
defparam \ra[1]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_173
flex10ke_io \ra[2]~I (
        .datain(\dram|ra [2]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ra[2]));
// synopsys translate_off
defparam \ra[2]~I .feedback_mode = "none";
defparam \ra[2]~I .operation_mode = "output";
defparam \ra[2]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_170
flex10ke_io \ra[3]~I (
        .datain(\dram|ra [3]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ra[3]));
// synopsys translate_off
defparam \ra[3]~I .feedback_mode = "none";
defparam \ra[3]~I .operation_mode = "output";
defparam \ra[3]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_169
flex10ke_io \ra[4]~I (
        .datain(\dram|ra [4]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ra[4]));
// synopsys translate_off
defparam \ra[4]~I .feedback_mode = "none";
defparam \ra[4]~I .operation_mode = "output";
defparam \ra[4]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_172
flex10ke_io \ra[5]~I (
        .datain(\dram|ra [5]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ra[5]));
// synopsys translate_off
defparam \ra[5]~I .feedback_mode = "none";
defparam \ra[5]~I .operation_mode = "output";
defparam \ra[5]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_174
flex10ke_io \ra[6]~I (
        .datain(\dram|ra [6]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ra[6]));
// synopsys translate_off
defparam \ra[6]~I .feedback_mode = "none";
defparam \ra[6]~I .operation_mode = "output";
defparam \ra[6]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_176
flex10ke_io \ra[7]~I (
        .datain(\dram|ra [7]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ra[7]));
// synopsys translate_off
defparam \ra[7]~I .feedback_mode = "none";
defparam \ra[7]~I .operation_mode = "output";
defparam \ra[7]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_179
flex10ke_io \ra[8]~I (
        .datain(\dram|ra [8]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ra[8]));
// synopsys translate_off
defparam \ra[8]~I .feedback_mode = "none";
defparam \ra[8]~I .operation_mode = "output";
defparam \ra[8]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_180
flex10ke_io \ra[9]~I (
        .datain(\dram|ra [9]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ra[9]));
// synopsys translate_off
defparam \ra[9]~I .feedback_mode = "none";
defparam \ra[9]~I .operation_mode = "output";
defparam \ra[9]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_131
flex10ke_io \vred[0]~I (
        .datain(\vidia|vred[0]~COMB ),
        .clk(\fclk~dataout ),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vred[0]));
// synopsys translate_off
defparam \vred[0]~I .feedback_mode = "none";
defparam \vred[0]~I .operation_mode = "output";
defparam \vred[0]~I .reg_source_mode = "data_in_to_pin";
// synopsys translate_on

// atom is at PIN_132
flex10ke_io \vred[1]~I (
        .datain(\vidia|vred[1]~COMB ),
        .clk(\fclk~dataout ),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vred[1]));
// synopsys translate_off
defparam \vred[1]~I .feedback_mode = "none";
defparam \vred[1]~I .operation_mode = "output";
defparam \vred[1]~I .reg_source_mode = "data_in_to_pin";
// synopsys translate_on

// atom is at PIN_127
flex10ke_io \vgrn[0]~I (
        .datain(\vidia|vgrn[0]~COMB ),
        .clk(\fclk~dataout ),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vgrn[0]));
// synopsys translate_off
defparam \vgrn[0]~I .feedback_mode = "none";
defparam \vgrn[0]~I .operation_mode = "output";
defparam \vgrn[0]~I .reg_source_mode = "data_in_to_pin";
// synopsys translate_on

// atom is at PIN_128
flex10ke_io \vgrn[1]~I (
        .datain(\vidia|vgrn[1]~COMB ),
        .clk(\fclk~dataout ),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vgrn[1]));
// synopsys translate_off
defparam \vgrn[1]~I .feedback_mode = "none";
defparam \vgrn[1]~I .operation_mode = "output";
defparam \vgrn[1]~I .reg_source_mode = "data_in_to_pin";
// synopsys translate_on

// atom is at PIN_125
flex10ke_io \vblu[0]~I (
        .datain(\vidia|vblu[0]~COMB ),
        .clk(\fclk~dataout ),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vblu[0]));
// synopsys translate_off
defparam \vblu[0]~I .feedback_mode = "none";
defparam \vblu[0]~I .operation_mode = "output";
defparam \vblu[0]~I .reg_source_mode = "data_in_to_pin";
// synopsys translate_on

// atom is at PIN_126
flex10ke_io \vblu[1]~I (
        .datain(\vidia|vblu[1]~COMB ),
        .clk(\fclk~dataout ),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vblu[1]));
// synopsys translate_off
defparam \vblu[1]~I .feedback_mode = "none";
defparam \vblu[1]~I .operation_mode = "output";
defparam \vblu[1]~I .reg_source_mode = "data_in_to_pin";
// synopsys translate_on

// atom is at PIN_121
flex10ke_io \vhsync~I (
        .datain(\vidia|vhsync ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vhsync));
// synopsys translate_off
defparam \vhsync~I .feedback_mode = "none";
defparam \vhsync~I .operation_mode = "output";
defparam \vhsync~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_120
flex10ke_io \vvsync~I (
        .datain(\vidia|vvsync ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vvsync));
// synopsys translate_off
defparam \vvsync~I .feedback_mode = "none";
defparam \vvsync~I .operation_mode = "output";
defparam \vvsync~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_122
flex10ke_io \vcsync~I (
        .datain(\vidia|vcsync ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vcsync));
// synopsys translate_off
defparam \vcsync~I .feedback_mode = "none";
defparam \vcsync~I .operation_mode = "output";
defparam \vcsync~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_134
flex10ke_io \ay_clk~I (
        .datain(\ayclk_gen_rtl_0|wysi_counter|q [3]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ay_clk));
// synopsys translate_off
defparam \ay_clk~I .feedback_mode = "none";
defparam \ay_clk~I .operation_mode = "output";
defparam \ay_clk~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_135
flex10ke_io \ay_bdir~I (
        .datain(\zports|ay_bdir ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ay_bdir));
// synopsys translate_off
defparam \ay_bdir~I .feedback_mode = "none";
defparam \ay_bdir~I .operation_mode = "output";
defparam \ay_bdir~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_136
flex10ke_io \ay_bc1~I (
        .datain(\zports|ay_bc1~38 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ay_bc1));
// synopsys translate_off
defparam \ay_bc1~I .feedback_mode = "none";
defparam \ay_bc1~I .operation_mode = "output";
defparam \ay_bc1~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_133
flex10ke_io \beep~I (
        .datain(\zports|beep ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(beep));
// synopsys translate_off
defparam \beep~I .feedback_mode = "none";
defparam \beep~I .operation_mode = "output";
defparam \beep~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_104
flex10ke_io \ide_a[0]~I (
        .datain(\ide_a[0]~0 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ide_a[0]));
// synopsys translate_off
defparam \ide_a[0]~I .feedback_mode = "none";
defparam \ide_a[0]~I .operation_mode = "output";
defparam \ide_a[0]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_103
flex10ke_io \ide_a[1]~I (
        .datain(\ide_a[1]~1 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ide_a[1]));
// synopsys translate_off
defparam \ide_a[1]~I .feedback_mode = "none";
defparam \ide_a[1]~I .operation_mode = "output";
defparam \ide_a[1]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_111
flex10ke_io \ide_a[2]~I (
        .datain(\ide_a[2]~2 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ide_a[2]));
// synopsys translate_off
defparam \ide_a[2]~I .feedback_mode = "none";
defparam \ide_a[2]~I .operation_mode = "output";
defparam \ide_a[2]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_97
flex10ke_io \ide_dir~I (
        .datain(!\ide_dir~0 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ide_dir));
// synopsys translate_off
defparam \ide_dir~I .feedback_mode = "none";
defparam \ide_dir~I .operation_mode = "output";
defparam \ide_dir~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_99
flex10ke_io \ide_rdy~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ide_rdy));
// synopsys translate_off
defparam \ide_rdy~I .feedback_mode = "from_pin";
defparam \ide_rdy~I .operation_mode = "input";
defparam \ide_rdy~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_113
flex10ke_io \ide_cs0_n~I (
        .datain(\zports|ide_cs0_n ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ide_cs0_n));
// synopsys translate_off
defparam \ide_cs0_n~I .feedback_mode = "none";
defparam \ide_cs0_n~I .operation_mode = "output";
defparam \ide_cs0_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_112
flex10ke_io \ide_cs1_n~I (
        .datain(\zports|ide_cs1_n ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ide_cs1_n));
// synopsys translate_off
defparam \ide_cs1_n~I .feedback_mode = "none";
defparam \ide_cs1_n~I .operation_mode = "output";
defparam \ide_cs1_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_102
flex10ke_io \ide_rs_n~I (
        .datain(\myrst|rst_out_n~9 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ide_rs_n));
// synopsys translate_off
defparam \ide_rs_n~I .feedback_mode = "none";
defparam \ide_rs_n~I .operation_mode = "output";
defparam \ide_rs_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_101
flex10ke_io \ide_rd_n~I (
        .datain(\zports|ide_rd_n~66 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ide_rd_n));
// synopsys translate_off
defparam \ide_rd_n~I .feedback_mode = "none";
defparam \ide_rd_n~I .operation_mode = "output";
defparam \ide_rd_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_100
flex10ke_io \ide_wr_n~I (
        .datain(\zports|ide_wr_n~73 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(ide_wr_n));
// synopsys translate_off
defparam \ide_wr_n~I .feedback_mode = "none";
defparam \ide_wr_n~I .operation_mode = "output";
defparam \ide_wr_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_56
flex10ke_io \vg_clk~I (
        .datain(\vgshka|vgclk_div4 [1]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vg_clk));
// synopsys translate_off
defparam \vg_clk~I .feedback_mode = "none";
defparam \vg_clk~I .operation_mode = "output";
defparam \vg_clk~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_45
flex10ke_io \vg_cs_n~I (
        .datain(\zports|vg_cs_n ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vg_cs_n));
// synopsys translate_off
defparam \vg_cs_n~I .feedback_mode = "none";
defparam \vg_cs_n~I .operation_mode = "output";
defparam \vg_cs_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_54
flex10ke_io \vg_res_n~I (
        .datain(\vgshka|vg_res_n ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vg_res_n));
// synopsys translate_off
defparam \vg_res_n~I .feedback_mode = "none";
defparam \vg_res_n~I .operation_mode = "output";
defparam \vg_res_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_55
flex10ke_io \vg_hrdy~I (
        .datain(\vgshka|vg_hrdy ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vg_hrdy));
// synopsys translate_off
defparam \vg_hrdy~I .feedback_mode = "none";
defparam \vg_hrdy~I .operation_mode = "output";
defparam \vg_hrdy~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_57
flex10ke_io \vg_rclk~I (
        .datain(\vgshka|vg_rclk ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vg_rclk));
// synopsys translate_off
defparam \vg_rclk~I .feedback_mode = "none";
defparam \vg_rclk~I .operation_mode = "output";
defparam \vg_rclk~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_58
flex10ke_io \vg_rawr~I (
        .datain(\vgshka|vg_rawr ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vg_rawr));
// synopsys translate_off
defparam \vg_rawr~I .feedback_mode = "none";
defparam \vg_rawr~I .operation_mode = "output";
defparam \vg_rawr~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_69
flex10ke_io \vg_a[0]~I (
        .datain(\vgshka|vg_a [0]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vg_a[0]));
// synopsys translate_off
defparam \vg_a[0]~I .feedback_mode = "none";
defparam \vg_a[0]~I .operation_mode = "output";
defparam \vg_a[0]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_70
flex10ke_io \vg_a[1]~I (
        .datain(\vgshka|vg_a [1]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vg_a[1]));
// synopsys translate_off
defparam \vg_a[1]~I .feedback_mode = "none";
defparam \vg_a[1]~I .operation_mode = "output";
defparam \vg_a[1]~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_67
flex10ke_io \vg_wrd~I (
        .datain(\vgshka|vg_wrd ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vg_wrd));
// synopsys translate_off
defparam \vg_wrd~I .feedback_mode = "none";
defparam \vg_wrd~I .operation_mode = "output";
defparam \vg_wrd~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_65
flex10ke_io \vg_side~I (
        .datain(\vgshka|vg_side ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vg_side));
// synopsys translate_off
defparam \vg_side~I .feedback_mode = "none";
defparam \vg_side~I .operation_mode = "output";
defparam \vg_side~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_62
flex10ke_io \vg_wf_de~I (
        .datain(gnd),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(gnd),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(vg_wf_de));
// synopsys translate_off
defparam \vg_wf_de~I .feedback_mode = "from_pin";
defparam \vg_wf_de~I .operation_mode = "input";
defparam \vg_wf_de~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_119
flex10ke_io \sdcs_n~I (
        .datain(!\zports|sdcs_n ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(sdcs_n));
// synopsys translate_off
defparam \sdcs_n~I .feedback_mode = "none";
defparam \sdcs_n~I .operation_mode = "output";
defparam \sdcs_n~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_116
flex10ke_io \sddo~I (
        .datain(\zspi|shiftout [7]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(sddo));
// synopsys translate_off
defparam \sddo~I .feedback_mode = "none";
defparam \sddo~I .operation_mode = "output";
defparam \sddo~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_114
flex10ke_io \sdclk~I (
        .datain(\zspi|counter_rtl_1|wysi_counter|q [0]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(sdclk));
// synopsys translate_off
defparam \sdclk~I .feedback_mode = "none";
defparam \sdclk~I .operation_mode = "output";
defparam \sdclk~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_158
flex10ke_io \spidi~I (
        .datain(\slavespi|shift_out [0]),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(spidi));
// synopsys translate_off
defparam \spidi~I .feedback_mode = "none";
defparam \spidi~I .operation_mode = "output";
defparam \spidi~I .reg_source_mode = "none";
// synopsys translate_on

// atom is at PIN_159
flex10ke_io \spiint_n~I (
        .datain(\zwait|WideNor0~1 ),
        .clk(gnd),
        .ena(vcc),
        .aclr(gnd),
        .oe(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .devoe(devoe),
        .dataout(),
        .padio(spiint_n));
// synopsys translate_off
defparam \spiint_n~I .feedback_mode = "none";
defparam \spiint_n~I .operation_mode = "output";
defparam \spiint_n~I .reg_source_mode = "none";
// synopsys translate_on

endmodule

module arbiter (
        Mux7,
        cpu_rnw,
        cpu_req,
        Equal2,
        next_cycle_0,
        Selector1,
        go,
        next_cycle_1,
        peff7_int_0,
        cbeg,
        pre_cend,
        dcnt_0,
        video_next,
        dcnt_1,
        next_cycle_01,
        q_7,
        peff7_int_5,
        dram_addr_11,
        dram_addr_12,
        dram_addr_13,
        q_2,
        dram_addr_9,
        q_6,
        dram_addr_10,
        cend,
        video_strobe,
        cpu_strobe,
        q_1,
        q_0,
        dram_addr_7,
        dram_addr_8,
        clk,
        devpor,
        devclrn,
        devoe);
input   Mux7;
input   cpu_rnw;
input   cpu_req;
output  Equal2;
output  next_cycle_0;
input   Selector1;
input   go;
output  next_cycle_1;
input   peff7_int_0;
input   cbeg;
output  pre_cend;
input   dcnt_0;
output  video_next;
input   dcnt_1;
output  next_cycle_01;
input   q_7;
input   peff7_int_5;
output  dram_addr_11;
output  dram_addr_12;
output  dram_addr_13;
input   q_2;
output  dram_addr_9;
input   q_6;
output  dram_addr_10;
output  cend;
output  video_strobe;
output  cpu_strobe;
input   q_1;
input   q_0;
output  dram_addr_7;
output  dram_addr_8;
input   clk;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \dram_addr[7]~2028 ;
wire \dram_addr[8]~2030 ;
wire \Equal2~39 ;
wire \always2~53 ;
wire \blk_nrem[1]~68 ;
wire \Equal1~3 ;
wire \vid_nrem[2]~507 ;
wire \vid_nrem[0]~505 ;
wire \vid_nrem[0]~506 ;
wire \vid_nrem[1]~508 ;
wire \vid_nrem[1]~509 ;
wire \next_cycle[0]~255 ;
wire \next_cycle[1]~257 ;
wire post_cbeg;
wire \always8~3 ;
wire \dram_addr[7]~2042 ;
wire \dram_addr[8]~2045 ;
wire [2:0] blk_rem;
wire [1:0] curr_cycle;
wire [2:0] vid_rem;


// atom is at LC6_E8
flex10ke_lcell \Equal2~38_I (
// Equation(s):
// Equal2 = !blk_rem[1] & !blk_rem[0] & !blk_rem[2]

        .dataa(vcc),
        .datab(blk_rem[1]),
        .datac(blk_rem[0]),
        .datad(blk_rem[2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Equal2),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal2~38_I .clock_enable_mode = "false";
defparam \Equal2~38_I .lut_mask = "0003";
defparam \Equal2~38_I .operation_mode = "normal";
defparam \Equal2~38_I .output_mode = "comb_only";
defparam \Equal2~38_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_E2
flex10ke_lcell \next_cycle[0]~256_I (
// Equation(s):
// next_cycle_0 = \next_cycle[0]~255  & (vid_rem[1] $ !blk_rem[1])

        .dataa(vcc),
        .datab(vid_rem[1]),
        .datac(blk_rem[1]),
        .datad(\next_cycle[0]~255 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(next_cycle_0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \next_cycle[0]~256_I .clock_enable_mode = "false";
defparam \next_cycle[0]~256_I .lut_mask = "c300";
defparam \next_cycle[0]~256_I .operation_mode = "normal";
defparam \next_cycle[0]~256_I .output_mode = "comb_only";
defparam \next_cycle[0]~256_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_E2
flex10ke_lcell \next_cycle[1]~258_I (
// Equation(s):
// next_cycle_1 = !\always2~53  & !cpu_req & (\next_cycle[1]~257  # Equal2)

        .dataa(\always2~53 ),
        .datab(cpu_req),
        .datac(\next_cycle[1]~257 ),
        .datad(Equal2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(next_cycle_1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \next_cycle[1]~258_I .clock_enable_mode = "false";
defparam \next_cycle[1]~258_I .lut_mask = "1110";
defparam \next_cycle[1]~258_I .operation_mode = "normal";
defparam \next_cycle[1]~258_I .output_mode = "comb_only";
defparam \next_cycle[1]~258_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I1
flex10ke_lcell \pre_cend~I (
// Equation(s):
// pre_cend = DFFEA(post_cbeg, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(post_cbeg),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(pre_cend),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pre_cend~I .clock_enable_mode = "false";
defparam \pre_cend~I .lut_mask = "ff00";
defparam \pre_cend~I .operation_mode = "normal";
defparam \pre_cend~I .output_mode = "reg_only";
defparam \pre_cend~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I1
flex10ke_lcell \video_next~I (
// Equation(s):
// video_next = DFFEA(!curr_cycle[0] & curr_cycle[1] & post_cbeg, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(curr_cycle[0]),
        .datac(curr_cycle[1]),
        .datad(post_cbeg),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(video_next),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \video_next~I .clock_enable_mode = "false";
defparam \video_next~I .lut_mask = "3000";
defparam \video_next~I .operation_mode = "normal";
defparam \video_next~I .output_mode = "reg_only";
defparam \video_next~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_E2
flex10ke_lcell \next_cycle[0]~259_I (
// Equation(s):
// next_cycle_01 = cpu_req & (Equal2 # !next_cycle_0)

        .dataa(vcc),
        .datab(next_cycle_0),
        .datac(Equal2),
        .datad(cpu_req),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(next_cycle_01),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \next_cycle[0]~259_I .clock_enable_mode = "false";
defparam \next_cycle[0]~259_I .lut_mask = "f300";
defparam \next_cycle[0]~259_I .operation_mode = "normal";
defparam \next_cycle[0]~259_I .output_mode = "comb_only";
defparam \next_cycle[0]~259_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_I15
flex10ke_lcell \dram_addr[11]~2017_I (
// Equation(s):
// dram_addr_11 = q_7 # !peff7_int_0 & !peff7_int_5 & dcnt_0

        .dataa(peff7_int_0),
        .datab(peff7_int_5),
        .datac(dcnt_0),
        .datad(q_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dram_addr_11),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dram_addr[11]~2017_I .clock_enable_mode = "false";
defparam \dram_addr[11]~2017_I .lut_mask = "ff10";
defparam \dram_addr[11]~2017_I .operation_mode = "normal";
defparam \dram_addr[11]~2017_I .output_mode = "comb_only";
defparam \dram_addr[11]~2017_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I22
flex10ke_lcell \dram_addr[12]~2018_I (
// Equation(s):
// dram_addr_12 = peff7_int_0 & (dcnt_1) # !peff7_int_0 & dcnt_0 & peff7_int_5

        .dataa(peff7_int_0),
        .datab(dcnt_0),
        .datac(peff7_int_5),
        .datad(dcnt_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dram_addr_12),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dram_addr[12]~2018_I .clock_enable_mode = "false";
defparam \dram_addr[12]~2018_I .lut_mask = "ea40";
defparam \dram_addr[12]~2018_I .operation_mode = "normal";
defparam \dram_addr[12]~2018_I .output_mode = "comb_only";
defparam \dram_addr[12]~2018_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I13
flex10ke_lcell \dram_addr[13]~2019_I (
// Equation(s):
// dram_addr_13 = next_cycle_01 & (Mux7) # !next_cycle_01 & (dcnt_0 # !peff7_int_0)

        .dataa(next_cycle_01),
        .datab(peff7_int_0),
        .datac(dcnt_0),
        .datad(Mux7),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dram_addr_13),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dram_addr[13]~2019_I .clock_enable_mode = "false";
defparam \dram_addr[13]~2019_I .lut_mask = "fb51";
defparam \dram_addr[13]~2019_I .operation_mode = "normal";
defparam \dram_addr[13]~2019_I .output_mode = "comb_only";
defparam \dram_addr[13]~2019_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I19
flex10ke_lcell \dram_addr[9]~2026_I (
// Equation(s):
// dram_addr_9 = q_21 & (peff7_int_0 # peff7_int_5 # !dcnt_0)

        .dataa(dcnt_0),
        .datab(peff7_int_0),
        .datac(peff7_int_5),
        .datad(q_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dram_addr_9),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dram_addr[9]~2026_I .clock_enable_mode = "false";
defparam \dram_addr[9]~2026_I .lut_mask = "fd00";
defparam \dram_addr[9]~2026_I .operation_mode = "normal";
defparam \dram_addr[9]~2026_I .output_mode = "comb_only";
defparam \dram_addr[9]~2026_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I19
flex10ke_lcell \dram_addr[10]~2027_I (
// Equation(s):
// dram_addr_10 = q_6 # !peff7_int_0 & !peff7_int_5 & dcnt_0

        .dataa(peff7_int_0),
        .datab(peff7_int_5),
        .datac(dcnt_0),
        .datad(q_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dram_addr_10),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dram_addr[10]~2027_I .clock_enable_mode = "false";
defparam \dram_addr[10]~2027_I .lut_mask = "ff10";
defparam \dram_addr[10]~2027_I .operation_mode = "normal";
defparam \dram_addr[10]~2027_I .output_mode = "comb_only";
defparam \dram_addr[10]~2027_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I1
flex10ke_lcell \cend~I (
// Equation(s):
// cend = DFFEA(pre_cend, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(pre_cend),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(cend),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \cend~I .clock_enable_mode = "false";
defparam \cend~I .lut_mask = "ff00";
defparam \cend~I .operation_mode = "normal";
defparam \cend~I .output_mode = "reg_only";
defparam \cend~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_I1
flex10ke_lcell \video_strobe~I (
// Equation(s):
// video_strobe = DFFEA(!curr_cycle[0] & curr_cycle[1] & pre_cend, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(curr_cycle[0]),
        .datac(curr_cycle[1]),
        .datad(pre_cend),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(video_strobe),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \video_strobe~I .clock_enable_mode = "false";
defparam \video_strobe~I .lut_mask = "3000";
defparam \video_strobe~I .operation_mode = "normal";
defparam \video_strobe~I .output_mode = "reg_only";
defparam \video_strobe~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I1
flex10ke_lcell \cpu_strobe~I (
// Equation(s):
// cpu_strobe = DFFEA(\always8~3  # !next_cycle_1 & cend & Selector1, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(next_cycle_1),
        .datab(cend),
        .datac(Selector1),
        .datad(\always8~3 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(cpu_strobe),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \cpu_strobe~I .clock_enable_mode = "false";
defparam \cpu_strobe~I .lut_mask = "ff40";
defparam \cpu_strobe~I .operation_mode = "normal";
defparam \cpu_strobe~I .output_mode = "reg_only";
defparam \cpu_strobe~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I19
flex10ke_lcell \dram_addr[7]~2032_I (
// Equation(s):
// dram_addr_7 = (peff7_int_0 # peff7_int_5 # !dcnt_0 # !q_6) & CASCADE(\dram_addr[7]~2042 )

        .dataa(q_6),
        .datab(dcnt_0),
        .datac(peff7_int_0),
        .datad(peff7_int_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\dram_addr[7]~2042 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dram_addr_7),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dram_addr[7]~2032_I .clock_enable_mode = "false";
defparam \dram_addr[7]~2032_I .lut_mask = "fff7";
defparam \dram_addr[7]~2032_I .operation_mode = "normal";
defparam \dram_addr[7]~2032_I .output_mode = "comb_only";
defparam \dram_addr[7]~2032_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I15
flex10ke_lcell \dram_addr[8]~2033_I (
// Equation(s):
// dram_addr_8 = (peff7_int_0 # peff7_int_5 # !q_7 # !dcnt_0) & CASCADE(\dram_addr[8]~2045 )

        .dataa(dcnt_0),
        .datab(q_7),
        .datac(peff7_int_0),
        .datad(peff7_int_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\dram_addr[8]~2045 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dram_addr_8),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dram_addr[8]~2033_I .clock_enable_mode = "false";
defparam \dram_addr[8]~2033_I .lut_mask = "fff7";
defparam \dram_addr[8]~2033_I .operation_mode = "normal";
defparam \dram_addr[8]~2033_I .output_mode = "comb_only";
defparam \dram_addr[8]~2033_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_E8
flex10ke_lcell \Equal2~39_I (
// Equation(s):
// \Equal2~39  = !blk_rem[1] & !blk_rem[0]

        .dataa(vcc),
        .datab(vcc),
        .datac(blk_rem[1]),
        .datad(blk_rem[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal2~39 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal2~39_I .clock_enable_mode = "false";
defparam \Equal2~39_I .lut_mask = "000f";
defparam \Equal2~39_I .operation_mode = "normal";
defparam \Equal2~39_I .output_mode = "comb_only";
defparam \Equal2~39_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_E8
flex10ke_lcell \blk_rem[2]~I (
// Equation(s):
// blk_rem[2] = DFFEA(\always2~53  $ (!\Equal2~39  & blk_rem[2]), GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(\always2~53 ),
        .datac(\Equal2~39 ),
        .datad(blk_rem[2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(blk_rem[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \blk_rem[2]~I .clock_enable_mode = "true";
defparam \blk_rem[2]~I .lut_mask = "c3cc";
defparam \blk_rem[2]~I .operation_mode = "normal";
defparam \blk_rem[2]~I .output_mode = "reg_only";
defparam \blk_rem[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_E8
flex10ke_lcell \always2~53_I (
// Equation(s):
// \always2~53  = !blk_rem[1] & !blk_rem[0] & !blk_rem[2] & go

        .dataa(blk_rem[1]),
        .datab(blk_rem[0]),
        .datac(blk_rem[2]),
        .datad(go),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always2~53 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always2~53_I .clock_enable_mode = "false";
defparam \always2~53_I .lut_mask = "0100";
defparam \always2~53_I .operation_mode = "normal";
defparam \always2~53_I .output_mode = "comb_only";
defparam \always2~53_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_E8
flex10ke_lcell \blk_rem[0]~I (
// Equation(s):
// blk_rem[0] = DFFEA(\always2~53  $ (!Equal2 & !blk_rem[0]), GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(\always2~53 ),
        .datac(Equal2),
        .datad(blk_rem[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(blk_rem[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \blk_rem[0]~I .clock_enable_mode = "true";
defparam \blk_rem[0]~I .lut_mask = "ccc3";
defparam \blk_rem[0]~I .operation_mode = "normal";
defparam \blk_rem[0]~I .output_mode = "reg_only";
defparam \blk_rem[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_E8
flex10ke_lcell \blk_nrem[1]~68_I (
// Equation(s):
// \blk_nrem[1]~68  = blk_rem[1] & !blk_rem[0] # !blk_rem[1] & (blk_rem[0] # !go & !blk_rem[2])

        .dataa(blk_rem[1]),
        .datab(blk_rem[0]),
        .datac(go),
        .datad(blk_rem[2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\blk_nrem[1]~68 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \blk_nrem[1]~68_I .clock_enable_mode = "false";
defparam \blk_nrem[1]~68_I .lut_mask = "6667";
defparam \blk_nrem[1]~68_I .operation_mode = "normal";
defparam \blk_nrem[1]~68_I .output_mode = "comb_only";
defparam \blk_nrem[1]~68_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_E8
flex10ke_lcell \blk_rem[1]~I (
// Equation(s):
// blk_rem[1] = DFFEA(!\blk_nrem[1]~68 , GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(vcc),
        .datac(vcc),
        .datad(\blk_nrem[1]~68 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(blk_rem[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \blk_rem[1]~I .clock_enable_mode = "true";
defparam \blk_rem[1]~I .lut_mask = "00ff";
defparam \blk_rem[1]~I .operation_mode = "normal";
defparam \blk_rem[1]~I .output_mode = "reg_only";
defparam \blk_rem[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_E2
flex10ke_lcell \Equal1~3_I (
// Equation(s):
// \Equal1~3  = next_cycle_1 # cpu_req & (Equal2 # !next_cycle_0)

        .dataa(next_cycle_0),
        .datab(Equal2),
        .datac(cpu_req),
        .datad(next_cycle_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal1~3 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal1~3_I .clock_enable_mode = "false";
defparam \Equal1~3_I .lut_mask = "ffd0";
defparam \Equal1~3_I .operation_mode = "normal";
defparam \Equal1~3_I .output_mode = "comb_only";
defparam \Equal1~3_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_E1
flex10ke_lcell \vid_nrem[2]~507_I (
// Equation(s):
// \vid_nrem[2]~507  = vid_rem[2] & (vid_rem[1] # vid_rem[0] # \Equal1~3 )

        .dataa(vid_rem[1]),
        .datab(vid_rem[0]),
        .datac(\Equal1~3 ),
        .datad(vid_rem[2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\vid_nrem[2]~507 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vid_nrem[2]~507_I .clock_enable_mode = "false";
defparam \vid_nrem[2]~507_I .lut_mask = "fe00";
defparam \vid_nrem[2]~507_I .operation_mode = "normal";
defparam \vid_nrem[2]~507_I .output_mode = "comb_only";
defparam \vid_nrem[2]~507_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_E1
flex10ke_lcell \vid_rem[2]~I (
// Equation(s):
// vid_rem[2] = DFFEA(!\always2~53  & \vid_nrem[2]~507 , GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(vcc),
        .datac(\always2~53 ),
        .datad(\vid_nrem[2]~507 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vid_rem[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vid_rem[2]~I .clock_enable_mode = "true";
defparam \vid_rem[2]~I .lut_mask = "0f00";
defparam \vid_rem[2]~I .operation_mode = "normal";
defparam \vid_rem[2]~I .output_mode = "reg_only";
defparam \vid_rem[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_E1
flex10ke_lcell \vid_nrem[0]~505_I (
// Equation(s):
// \vid_nrem[0]~505  = \Equal1~3  & (vid_rem[0]) # !\Equal1~3  & !vid_rem[0] & (vid_rem[1] # vid_rem[2])

        .dataa(vid_rem[1]),
        .datab(vid_rem[2]),
        .datac(\Equal1~3 ),
        .datad(vid_rem[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\vid_nrem[0]~505 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vid_nrem[0]~505_I .clock_enable_mode = "false";
defparam \vid_nrem[0]~505_I .lut_mask = "f00e";
defparam \vid_nrem[0]~505_I .operation_mode = "normal";
defparam \vid_nrem[0]~505_I .output_mode = "comb_only";
defparam \vid_nrem[0]~505_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_E1
flex10ke_lcell \vid_nrem[0]~506_I (
// Equation(s):
// \vid_nrem[0]~506  = \always2~53  & (peff7_int_0 $ cpu_req) # !\always2~53  & (\vid_nrem[0]~505 )

        .dataa(peff7_int_0),
        .datab(cpu_req),
        .datac(\always2~53 ),
        .datad(\vid_nrem[0]~505 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\vid_nrem[0]~506 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vid_nrem[0]~506_I .clock_enable_mode = "false";
defparam \vid_nrem[0]~506_I .lut_mask = "6f60";
defparam \vid_nrem[0]~506_I .operation_mode = "normal";
defparam \vid_nrem[0]~506_I .output_mode = "comb_only";
defparam \vid_nrem[0]~506_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_E1
flex10ke_lcell \vid_rem[0]~I (
// Equation(s):
// vid_rem[0] = DFFEA(\vid_nrem[0]~506 , GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(vcc),
        .datac(vcc),
        .datad(\vid_nrem[0]~506 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vid_rem[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vid_rem[0]~I .clock_enable_mode = "true";
defparam \vid_rem[0]~I .lut_mask = "ff00";
defparam \vid_rem[0]~I .operation_mode = "normal";
defparam \vid_rem[0]~I .output_mode = "reg_only";
defparam \vid_rem[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_E1
flex10ke_lcell \vid_nrem[1]~508_I (
// Equation(s):
// \vid_nrem[1]~508  = vid_rem[0] & (vid_rem[1]) # !vid_rem[0] & (\Equal1~3  & (vid_rem[1]) # !\Equal1~3  & vid_rem[2] & !vid_rem[1])

        .dataa(vid_rem[2]),
        .datab(vid_rem[0]),
        .datac(\Equal1~3 ),
        .datad(vid_rem[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\vid_nrem[1]~508 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vid_nrem[1]~508_I .clock_enable_mode = "false";
defparam \vid_nrem[1]~508_I .lut_mask = "fc02";
defparam \vid_nrem[1]~508_I .operation_mode = "normal";
defparam \vid_nrem[1]~508_I .output_mode = "comb_only";
defparam \vid_nrem[1]~508_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_E1
flex10ke_lcell \vid_nrem[1]~509_I (
// Equation(s):
// \vid_nrem[1]~509  = \always2~53  & (peff7_int_0 & cpu_req) # !\always2~53  & \vid_nrem[1]~508 

        .dataa(\always2~53 ),
        .datab(\vid_nrem[1]~508 ),
        .datac(peff7_int_0),
        .datad(cpu_req),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\vid_nrem[1]~509 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vid_nrem[1]~509_I .clock_enable_mode = "false";
defparam \vid_nrem[1]~509_I .lut_mask = "e444";
defparam \vid_nrem[1]~509_I .operation_mode = "normal";
defparam \vid_nrem[1]~509_I .output_mode = "comb_only";
defparam \vid_nrem[1]~509_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_E1
flex10ke_lcell \vid_rem[1]~I (
// Equation(s):
// vid_rem[1] = DFFEA(\vid_nrem[1]~509 , GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(vcc),
        .datac(vcc),
        .datad(\vid_nrem[1]~509 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vid_rem[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vid_rem[1]~I .clock_enable_mode = "true";
defparam \vid_rem[1]~I .lut_mask = "ff00";
defparam \vid_rem[1]~I .operation_mode = "normal";
defparam \vid_rem[1]~I .output_mode = "reg_only";
defparam \vid_rem[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_E8
flex10ke_lcell \next_cycle[0]~255_I (
// Equation(s):
// \next_cycle[0]~255  = vid_rem[2] & blk_rem[2] & (vid_rem[0] $ !blk_rem[0]) # !vid_rem[2] & !blk_rem[2] & (vid_rem[0] $ !blk_rem[0])

        .dataa(vid_rem[2]),
        .datab(vid_rem[0]),
        .datac(blk_rem[0]),
        .datad(blk_rem[2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\next_cycle[0]~255 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \next_cycle[0]~255_I .clock_enable_mode = "false";
defparam \next_cycle[0]~255_I .lut_mask = "8241";
defparam \next_cycle[0]~255_I .operation_mode = "normal";
defparam \next_cycle[0]~255_I .output_mode = "comb_only";
defparam \next_cycle[0]~255_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_E2
flex10ke_lcell \next_cycle[1]~257_I (
// Equation(s):
// \next_cycle[1]~257  = !vid_rem[1] & !vid_rem[0] & !vid_rem[2] & !next_cycle_0

        .dataa(vid_rem[1]),
        .datab(vid_rem[0]),
        .datac(vid_rem[2]),
        .datad(next_cycle_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\next_cycle[1]~257 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \next_cycle[1]~257_I .clock_enable_mode = "false";
defparam \next_cycle[1]~257_I .lut_mask = "0001";
defparam \next_cycle[1]~257_I .operation_mode = "normal";
defparam \next_cycle[1]~257_I .output_mode = "comb_only";
defparam \next_cycle[1]~257_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I1
flex10ke_lcell \post_cbeg~I (
// Equation(s):
// post_cbeg = DFFEA(cbeg, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(cbeg),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(post_cbeg),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \post_cbeg~I .clock_enable_mode = "false";
defparam \post_cbeg~I .lut_mask = "ff00";
defparam \post_cbeg~I .operation_mode = "normal";
defparam \post_cbeg~I .output_mode = "reg_only";
defparam \post_cbeg~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_E2
flex10ke_lcell \curr_cycle[0]~I (
// Equation(s):
// curr_cycle[0] = DFFEA(cpu_req & (Equal2 # !next_cycle_0), GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(next_cycle_0),
        .datac(cpu_req),
        .datad(Equal2),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(curr_cycle[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \curr_cycle[0]~I .clock_enable_mode = "true";
defparam \curr_cycle[0]~I .lut_mask = "f030";
defparam \curr_cycle[0]~I .operation_mode = "normal";
defparam \curr_cycle[0]~I .output_mode = "reg_only";
defparam \curr_cycle[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I1
flex10ke_lcell \curr_cycle[1]~I (
// Equation(s):
// curr_cycle[1] = DFFEA(!next_cycle_1, GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(vcc),
        .datac(vcc),
        .datad(next_cycle_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(curr_cycle[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \curr_cycle[1]~I .clock_enable_mode = "true";
defparam \curr_cycle[1]~I .lut_mask = "00ff";
defparam \curr_cycle[1]~I .operation_mode = "normal";
defparam \curr_cycle[1]~I .output_mode = "reg_only";
defparam \curr_cycle[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I1
flex10ke_lcell \always8~3_I (
// Equation(s):
// \always8~3  = curr_cycle[1] & pre_cend & curr_cycle[0] & cpu_rnw

        .dataa(curr_cycle[1]),
        .datab(pre_cend),
        .datac(curr_cycle[0]),
        .datad(cpu_rnw),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always8~3 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always8~3_I .clock_enable_mode = "false";
defparam \always8~3_I .lut_mask = "8000";
defparam \always8~3_I .operation_mode = "normal";
defparam \always8~3_I .output_mode = "comb_only";
defparam \always8~3_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I19
flex10ke_lcell \dram_addr[7]~2028_I (
// Equation(s):
// \dram_addr[7]~2042  = !peff7_int_0 & !peff7_int_5 & dcnt_0 # !q_01

        .dataa(q_0),
        .datab(peff7_int_0),
        .datac(peff7_int_5),
        .datad(dcnt_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dram_addr[7]~2028 ),
        .regout(),
        .cout(),
        .cascout(\dram_addr[7]~2042 ));
// synopsys translate_off
defparam \dram_addr[7]~2028_I .clock_enable_mode = "false";
defparam \dram_addr[7]~2028_I .lut_mask = "5755";
defparam \dram_addr[7]~2028_I .operation_mode = "normal";
defparam \dram_addr[7]~2028_I .output_mode = "none";
defparam \dram_addr[7]~2028_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I15
flex10ke_lcell \dram_addr[8]~2030_I (
// Equation(s):
// \dram_addr[8]~2045  = !peff7_int_0 & !peff7_int_5 & dcnt_0 # !q_11

        .dataa(q_1),
        .datab(peff7_int_0),
        .datac(peff7_int_5),
        .datad(dcnt_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dram_addr[8]~2030 ),
        .regout(),
        .cout(),
        .cascout(\dram_addr[8]~2045 ));
// synopsys translate_off
defparam \dram_addr[8]~2030_I .clock_enable_mode = "false";
defparam \dram_addr[8]~2030_I .lut_mask = "5755";
defparam \dram_addr[8]~2030_I .operation_mode = "normal";
defparam \dram_addr[8]~2030_I .output_mode = "none";
defparam \dram_addr[8]~2030_I .packed_mode = "false";
// synopsys translate_on

endmodule

module atm_pager (
        romnram,
        page_0,
        page_1,
        page_2,
        page_3,
        page_4,
        dos,
        zneg,
        zpos,
        p7ffd_int_4,
        atm_pen,
        peff7_int_3,
        p7ffd_int_0,
        p7ffd_int_1,
        p7ffd_int_2,
        p7ffd_int_5,
        peff7_int_2,
        p7ffd_int_6,
        stall_count_2,
        atmF7_wr_fclk,
        dos_7ffd_0,
        dos_turn_off,
        dos_exec_stb,
        dos_exec_stb1,
        dos_turn_off1,
        page_5,
        page_6,
        page_7,
        p7ffd_int_7,
        a_14,
        a_15,
        mreq_n,
        fclk,
        m1_n,
        a_8,
        a_11,
        a_12,
        a_13,
        a_10,
        a_9,
        d_0,
        d_1,
        d_2,
        d_3,
        d_4,
        d_5,
        d_6,
        d_7,
        devpor,
        devclrn,
        devoe);
output  romnram;
output  page_0;
output  page_1;
output  page_2;
output  page_3;
output  page_4;
input   dos;
input   zneg;
input   zpos;
input   p7ffd_int_4;
input   atm_pen;
input   peff7_int_3;
input   p7ffd_int_0;
input   p7ffd_int_1;
input   p7ffd_int_2;
input   p7ffd_int_5;
input   peff7_int_2;
input   p7ffd_int_6;
output  stall_count_2;
input   atmF7_wr_fclk;
output  dos_7ffd_0;
output  dos_turn_off;
output  dos_exec_stb;
output  dos_exec_stb1;
output  dos_turn_off1;
output  page_5;
output  page_6;
output  page_7;
input   p7ffd_int_7;
input   a_14;
input   a_15;
input   mreq_n;
input   fclk;
input   m1_n;
input   a_8;
input   a_11;
input   a_12;
input   a_13;
input   a_10;
input   a_9;
input   d_0;
input   d_1;
input   d_2;
input   d_3;
input   d_4;
input   d_5;
input   d_6;
input   d_7;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \ramnrom[1]~68 ;
wire \ramnrom[0]~69 ;
wire \dos_7ffd[1]~82 ;
wire \dos_7ffd[0]~83 ;
wire \always0~60 ;
wire \always0~61 ;
wire \page~3055 ;
wire \pages[0][0] ;
wire \pages[1][0] ;
wire \page~3054 ;
wire \pages[0][1] ;
wire \pages[1][1] ;
wire \page~3057 ;
wire \page~3058 ;
wire \pages[0][2] ;
wire \pages[1][2] ;
wire \page~3060 ;
wire \page~3061 ;
wire \page~3064 ;
wire \pages[0][3] ;
wire \pages[1][3] ;
wire \page~3063 ;
wire \page~3065 ;
wire \pages[0][4] ;
wire \pages[1][4] ;
wire \page~3067 ;
wire \page~3068 ;
wire \stall_count[1]~39 ;
wire m1_n_reg;
wire mreq_n_reg;
wire \dos_exec_stb~120 ;
wire \dos_exec_stb~121 ;
wire \ramnrom[0]~70 ;
wire \pages[0][5] ;
wire \pages[1][5] ;
wire \page~3070 ;
wire \page~3071 ;
wire \pages[0][6] ;
wire \pages[1][6] ;
wire \page~3073 ;
wire \pages[0][7] ;
wire \pages[1][7] ;
wire \page~3075 ;
wire [1:0] dos_7ffd;
wire [1:0] ramnrom;
wire [2:0] stall_count;


// atom is at LC1_C21
flex10ke_lcell \ramnrom[1]~68_I (
// Equation(s):
// \ramnrom[1]~68  = !\a~dataout [14] & !\a~dataout [15] & atmF7_wr_fclk & p7ffd_int_4

        .dataa(a_14),
        .datab(a_15),
        .datac(atmF7_wr_fclk),
        .datad(p7ffd_int_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ramnrom[1]~68 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[1]~68_I .clock_enable_mode = "false";
defparam \ramnrom[1]~68_I .lut_mask = "1000";
defparam \ramnrom[1]~68_I .operation_mode = "normal";
defparam \ramnrom[1]~68_I .output_mode = "comb_only";
defparam \ramnrom[1]~68_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_C21
flex10ke_lcell \ramnrom[0]~69_I (
// Equation(s):
// \ramnrom[0]~69  = !\a~dataout [15] & !\a~dataout [14] & !p7ffd_int_4 & atmF7_wr_fclk

        .dataa(a_15),
        .datab(a_14),
        .datac(p7ffd_int_4),
        .datad(atmF7_wr_fclk),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ramnrom[0]~69 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[0]~69_I .clock_enable_mode = "false";
defparam \ramnrom[0]~69_I .lut_mask = "0100";
defparam \ramnrom[0]~69_I .operation_mode = "normal";
defparam \ramnrom[0]~69_I .output_mode = "comb_only";
defparam \ramnrom[0]~69_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_A11
flex10ke_lcell \dos_7ffd[1]~82_I (
// Equation(s):
// \dos_7ffd[1]~82  = !\a~dataout [14] & !\a~dataout [15] & dos_7ffd_0 & p7ffd_int_4

        .dataa(a_14),
        .datab(a_15),
        .datac(dos_7ffd_0),
        .datad(p7ffd_int_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dos_7ffd[1]~82 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[1]~82_I .clock_enable_mode = "false";
defparam \dos_7ffd[1]~82_I .lut_mask = "1000";
defparam \dos_7ffd[1]~82_I .operation_mode = "normal";
defparam \dos_7ffd[1]~82_I .output_mode = "comb_only";
defparam \dos_7ffd[1]~82_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_A11
flex10ke_lcell \dos_7ffd[0]~83_I (
// Equation(s):
// \dos_7ffd[0]~83  = !\a~dataout [15] & !\a~dataout [14] & !p7ffd_int_4 & dos_7ffd_0

        .dataa(a_15),
        .datab(a_14),
        .datac(p7ffd_int_4),
        .datad(dos_7ffd_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dos_7ffd[0]~83 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[0]~83_I .clock_enable_mode = "false";
defparam \dos_7ffd[0]~83_I .lut_mask = "0100";
defparam \dos_7ffd[0]~83_I .operation_mode = "normal";
defparam \dos_7ffd[0]~83_I .output_mode = "comb_only";
defparam \dos_7ffd[0]~83_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A8
flex10ke_lcell \romnram~I (
// Equation(s):
// romnram = DFFEA(!\always0~60  & !peff7_int_3 # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(atm_pen),
        .datac(\always0~60 ),
        .datad(peff7_int_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(romnram),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \romnram~I .clock_enable_mode = "false";
defparam \romnram~I .lut_mask = "333f";
defparam \romnram~I .operation_mode = "normal";
defparam \romnram~I .output_mode = "reg_only";
defparam \romnram~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A12
flex10ke_lcell \page[0]~I (
// Equation(s):
// page_0 = DFFEA(!peff7_int_3 & (\page~3055  # \page~3054 ) # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(peff7_int_3),
        .datac(\page~3055 ),
        .datad(\page~3054 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[0]~I .clock_enable_mode = "false";
defparam \page[0]~I .lut_mask = "7775";
defparam \page[0]~I .operation_mode = "normal";
defparam \page[0]~I .output_mode = "reg_only";
defparam \page[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_A12
flex10ke_lcell \page[1]~I (
// Equation(s):
// page_1 = DFFEA(!peff7_int_3 & \page~3058  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(atm_pen),
        .datac(peff7_int_3),
        .datad(\page~3058 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[1]~I .clock_enable_mode = "false";
defparam \page[1]~I .lut_mask = "3f33";
defparam \page[1]~I .operation_mode = "normal";
defparam \page[1]~I .output_mode = "reg_only";
defparam \page[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A12
flex10ke_lcell \page[2]~I (
// Equation(s):
// page_2 = DFFEA(!peff7_int_3 & \page~3061  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(atm_pen),
        .datac(peff7_int_3),
        .datad(\page~3061 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[2]~I .clock_enable_mode = "false";
defparam \page[2]~I .lut_mask = "3f33";
defparam \page[2]~I .operation_mode = "normal";
defparam \page[2]~I .output_mode = "reg_only";
defparam \page[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A21
flex10ke_lcell \page[3]~I (
// Equation(s):
// page_3 = DFFEA(\page~3065  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(atm_pen),
        .datad(\page~3065 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[3]~I .clock_enable_mode = "false";
defparam \page[3]~I .lut_mask = "ff0f";
defparam \page[3]~I .operation_mode = "normal";
defparam \page[3]~I .output_mode = "reg_only";
defparam \page[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A21
flex10ke_lcell \page[4]~I (
// Equation(s):
// page_4 = DFFEA(\page~3068  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(atm_pen),
        .datad(\page~3068 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[4]~I .clock_enable_mode = "false";
defparam \page[4]~I .lut_mask = "ff0f";
defparam \page[4]~I .operation_mode = "normal";
defparam \page[4]~I .output_mode = "reg_only";
defparam \page[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A5
flex10ke_lcell \stall_count[2]~I (
// Equation(s):
// stall_count_2 = DFFEA(dos_exec_stb1 # stall_count_2 & (!stall_count[1] # !stall_count[0]), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(stall_count[0]),
        .datab(stall_count[1]),
        .datac(stall_count_2),
        .datad(dos_exec_stb1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(stall_count_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \stall_count[2]~I .clock_enable_mode = "false";
defparam \stall_count[2]~I .lut_mask = "ff70";
defparam \stall_count[2]~I .operation_mode = "normal";
defparam \stall_count[2]~I .output_mode = "reg_only";
defparam \stall_count[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A11
flex10ke_lcell \dos_7ffd[0]~81_I (
// Equation(s):
// dos_7ffd_0 = atmF7_wr_fclk & \a~dataout [11]

        .dataa(vcc),
        .datab(vcc),
        .datac(atmF7_wr_fclk),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dos_7ffd_0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[0]~81_I .clock_enable_mode = "false";
defparam \dos_7ffd[0]~81_I .lut_mask = "f000";
defparam \dos_7ffd[0]~81_I .operation_mode = "normal";
defparam \dos_7ffd[0]~81_I .output_mode = "comb_only";
defparam \dos_7ffd[0]~81_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D7
flex10ke_lcell \dos_turn_off~58_I (
// Equation(s):
// dos_turn_off = !m1_n_reg & !\mreq_n~dataout  & mreq_n_reg & zneg

        .dataa(m1_n_reg),
        .datab(mreq_n),
        .datac(mreq_n_reg),
        .datad(zneg),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dos_turn_off),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_turn_off~58_I .clock_enable_mode = "false";
defparam \dos_turn_off~58_I .lut_mask = "1000";
defparam \dos_turn_off~58_I .operation_mode = "normal";
defparam \dos_turn_off~58_I .output_mode = "comb_only";
defparam \dos_turn_off~58_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A2
flex10ke_lcell \dos_exec_stb~122_I (
// Equation(s):
// dos_exec_stb = \dos_exec_stb~121  & dos_turn_off

        .dataa(vcc),
        .datab(vcc),
        .datac(\dos_exec_stb~121 ),
        .datad(dos_turn_off),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dos_exec_stb),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_exec_stb~122_I .clock_enable_mode = "false";
defparam \dos_exec_stb~122_I .lut_mask = "f000";
defparam \dos_exec_stb~122_I .operation_mode = "normal";
defparam \dos_exec_stb~122_I .output_mode = "comb_only";
defparam \dos_exec_stb~122_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_A2
flex10ke_lcell \dos_exec_stb~123_I (
// Equation(s):
// dos_exec_stb1 = !ramnrom[1] & dos_7ffd[1] & \ramnrom[0]~70  & dos_exec_stb

        .dataa(ramnrom[1]),
        .datab(dos_7ffd[1]),
        .datac(\ramnrom[0]~70 ),
        .datad(dos_exec_stb),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dos_exec_stb1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_exec_stb~123_I .clock_enable_mode = "false";
defparam \dos_exec_stb~123_I .lut_mask = "4000";
defparam \dos_exec_stb~123_I .operation_mode = "normal";
defparam \dos_exec_stb~123_I .output_mode = "comb_only";
defparam \dos_exec_stb~123_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A3
flex10ke_lcell \dos_turn_off~59_I (
// Equation(s):
// dos_turn_off1 = \ramnrom[0]~70  & (p7ffd_int_4 & (ramnrom[1]) # !p7ffd_int_4 & ramnrom[0])

        .dataa(p7ffd_int_4),
        .datab(ramnrom[0]),
        .datac(ramnrom[1]),
        .datad(\ramnrom[0]~70 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dos_turn_off1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_turn_off~59_I .clock_enable_mode = "false";
defparam \dos_turn_off~59_I .lut_mask = "e400";
defparam \dos_turn_off~59_I .operation_mode = "normal";
defparam \dos_turn_off~59_I .output_mode = "comb_only";
defparam \dos_turn_off~59_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A21
flex10ke_lcell \page[5]~I (
// Equation(s):
// page_5 = DFFEA(\page~3071  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(atm_pen),
        .datad(\page~3071 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[5]~I .clock_enable_mode = "false";
defparam \page[5]~I .lut_mask = "ff0f";
defparam \page[5]~I .operation_mode = "normal";
defparam \page[5]~I .output_mode = "reg_only";
defparam \page[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D19
flex10ke_lcell \page[6]~I (
// Equation(s):
// page_6 = DFFEA(\page~3073  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(atm_pen),
        .datad(\page~3073 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[6]~I .clock_enable_mode = "false";
defparam \page[6]~I .lut_mask = "ff0f";
defparam \page[6]~I .operation_mode = "normal";
defparam \page[6]~I .output_mode = "reg_only";
defparam \page[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D19
flex10ke_lcell \page[7]~I (
// Equation(s):
// page_7 = DFFEA(\page~3075  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(atm_pen),
        .datad(\page~3075 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[7]~I .clock_enable_mode = "false";
defparam \page[7]~I .lut_mask = "ff0f";
defparam \page[7]~I .operation_mode = "normal";
defparam \page[7]~I .output_mode = "reg_only";
defparam \page[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A20
flex10ke_lcell \ramnrom[0]~I (
// Equation(s):
// ramnrom[0] = DFFEA(\d[6]~1  # !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[0]~69 , , )

        .dataa(\ramnrom[0]~69 ),
        .datab(vcc),
        .datac(a_11),
        .datad(d_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ramnrom[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[0]~I .clock_enable_mode = "true";
defparam \ramnrom[0]~I .lut_mask = "ff0f";
defparam \ramnrom[0]~I .operation_mode = "normal";
defparam \ramnrom[0]~I .output_mode = "reg_only";
defparam \ramnrom[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_A20
flex10ke_lcell \ramnrom[1]~I (
// Equation(s):
// ramnrom[1] = DFFEA(\d[6]~1  # !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[1]~68 , , )

        .dataa(\ramnrom[1]~68 ),
        .datab(vcc),
        .datac(a_11),
        .datad(d_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ramnrom[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[1]~I .clock_enable_mode = "true";
defparam \ramnrom[1]~I .lut_mask = "ff0f";
defparam \ramnrom[1]~I .operation_mode = "normal";
defparam \ramnrom[1]~I .output_mode = "reg_only";
defparam \ramnrom[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_A20
flex10ke_lcell \always0~60_I (
// Equation(s):
// \always0~60  = p7ffd_int_4 & (ramnrom[1]) # !p7ffd_int_4 & ramnrom[0]

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(ramnrom[0]),
        .datad(ramnrom[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always0~60 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always0~60_I .clock_enable_mode = "false";
defparam \always0~60_I .lut_mask = "fc30";
defparam \always0~60_I .operation_mode = "normal";
defparam \always0~60_I .output_mode = "comb_only";
defparam \always0~60_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A11
flex10ke_lcell \dos_7ffd[0]~I (
// Equation(s):
// dos_7ffd[0] = DFFEA(\d[7]~0 , GLOBAL(\fclk~dataout ), , , \dos_7ffd[0]~83 , , )

        .dataa(\dos_7ffd[0]~83 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dos_7ffd[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[0]~I .clock_enable_mode = "true";
defparam \dos_7ffd[0]~I .lut_mask = "ff00";
defparam \dos_7ffd[0]~I .operation_mode = "normal";
defparam \dos_7ffd[0]~I .output_mode = "reg_only";
defparam \dos_7ffd[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A11
flex10ke_lcell \dos_7ffd[1]~I (
// Equation(s):
// dos_7ffd[1] = DFFEA(\d[7]~0 , GLOBAL(\fclk~dataout ), , , \dos_7ffd[1]~82 , , )

        .dataa(\dos_7ffd[1]~82 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dos_7ffd[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[1]~I .clock_enable_mode = "true";
defparam \dos_7ffd[1]~I .lut_mask = "ff00";
defparam \dos_7ffd[1]~I .operation_mode = "normal";
defparam \dos_7ffd[1]~I .output_mode = "reg_only";
defparam \dos_7ffd[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A11
flex10ke_lcell \always0~61_I (
// Equation(s):
// \always0~61  = p7ffd_int_4 & (dos_7ffd[1]) # !p7ffd_int_4 & dos_7ffd[0]

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(dos_7ffd[0]),
        .datad(dos_7ffd[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always0~61 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always0~61_I .clock_enable_mode = "false";
defparam \always0~61_I .lut_mask = "fc30";
defparam \always0~61_I .operation_mode = "normal";
defparam \always0~61_I .output_mode = "comb_only";
defparam \always0~61_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A12
flex10ke_lcell \page~3055_I (
// Equation(s):
// \page~3055  = \always0~61  & (\always0~60  & (p7ffd_int_0) # !\always0~60  & !dos)

        .dataa(dos),
        .datab(\always0~60 ),
        .datac(p7ffd_int_0),
        .datad(\always0~61 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~3055 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~3055_I .clock_enable_mode = "false";
defparam \page~3055_I .lut_mask = "d100";
defparam \page~3055_I .operation_mode = "normal";
defparam \page~3055_I .output_mode = "comb_only";
defparam \page~3055_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B8
flex10ke_lcell \pages[0][0]~I (
// Equation(s):
// \pages[0][0]  = DFFEA(!\d[0]~7 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~69 , , )

        .dataa(\ramnrom[0]~69 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][0]~I .clock_enable_mode = "true";
defparam \pages[0][0]~I .lut_mask = "00ff";
defparam \pages[0][0]~I .operation_mode = "normal";
defparam \pages[0][0]~I .output_mode = "reg_only";
defparam \pages[0][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B8
flex10ke_lcell \pages[1][0]~I (
// Equation(s):
// \pages[1][0]  = DFFEA(!\d[0]~7 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~68 , , )

        .dataa(\ramnrom[1]~68 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][0]~I .clock_enable_mode = "true";
defparam \pages[1][0]~I .lut_mask = "00ff";
defparam \pages[1][0]~I .operation_mode = "normal";
defparam \pages[1][0]~I .output_mode = "reg_only";
defparam \pages[1][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B8
flex10ke_lcell \page~3054_I (
// Equation(s):
// \page~3054  = !\always0~61  & (p7ffd_int_4 & (\pages[1][0] ) # !p7ffd_int_4 & \pages[0][0] )

        .dataa(\always0~61 ),
        .datab(p7ffd_int_4),
        .datac(\pages[0][0] ),
        .datad(\pages[1][0] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~3054 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~3054_I .clock_enable_mode = "false";
defparam \page~3054_I .lut_mask = "5410";
defparam \page~3054_I .operation_mode = "normal";
defparam \page~3054_I .output_mode = "comb_only";
defparam \page~3054_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A20
flex10ke_lcell \pages[0][1]~I (
// Equation(s):
// \pages[0][1]  = DFFEA(!\d[1]~6 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~69 , , )

        .dataa(\ramnrom[0]~69 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][1]~I .clock_enable_mode = "true";
defparam \pages[0][1]~I .lut_mask = "00ff";
defparam \pages[0][1]~I .operation_mode = "normal";
defparam \pages[0][1]~I .output_mode = "reg_only";
defparam \pages[0][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A20
flex10ke_lcell \pages[1][1]~I (
// Equation(s):
// \pages[1][1]  = DFFEA(!\d[1]~6 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~68 , , )

        .dataa(\ramnrom[1]~68 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][1]~I .clock_enable_mode = "true";
defparam \pages[1][1]~I .lut_mask = "00ff";
defparam \pages[1][1]~I .operation_mode = "normal";
defparam \pages[1][1]~I .output_mode = "reg_only";
defparam \pages[1][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A20
flex10ke_lcell \page~3057_I (
// Equation(s):
// \page~3057  = p7ffd_int_4 & (\pages[1][1] ) # !p7ffd_int_4 & \pages[0][1] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][1] ),
        .datad(\pages[1][1] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~3057 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~3057_I .clock_enable_mode = "false";
defparam \page~3057_I .lut_mask = "fc30";
defparam \page~3057_I .operation_mode = "normal";
defparam \page~3057_I .output_mode = "comb_only";
defparam \page~3057_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A12
flex10ke_lcell \page~3058_I (
// Equation(s):
// \page~3058  = \always0~61  & (\always0~60  & (p7ffd_int_1) # !\always0~60  & \page~3057 ) # !\always0~61  & (\page~3057 )

        .dataa(\always0~61 ),
        .datab(\always0~60 ),
        .datac(\page~3057 ),
        .datad(p7ffd_int_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~3058 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~3058_I .clock_enable_mode = "false";
defparam \page~3058_I .lut_mask = "f870";
defparam \page~3058_I .operation_mode = "normal";
defparam \page~3058_I .output_mode = "comb_only";
defparam \page~3058_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A24
flex10ke_lcell \pages[0][2]~I (
// Equation(s):
// \pages[0][2]  = DFFEA(!\d[2]~5 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~69 , , )

        .dataa(\ramnrom[0]~69 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][2]~I .clock_enable_mode = "true";
defparam \pages[0][2]~I .lut_mask = "00ff";
defparam \pages[0][2]~I .operation_mode = "normal";
defparam \pages[0][2]~I .output_mode = "reg_only";
defparam \pages[0][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A24
flex10ke_lcell \pages[1][2]~I (
// Equation(s):
// \pages[1][2]  = DFFEA(!\d[2]~5 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~68 , , )

        .dataa(\ramnrom[1]~68 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][2]~I .clock_enable_mode = "true";
defparam \pages[1][2]~I .lut_mask = "00ff";
defparam \pages[1][2]~I .operation_mode = "normal";
defparam \pages[1][2]~I .output_mode = "reg_only";
defparam \pages[1][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A24
flex10ke_lcell \page~3060_I (
// Equation(s):
// \page~3060  = p7ffd_int_4 & (\pages[1][2] ) # !p7ffd_int_4 & \pages[0][2] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][2] ),
        .datad(\pages[1][2] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~3060 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~3060_I .clock_enable_mode = "false";
defparam \page~3060_I .lut_mask = "fc30";
defparam \page~3060_I .operation_mode = "normal";
defparam \page~3060_I .output_mode = "comb_only";
defparam \page~3060_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A12
flex10ke_lcell \page~3061_I (
// Equation(s):
// \page~3061  = \always0~61  & (\always0~60  & (p7ffd_int_2) # !\always0~60  & \page~3060 ) # !\always0~61  & (\page~3060 )

        .dataa(\always0~61 ),
        .datab(\always0~60 ),
        .datac(\page~3060 ),
        .datad(p7ffd_int_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~3061 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~3061_I .clock_enable_mode = "false";
defparam \page~3061_I .lut_mask = "f870";
defparam \page~3061_I .operation_mode = "normal";
defparam \page~3061_I .output_mode = "comb_only";
defparam \page~3061_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A21
flex10ke_lcell \page~3064_I (
// Equation(s):
// \page~3064  = !peff7_int_2 & \always0~61  & \always0~60 

        .dataa(vcc),
        .datab(peff7_int_2),
        .datac(\always0~61 ),
        .datad(\always0~60 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~3064 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~3064_I .clock_enable_mode = "false";
defparam \page~3064_I .lut_mask = "3000";
defparam \page~3064_I .operation_mode = "normal";
defparam \page~3064_I .output_mode = "comb_only";
defparam \page~3064_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_A24
flex10ke_lcell \pages[0][3]~I (
// Equation(s):
// \pages[0][3]  = DFFEA(!\d[3]~4 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~69 , , )

        .dataa(\ramnrom[0]~69 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][3]~I .clock_enable_mode = "true";
defparam \pages[0][3]~I .lut_mask = "00ff";
defparam \pages[0][3]~I .operation_mode = "normal";
defparam \pages[0][3]~I .output_mode = "reg_only";
defparam \pages[0][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A24
flex10ke_lcell \pages[1][3]~I (
// Equation(s):
// \pages[1][3]  = DFFEA(!\d[3]~4 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~68 , , )

        .dataa(\ramnrom[1]~68 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][3]~I .clock_enable_mode = "true";
defparam \pages[1][3]~I .lut_mask = "00ff";
defparam \pages[1][3]~I .operation_mode = "normal";
defparam \pages[1][3]~I .output_mode = "reg_only";
defparam \pages[1][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A24
flex10ke_lcell \page~3063_I (
// Equation(s):
// \page~3063  = p7ffd_int_4 & (\pages[1][3] ) # !p7ffd_int_4 & \pages[0][3] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][3] ),
        .datad(\pages[1][3] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~3063 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~3063_I .clock_enable_mode = "false";
defparam \page~3063_I .lut_mask = "fc30";
defparam \page~3063_I .operation_mode = "normal";
defparam \page~3063_I .output_mode = "comb_only";
defparam \page~3063_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A21
flex10ke_lcell \page~3065_I (
// Equation(s):
// \page~3065  = !peff7_int_3 & (\page~3064  & (p7ffd_int_5) # !\page~3064  & \page~3063 )

        .dataa(peff7_int_3),
        .datab(\page~3064 ),
        .datac(\page~3063 ),
        .datad(p7ffd_int_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~3065 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~3065_I .clock_enable_mode = "false";
defparam \page~3065_I .lut_mask = "5410";
defparam \page~3065_I .operation_mode = "normal";
defparam \page~3065_I .output_mode = "comb_only";
defparam \page~3065_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A22
flex10ke_lcell \pages[0][4]~I (
// Equation(s):
// \pages[0][4]  = DFFEA(!\d[4]~3 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~69 , , )

        .dataa(\ramnrom[0]~69 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][4]~I .clock_enable_mode = "true";
defparam \pages[0][4]~I .lut_mask = "00ff";
defparam \pages[0][4]~I .operation_mode = "normal";
defparam \pages[0][4]~I .output_mode = "reg_only";
defparam \pages[0][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A22
flex10ke_lcell \pages[1][4]~I (
// Equation(s):
// \pages[1][4]  = DFFEA(!\d[4]~3 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~68 , , )

        .dataa(\ramnrom[1]~68 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][4]~I .clock_enable_mode = "true";
defparam \pages[1][4]~I .lut_mask = "00ff";
defparam \pages[1][4]~I .operation_mode = "normal";
defparam \pages[1][4]~I .output_mode = "reg_only";
defparam \pages[1][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A22
flex10ke_lcell \page~3067_I (
// Equation(s):
// \page~3067  = p7ffd_int_4 & (\pages[1][4] ) # !p7ffd_int_4 & \pages[0][4] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][4] ),
        .datad(\pages[1][4] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~3067 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~3067_I .clock_enable_mode = "false";
defparam \page~3067_I .lut_mask = "fc30";
defparam \page~3067_I .operation_mode = "normal";
defparam \page~3067_I .output_mode = "comb_only";
defparam \page~3067_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_A21
flex10ke_lcell \page~3068_I (
// Equation(s):
// \page~3068  = !peff7_int_3 & (\page~3064  & (p7ffd_int_6) # !\page~3064  & \page~3067 )

        .dataa(peff7_int_3),
        .datab(\page~3064 ),
        .datac(\page~3067 ),
        .datad(p7ffd_int_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~3068 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~3068_I .clock_enable_mode = "false";
defparam \page~3068_I .lut_mask = "5410";
defparam \page~3068_I .operation_mode = "normal";
defparam \page~3068_I .output_mode = "comb_only";
defparam \page~3068_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A5
flex10ke_lcell \stall_count[0]~I (
// Equation(s):
// stall_count[0] = DFFEA(dos_exec_stb1 # stall_count[0] $ stall_count_2, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(stall_count[0]),
        .datac(stall_count_2),
        .datad(dos_exec_stb1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(stall_count[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \stall_count[0]~I .clock_enable_mode = "false";
defparam \stall_count[0]~I .lut_mask = "ff3c";
defparam \stall_count[0]~I .operation_mode = "normal";
defparam \stall_count[0]~I .output_mode = "reg_only";
defparam \stall_count[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A5
flex10ke_lcell \stall_count[1]~39_I (
// Equation(s):
// \stall_count[1]~39  = !dos_exec_stb1

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(dos_exec_stb1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\stall_count[1]~39 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \stall_count[1]~39_I .clock_enable_mode = "false";
defparam \stall_count[1]~39_I .lut_mask = "00ff";
defparam \stall_count[1]~39_I .operation_mode = "normal";
defparam \stall_count[1]~39_I .output_mode = "comb_only";
defparam \stall_count[1]~39_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A5
flex10ke_lcell \stall_count[1]~I (
// Equation(s):
// stall_count[1] = DFFEA(stall_count[1] $ (stall_count[0] & stall_count_2), GLOBAL(\fclk~dataout ), , , \stall_count[1]~39 , , )

        .dataa(\stall_count[1]~39 ),
        .datab(stall_count[0]),
        .datac(stall_count_2),
        .datad(stall_count[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(stall_count[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \stall_count[1]~I .clock_enable_mode = "true";
defparam \stall_count[1]~I .lut_mask = "3fc0";
defparam \stall_count[1]~I .operation_mode = "normal";
defparam \stall_count[1]~I .output_mode = "reg_only";
defparam \stall_count[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D7
flex10ke_lcell \m1_n_reg~I (
// Equation(s):
// m1_n_reg = DFFEA(\m1_n~dataout , GLOBAL(\fclk~dataout ), , , zpos, , )

        .dataa(zpos),
        .datab(vcc),
        .datac(vcc),
        .datad(m1_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(m1_n_reg),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \m1_n_reg~I .clock_enable_mode = "true";
defparam \m1_n_reg~I .lut_mask = "ff00";
defparam \m1_n_reg~I .operation_mode = "normal";
defparam \m1_n_reg~I .output_mode = "reg_only";
defparam \m1_n_reg~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D7
flex10ke_lcell \mreq_n_reg~I (
// Equation(s):
// mreq_n_reg = DFFEA(\mreq_n~dataout , GLOBAL(\fclk~dataout ), , , zneg, , )

        .dataa(zneg),
        .datab(vcc),
        .datac(vcc),
        .datad(mreq_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(mreq_n_reg),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \mreq_n_reg~I .clock_enable_mode = "true";
defparam \mreq_n_reg~I .lut_mask = "ff00";
defparam \mreq_n_reg~I .operation_mode = "normal";
defparam \mreq_n_reg~I .output_mode = "reg_only";
defparam \mreq_n_reg~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A3
flex10ke_lcell \dos_exec_stb~120_I (
// Equation(s):
// \dos_exec_stb~120  = !\a~dataout [9] & \a~dataout [10] & \a~dataout [13] & p7ffd_int_4

        .dataa(a_9),
        .datab(a_10),
        .datac(a_13),
        .datad(p7ffd_int_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dos_exec_stb~120 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_exec_stb~120_I .clock_enable_mode = "false";
defparam \dos_exec_stb~120_I .lut_mask = "4000";
defparam \dos_exec_stb~120_I .operation_mode = "normal";
defparam \dos_exec_stb~120_I .output_mode = "comb_only";
defparam \dos_exec_stb~120_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A3
flex10ke_lcell \dos_exec_stb~121_I (
// Equation(s):
// \dos_exec_stb~121  = \a~dataout [11] & \a~dataout [8] & \a~dataout [12] & \dos_exec_stb~120 

        .dataa(a_11),
        .datab(a_8),
        .datac(a_12),
        .datad(\dos_exec_stb~120 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dos_exec_stb~121 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_exec_stb~121_I .clock_enable_mode = "false";
defparam \dos_exec_stb~121_I .lut_mask = "8000";
defparam \dos_exec_stb~121_I .operation_mode = "normal";
defparam \dos_exec_stb~121_I .output_mode = "comb_only";
defparam \dos_exec_stb~121_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A4
flex10ke_lcell \ramnrom[0]~70_I (
// Equation(s):
// \ramnrom[0]~70  = !\a~dataout [15] & !\a~dataout [14]

        .dataa(vcc),
        .datab(vcc),
        .datac(a_15),
        .datad(a_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ramnrom[0]~70 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[0]~70_I .clock_enable_mode = "false";
defparam \ramnrom[0]~70_I .lut_mask = "000f";
defparam \ramnrom[0]~70_I .operation_mode = "normal";
defparam \ramnrom[0]~70_I .output_mode = "comb_only";
defparam \ramnrom[0]~70_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A22
flex10ke_lcell \pages[0][5]~I (
// Equation(s):
// \pages[0][5]  = DFFEA(!\d[5]~2 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~69 , , )

        .dataa(\ramnrom[0]~69 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][5]~I .clock_enable_mode = "true";
defparam \pages[0][5]~I .lut_mask = "00ff";
defparam \pages[0][5]~I .operation_mode = "normal";
defparam \pages[0][5]~I .output_mode = "reg_only";
defparam \pages[0][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A22
flex10ke_lcell \pages[1][5]~I (
// Equation(s):
// \pages[1][5]  = DFFEA(!\d[5]~2 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~68 , , )

        .dataa(\ramnrom[1]~68 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][5]~I .clock_enable_mode = "true";
defparam \pages[1][5]~I .lut_mask = "00ff";
defparam \pages[1][5]~I .operation_mode = "normal";
defparam \pages[1][5]~I .output_mode = "reg_only";
defparam \pages[1][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_A22
flex10ke_lcell \page~3070_I (
// Equation(s):
// \page~3070  = p7ffd_int_4 & (\pages[1][5] ) # !p7ffd_int_4 & \pages[0][5] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][5] ),
        .datad(\pages[1][5] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~3070 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~3070_I .clock_enable_mode = "false";
defparam \page~3070_I .lut_mask = "fc30";
defparam \page~3070_I .operation_mode = "normal";
defparam \page~3070_I .output_mode = "comb_only";
defparam \page~3070_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_A21
flex10ke_lcell \page~3071_I (
// Equation(s):
// \page~3071  = !peff7_int_3 & (\page~3064  & (p7ffd_int_7) # !\page~3064  & \page~3070 )

        .dataa(peff7_int_3),
        .datab(\page~3064 ),
        .datac(\page~3070 ),
        .datad(p7ffd_int_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~3071 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~3071_I .clock_enable_mode = "false";
defparam \page~3071_I .lut_mask = "5410";
defparam \page~3071_I .operation_mode = "normal";
defparam \page~3071_I .output_mode = "comb_only";
defparam \page~3071_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D19
flex10ke_lcell \pages[0][6]~I (
// Equation(s):
// \pages[0][6]  = DFFEA(!\d[6]~1  & !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[0]~69 , , )

        .dataa(\ramnrom[0]~69 ),
        .datab(vcc),
        .datac(d_6),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][6]~I .clock_enable_mode = "true";
defparam \pages[0][6]~I .lut_mask = "000f";
defparam \pages[0][6]~I .operation_mode = "normal";
defparam \pages[0][6]~I .output_mode = "reg_only";
defparam \pages[0][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D19
flex10ke_lcell \pages[1][6]~I (
// Equation(s):
// \pages[1][6]  = DFFEA(!\d[6]~1  & !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[1]~68 , , )

        .dataa(\ramnrom[1]~68 ),
        .datab(vcc),
        .datac(d_6),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][6]~I .clock_enable_mode = "true";
defparam \pages[1][6]~I .lut_mask = "000f";
defparam \pages[1][6]~I .operation_mode = "normal";
defparam \pages[1][6]~I .output_mode = "reg_only";
defparam \pages[1][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D19
flex10ke_lcell \page~3073_I (
// Equation(s):
// \page~3073  = !peff7_int_3 & (p7ffd_int_4 & (\pages[1][6] ) # !p7ffd_int_4 & \pages[0][6] )

        .dataa(peff7_int_3),
        .datab(p7ffd_int_4),
        .datac(\pages[0][6] ),
        .datad(\pages[1][6] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~3073 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~3073_I .clock_enable_mode = "false";
defparam \page~3073_I .lut_mask = "5410";
defparam \page~3073_I .operation_mode = "normal";
defparam \page~3073_I .output_mode = "comb_only";
defparam \page~3073_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D19
flex10ke_lcell \pages[0][7]~I (
// Equation(s):
// \pages[0][7]  = DFFEA(!\d[7]~0  & !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[0]~69 , , )

        .dataa(\ramnrom[0]~69 ),
        .datab(vcc),
        .datac(d_7),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][7]~I .clock_enable_mode = "true";
defparam \pages[0][7]~I .lut_mask = "000f";
defparam \pages[0][7]~I .operation_mode = "normal";
defparam \pages[0][7]~I .output_mode = "reg_only";
defparam \pages[0][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D19
flex10ke_lcell \pages[1][7]~I (
// Equation(s):
// \pages[1][7]  = DFFEA(!\d[7]~0  & !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[1]~68 , , )

        .dataa(\ramnrom[1]~68 ),
        .datab(vcc),
        .datac(d_7),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][7]~I .clock_enable_mode = "true";
defparam \pages[1][7]~I .lut_mask = "000f";
defparam \pages[1][7]~I .operation_mode = "normal";
defparam \pages[1][7]~I .output_mode = "reg_only";
defparam \pages[1][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D19
flex10ke_lcell \page~3075_I (
// Equation(s):
// \page~3075  = !peff7_int_3 & (p7ffd_int_4 & (\pages[1][7] ) # !p7ffd_int_4 & \pages[0][7] )

        .dataa(peff7_int_3),
        .datab(p7ffd_int_4),
        .datac(\pages[0][7] ),
        .datad(\pages[1][7] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~3075 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~3075_I .clock_enable_mode = "false";
defparam \page~3075_I .lut_mask = "5410";
defparam \page~3075_I .operation_mode = "normal";
defparam \page~3075_I .output_mode = "comb_only";
defparam \page~3075_I .packed_mode = "false";
// synopsys translate_on

endmodule

module atm_pager_1 (
        romnram,
        page_0,
        page_1,
        page_2,
        page_3,
        page_4,
        dos,
        p7ffd_int_4,
        atm_pen,
        p7ffd_int_0,
        always0,
        p7ffd_int_1,
        p7ffd_int_2,
        p7ffd_int_5,
        peff7_int_2,
        p7ffd_int_6,
        stall_count_2,
        atmF7_wr_fclk,
        dos_7ffd_0,
        dos_exec_stb,
        ramnrom_0,
        dos_exec_stb1,
        page_5,
        page_6,
        page_7,
        p7ffd_int_7,
        a_14,
        a_15,
        fclk,
        a_11,
        d_0,
        d_1,
        d_2,
        d_3,
        d_4,
        d_5,
        d_6,
        d_7,
        devpor,
        devclrn,
        devoe);
output  romnram;
output  page_0;
output  page_1;
output  page_2;
output  page_3;
output  page_4;
input   dos;
input   p7ffd_int_4;
input   atm_pen;
input   p7ffd_int_0;
output  always0;
input   p7ffd_int_1;
input   p7ffd_int_2;
input   p7ffd_int_5;
input   peff7_int_2;
input   p7ffd_int_6;
output  stall_count_2;
input   atmF7_wr_fclk;
input   dos_7ffd_0;
input   dos_exec_stb;
output  ramnrom_0;
output  dos_exec_stb1;
output  page_5;
output  page_6;
output  page_7;
input   p7ffd_int_7;
input   a_14;
input   a_15;
input   fclk;
input   a_11;
input   d_0;
input   d_1;
input   d_2;
input   d_3;
input   d_4;
input   d_5;
input   d_6;
input   d_7;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \dos_7ffd[1]~58 ;
wire \dos_7ffd[0]~59 ;
wire \ramnrom[1]~65 ;
wire \ramnrom[0]~64 ;
wire \always0~48 ;
wire \pages[0][0] ;
wire \pages[1][0] ;
wire \page~1633 ;
wire \page~1632 ;
wire \page~1636 ;
wire \pages[0][1] ;
wire \pages[1][1] ;
wire \page~1635 ;
wire \pages[0][2] ;
wire \pages[1][2] ;
wire \page~1638 ;
wire \page~1641 ;
wire \pages[0][3] ;
wire \pages[1][3] ;
wire \page~1640 ;
wire \pages[0][4] ;
wire \pages[1][4] ;
wire \page~1643 ;
wire \stall_count[1]~39 ;
wire \pages[0][5] ;
wire \pages[1][5] ;
wire \page~1645 ;
wire \pages[0][6] ;
wire \pages[1][6] ;
wire \pages[0][7] ;
wire \pages[1][7] ;
wire [1:0] dos_7ffd;
wire [1:0] ramnrom;
wire [2:0] stall_count;


// atom is at LC6_A16
flex10ke_lcell \dos_7ffd[1]~58_I (
// Equation(s):
// \dos_7ffd[1]~58  = !\a~dataout [15] & dos_7ffd_0 & p7ffd_int_4 & \a~dataout [14]

        .dataa(a_15),
        .datab(dos_7ffd_0),
        .datac(p7ffd_int_4),
        .datad(a_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dos_7ffd[1]~58 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[1]~58_I .clock_enable_mode = "false";
defparam \dos_7ffd[1]~58_I .lut_mask = "4000";
defparam \dos_7ffd[1]~58_I .operation_mode = "normal";
defparam \dos_7ffd[1]~58_I .output_mode = "comb_only";
defparam \dos_7ffd[1]~58_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_A16
flex10ke_lcell \dos_7ffd[0]~59_I (
// Equation(s):
// \dos_7ffd[0]~59  = !\a~dataout [15] & !p7ffd_int_4 & \a~dataout [14] & dos_7ffd_0

        .dataa(a_15),
        .datab(p7ffd_int_4),
        .datac(a_14),
        .datad(dos_7ffd_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dos_7ffd[0]~59 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[0]~59_I .clock_enable_mode = "false";
defparam \dos_7ffd[0]~59_I .lut_mask = "1000";
defparam \dos_7ffd[0]~59_I .operation_mode = "normal";
defparam \dos_7ffd[0]~59_I .output_mode = "comb_only";
defparam \dos_7ffd[0]~59_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_A19
flex10ke_lcell \romnram~I (
// Equation(s):
// romnram = DFFEA(p7ffd_int_4 & !ramnrom[1] # !p7ffd_int_4 & (!ramnrom[0]) # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(ramnrom[1]),
        .datac(ramnrom[0]),
        .datad(p7ffd_int_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(romnram),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \romnram~I .clock_enable_mode = "false";
defparam \romnram~I .lut_mask = "775f";
defparam \romnram~I .operation_mode = "normal";
defparam \romnram~I .output_mode = "reg_only";
defparam \romnram~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A19
flex10ke_lcell \page[0]~I (
// Equation(s):
// page_0 = DFFEA(\always0~48  & (\page~1632 ) # !\always0~48  & \page~1633  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\always0~48 ),
        .datac(\page~1633 ),
        .datad(\page~1632 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[0]~I .clock_enable_mode = "false";
defparam \page[0]~I .lut_mask = "fd75";
defparam \page[0]~I .operation_mode = "normal";
defparam \page[0]~I .output_mode = "reg_only";
defparam \page[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B4
flex10ke_lcell \page[1]~I (
// Equation(s):
// page_1 = DFFEA(\page~1636  & (p7ffd_int_1) # !\page~1636  & \page~1635  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\page~1636 ),
        .datac(\page~1635 ),
        .datad(p7ffd_int_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[1]~I .clock_enable_mode = "false";
defparam \page[1]~I .lut_mask = "fd75";
defparam \page[1]~I .operation_mode = "normal";
defparam \page[1]~I .output_mode = "reg_only";
defparam \page[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B4
flex10ke_lcell \page[2]~I (
// Equation(s):
// page_2 = DFFEA(\page~1636  & (p7ffd_int_2) # !\page~1636  & \page~1638  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\page~1636 ),
        .datac(\page~1638 ),
        .datad(p7ffd_int_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[2]~I .clock_enable_mode = "false";
defparam \page[2]~I .lut_mask = "fd75";
defparam \page[2]~I .operation_mode = "normal";
defparam \page[2]~I .output_mode = "reg_only";
defparam \page[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_B19
flex10ke_lcell \page[3]~I (
// Equation(s):
// page_3 = DFFEA(\page~1641  & (p7ffd_int_5) # !\page~1641  & \page~1640  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\page~1641 ),
        .datac(\page~1640 ),
        .datad(p7ffd_int_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[3]~I .clock_enable_mode = "false";
defparam \page[3]~I .lut_mask = "fd75";
defparam \page[3]~I .operation_mode = "normal";
defparam \page[3]~I .output_mode = "reg_only";
defparam \page[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B19
flex10ke_lcell \page[4]~I (
// Equation(s):
// page_4 = DFFEA(\page~1641  & (p7ffd_int_6) # !\page~1641  & \page~1643  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\page~1641 ),
        .datac(\page~1643 ),
        .datad(p7ffd_int_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[4]~I .clock_enable_mode = "false";
defparam \page[4]~I .lut_mask = "fd75";
defparam \page[4]~I .operation_mode = "normal";
defparam \page[4]~I .output_mode = "reg_only";
defparam \page[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_A19
flex10ke_lcell \always0~47_I (
// Equation(s):
// always0 = p7ffd_int_4 & (ramnrom[1]) # !p7ffd_int_4 & ramnrom[0]

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(ramnrom[0]),
        .datad(ramnrom[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(always0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always0~47_I .clock_enable_mode = "false";
defparam \always0~47_I .lut_mask = "fc30";
defparam \always0~47_I .operation_mode = "normal";
defparam \always0~47_I .output_mode = "comb_only";
defparam \always0~47_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_A9
flex10ke_lcell \stall_count[2]~I (
// Equation(s):
// stall_count_2 = DFFEA(dos_exec_stb1 # stall_count_2 & (!stall_count[1] # !stall_count[0]), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(stall_count[0]),
        .datab(stall_count[1]),
        .datac(stall_count_2),
        .datad(dos_exec_stb1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(stall_count_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \stall_count[2]~I .clock_enable_mode = "false";
defparam \stall_count[2]~I .lut_mask = "ff70";
defparam \stall_count[2]~I .operation_mode = "normal";
defparam \stall_count[2]~I .output_mode = "reg_only";
defparam \stall_count[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_A7
flex10ke_lcell \ramnrom[0]~66_I (
// Equation(s):
// ramnrom_0 = !\a~dataout [15] & \a~dataout [14]

        .dataa(vcc),
        .datab(vcc),
        .datac(a_15),
        .datad(a_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ramnrom_0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[0]~66_I .clock_enable_mode = "false";
defparam \ramnrom[0]~66_I .lut_mask = "0f00";
defparam \ramnrom[0]~66_I .operation_mode = "normal";
defparam \ramnrom[0]~66_I .output_mode = "comb_only";
defparam \ramnrom[0]~66_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_A2
flex10ke_lcell \dos_exec_stb~67_I (
// Equation(s):
// dos_exec_stb1 = !ramnrom[1] & dos_7ffd[1] & ramnrom_0 & dos_exec_stb

        .dataa(ramnrom[1]),
        .datab(dos_7ffd[1]),
        .datac(ramnrom_0),
        .datad(dos_exec_stb),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dos_exec_stb1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_exec_stb~67_I .clock_enable_mode = "false";
defparam \dos_exec_stb~67_I .lut_mask = "4000";
defparam \dos_exec_stb~67_I .operation_mode = "normal";
defparam \dos_exec_stb~67_I .output_mode = "comb_only";
defparam \dos_exec_stb~67_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_B19
flex10ke_lcell \page[5]~I (
// Equation(s):
// page_5 = DFFEA(\page~1641  & (p7ffd_int_7) # !\page~1641  & \page~1645  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\page~1641 ),
        .datac(\page~1645 ),
        .datad(p7ffd_int_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[5]~I .clock_enable_mode = "false";
defparam \page[5]~I .lut_mask = "fd75";
defparam \page[5]~I .operation_mode = "normal";
defparam \page[5]~I .output_mode = "reg_only";
defparam \page[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D23
flex10ke_lcell \page[6]~I (
// Equation(s):
// page_6 = DFFEA(p7ffd_int_4 & (\pages[1][6] ) # !p7ffd_int_4 & \pages[0][6]  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(p7ffd_int_4),
        .datac(\pages[0][6] ),
        .datad(\pages[1][6] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[6]~I .clock_enable_mode = "false";
defparam \page[6]~I .lut_mask = "fd75";
defparam \page[6]~I .operation_mode = "normal";
defparam \page[6]~I .output_mode = "reg_only";
defparam \page[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D23
flex10ke_lcell \page[7]~I (
// Equation(s):
// page_7 = DFFEA(p7ffd_int_4 & (\pages[1][7] ) # !p7ffd_int_4 & \pages[0][7]  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(p7ffd_int_4),
        .datac(\pages[0][7] ),
        .datad(\pages[1][7] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[7]~I .clock_enable_mode = "false";
defparam \page[7]~I .lut_mask = "fd75";
defparam \page[7]~I .operation_mode = "normal";
defparam \page[7]~I .output_mode = "reg_only";
defparam \page[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_C21
flex10ke_lcell \ramnrom[1]~65_I (
// Equation(s):
// \ramnrom[1]~65  = !\a~dataout [15] & p7ffd_int_4 & \a~dataout [14] & atmF7_wr_fclk

        .dataa(a_15),
        .datab(p7ffd_int_4),
        .datac(a_14),
        .datad(atmF7_wr_fclk),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ramnrom[1]~65 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[1]~65_I .clock_enable_mode = "false";
defparam \ramnrom[1]~65_I .lut_mask = "4000";
defparam \ramnrom[1]~65_I .operation_mode = "normal";
defparam \ramnrom[1]~65_I .output_mode = "comb_only";
defparam \ramnrom[1]~65_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A19
flex10ke_lcell \ramnrom[1]~I (
// Equation(s):
// ramnrom[1] = DFFEA(\d[6]~1  # !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(a_11),
        .datad(d_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ramnrom[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[1]~I .clock_enable_mode = "true";
defparam \ramnrom[1]~I .lut_mask = "ff0f";
defparam \ramnrom[1]~I .operation_mode = "normal";
defparam \ramnrom[1]~I .output_mode = "reg_only";
defparam \ramnrom[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_C21
flex10ke_lcell \ramnrom[0]~64_I (
// Equation(s):
// \ramnrom[0]~64  = !\a~dataout [15] & !p7ffd_int_4 & \a~dataout [14] & atmF7_wr_fclk

        .dataa(a_15),
        .datab(p7ffd_int_4),
        .datac(a_14),
        .datad(atmF7_wr_fclk),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ramnrom[0]~64 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[0]~64_I .clock_enable_mode = "false";
defparam \ramnrom[0]~64_I .lut_mask = "1000";
defparam \ramnrom[0]~64_I .operation_mode = "normal";
defparam \ramnrom[0]~64_I .output_mode = "comb_only";
defparam \ramnrom[0]~64_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A19
flex10ke_lcell \ramnrom[0]~I (
// Equation(s):
// ramnrom[0] = DFFEA(\d[6]~1  # !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(a_11),
        .datad(d_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ramnrom[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[0]~I .clock_enable_mode = "true";
defparam \ramnrom[0]~I .lut_mask = "ff0f";
defparam \ramnrom[0]~I .operation_mode = "normal";
defparam \ramnrom[0]~I .output_mode = "reg_only";
defparam \ramnrom[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A16
flex10ke_lcell \dos_7ffd[0]~I (
// Equation(s):
// dos_7ffd[0] = DFFEA(\d[7]~0 , GLOBAL(\fclk~dataout ), , , \dos_7ffd[0]~59 , , )

        .dataa(\dos_7ffd[0]~59 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dos_7ffd[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[0]~I .clock_enable_mode = "true";
defparam \dos_7ffd[0]~I .lut_mask = "ff00";
defparam \dos_7ffd[0]~I .operation_mode = "normal";
defparam \dos_7ffd[0]~I .output_mode = "reg_only";
defparam \dos_7ffd[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A16
flex10ke_lcell \dos_7ffd[1]~I (
// Equation(s):
// dos_7ffd[1] = DFFEA(\d[7]~0 , GLOBAL(\fclk~dataout ), , , \dos_7ffd[1]~58 , , )

        .dataa(\dos_7ffd[1]~58 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dos_7ffd[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[1]~I .clock_enable_mode = "true";
defparam \dos_7ffd[1]~I .lut_mask = "ff00";
defparam \dos_7ffd[1]~I .operation_mode = "normal";
defparam \dos_7ffd[1]~I .output_mode = "reg_only";
defparam \dos_7ffd[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_A19
flex10ke_lcell \always0~48_I (
// Equation(s):
// \always0~48  = p7ffd_int_4 & (dos_7ffd[1]) # !p7ffd_int_4 & dos_7ffd[0]

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(dos_7ffd[0]),
        .datad(dos_7ffd[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always0~48 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always0~48_I .clock_enable_mode = "false";
defparam \always0~48_I .lut_mask = "fc30";
defparam \always0~48_I .operation_mode = "normal";
defparam \always0~48_I .output_mode = "comb_only";
defparam \always0~48_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A35
flex10ke_lcell \pages[0][0]~I (
// Equation(s):
// \pages[0][0]  = DFFEA(!\d[0]~7 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][0]~I .clock_enable_mode = "true";
defparam \pages[0][0]~I .lut_mask = "00ff";
defparam \pages[0][0]~I .operation_mode = "normal";
defparam \pages[0][0]~I .output_mode = "reg_only";
defparam \pages[0][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A35
flex10ke_lcell \pages[1][0]~I (
// Equation(s):
// \pages[1][0]  = DFFEA(!\d[0]~7 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][0]~I .clock_enable_mode = "true";
defparam \pages[1][0]~I .lut_mask = "00ff";
defparam \pages[1][0]~I .operation_mode = "normal";
defparam \pages[1][0]~I .output_mode = "reg_only";
defparam \pages[1][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A35
flex10ke_lcell \page~1633_I (
// Equation(s):
// \page~1633  = p7ffd_int_4 & (\pages[1][0] ) # !p7ffd_int_4 & \pages[0][0] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][0] ),
        .datad(\pages[1][0] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1633 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1633_I .clock_enable_mode = "false";
defparam \page~1633_I .lut_mask = "fc30";
defparam \page~1633_I .operation_mode = "normal";
defparam \page~1633_I .output_mode = "comb_only";
defparam \page~1633_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A19
flex10ke_lcell \page~1632_I (
// Equation(s):
// \page~1632  = always0 & (p7ffd_int_0) # !always0 & !dos

        .dataa(vcc),
        .datab(dos),
        .datac(always0),
        .datad(p7ffd_int_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1632 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1632_I .clock_enable_mode = "false";
defparam \page~1632_I .lut_mask = "f303";
defparam \page~1632_I .operation_mode = "normal";
defparam \page~1632_I .output_mode = "comb_only";
defparam \page~1632_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A19
flex10ke_lcell \page~1636_I (
// Equation(s):
// \page~1636  = \always0~48  & (p7ffd_int_4 & (ramnrom[1]) # !p7ffd_int_4 & ramnrom[0])

        .dataa(p7ffd_int_4),
        .datab(ramnrom[0]),
        .datac(ramnrom[1]),
        .datad(\always0~48 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1636 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1636_I .clock_enable_mode = "false";
defparam \page~1636_I .lut_mask = "e400";
defparam \page~1636_I .operation_mode = "normal";
defparam \page~1636_I .output_mode = "comb_only";
defparam \page~1636_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B20
flex10ke_lcell \pages[0][1]~I (
// Equation(s):
// \pages[0][1]  = DFFEA(!\d[1]~6 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][1]~I .clock_enable_mode = "true";
defparam \pages[0][1]~I .lut_mask = "00ff";
defparam \pages[0][1]~I .operation_mode = "normal";
defparam \pages[0][1]~I .output_mode = "reg_only";
defparam \pages[0][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B20
flex10ke_lcell \pages[1][1]~I (
// Equation(s):
// \pages[1][1]  = DFFEA(!\d[1]~6 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][1]~I .clock_enable_mode = "true";
defparam \pages[1][1]~I .lut_mask = "00ff";
defparam \pages[1][1]~I .operation_mode = "normal";
defparam \pages[1][1]~I .output_mode = "reg_only";
defparam \pages[1][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B20
flex10ke_lcell \page~1635_I (
// Equation(s):
// \page~1635  = p7ffd_int_4 & (\pages[1][1] ) # !p7ffd_int_4 & \pages[0][1] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][1] ),
        .datad(\pages[1][1] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1635 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1635_I .clock_enable_mode = "false";
defparam \page~1635_I .lut_mask = "fc30";
defparam \page~1635_I .operation_mode = "normal";
defparam \page~1635_I .output_mode = "comb_only";
defparam \page~1635_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B12
flex10ke_lcell \pages[0][2]~I (
// Equation(s):
// \pages[0][2]  = DFFEA(!\d[2]~5 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][2]~I .clock_enable_mode = "true";
defparam \pages[0][2]~I .lut_mask = "00ff";
defparam \pages[0][2]~I .operation_mode = "normal";
defparam \pages[0][2]~I .output_mode = "reg_only";
defparam \pages[0][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B12
flex10ke_lcell \pages[1][2]~I (
// Equation(s):
// \pages[1][2]  = DFFEA(!\d[2]~5 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][2]~I .clock_enable_mode = "true";
defparam \pages[1][2]~I .lut_mask = "00ff";
defparam \pages[1][2]~I .operation_mode = "normal";
defparam \pages[1][2]~I .output_mode = "reg_only";
defparam \pages[1][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B12
flex10ke_lcell \page~1638_I (
// Equation(s):
// \page~1638  = p7ffd_int_4 & (\pages[1][2] ) # !p7ffd_int_4 & \pages[0][2] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][2] ),
        .datad(\pages[1][2] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1638 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1638_I .clock_enable_mode = "false";
defparam \page~1638_I .lut_mask = "fc30";
defparam \page~1638_I .operation_mode = "normal";
defparam \page~1638_I .output_mode = "comb_only";
defparam \page~1638_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B19
flex10ke_lcell \page~1641_I (
// Equation(s):
// \page~1641  = !peff7_int_2 & \page~1636 

        .dataa(vcc),
        .datab(vcc),
        .datac(peff7_int_2),
        .datad(\page~1636 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1641 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1641_I .clock_enable_mode = "false";
defparam \page~1641_I .lut_mask = "0f00";
defparam \page~1641_I .operation_mode = "normal";
defparam \page~1641_I .output_mode = "comb_only";
defparam \page~1641_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B21
flex10ke_lcell \pages[0][3]~I (
// Equation(s):
// \pages[0][3]  = DFFEA(!\d[3]~4 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][3]~I .clock_enable_mode = "true";
defparam \pages[0][3]~I .lut_mask = "00ff";
defparam \pages[0][3]~I .operation_mode = "normal";
defparam \pages[0][3]~I .output_mode = "reg_only";
defparam \pages[0][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B21
flex10ke_lcell \pages[1][3]~I (
// Equation(s):
// \pages[1][3]  = DFFEA(!\d[3]~4 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][3]~I .clock_enable_mode = "true";
defparam \pages[1][3]~I .lut_mask = "00ff";
defparam \pages[1][3]~I .operation_mode = "normal";
defparam \pages[1][3]~I .output_mode = "reg_only";
defparam \pages[1][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_B21
flex10ke_lcell \page~1640_I (
// Equation(s):
// \page~1640  = p7ffd_int_4 & (\pages[1][3] ) # !p7ffd_int_4 & \pages[0][3] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][3] ),
        .datad(\pages[1][3] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1640 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1640_I .clock_enable_mode = "false";
defparam \page~1640_I .lut_mask = "fc30";
defparam \page~1640_I .operation_mode = "normal";
defparam \page~1640_I .output_mode = "comb_only";
defparam \page~1640_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B20
flex10ke_lcell \pages[0][4]~I (
// Equation(s):
// \pages[0][4]  = DFFEA(!\d[4]~3 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][4]~I .clock_enable_mode = "true";
defparam \pages[0][4]~I .lut_mask = "00ff";
defparam \pages[0][4]~I .operation_mode = "normal";
defparam \pages[0][4]~I .output_mode = "reg_only";
defparam \pages[0][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B20
flex10ke_lcell \pages[1][4]~I (
// Equation(s):
// \pages[1][4]  = DFFEA(!\d[4]~3 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][4]~I .clock_enable_mode = "true";
defparam \pages[1][4]~I .lut_mask = "00ff";
defparam \pages[1][4]~I .operation_mode = "normal";
defparam \pages[1][4]~I .output_mode = "reg_only";
defparam \pages[1][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B20
flex10ke_lcell \page~1643_I (
// Equation(s):
// \page~1643  = p7ffd_int_4 & (\pages[1][4] ) # !p7ffd_int_4 & \pages[0][4] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][4] ),
        .datad(\pages[1][4] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1643 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1643_I .clock_enable_mode = "false";
defparam \page~1643_I .lut_mask = "fc30";
defparam \page~1643_I .operation_mode = "normal";
defparam \page~1643_I .output_mode = "comb_only";
defparam \page~1643_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A9
flex10ke_lcell \stall_count[0]~I (
// Equation(s):
// stall_count[0] = DFFEA(dos_exec_stb1 # stall_count[0] $ stall_count_2, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(stall_count[0]),
        .datac(stall_count_2),
        .datad(dos_exec_stb1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(stall_count[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \stall_count[0]~I .clock_enable_mode = "false";
defparam \stall_count[0]~I .lut_mask = "ff3c";
defparam \stall_count[0]~I .operation_mode = "normal";
defparam \stall_count[0]~I .output_mode = "reg_only";
defparam \stall_count[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A9
flex10ke_lcell \stall_count[1]~39_I (
// Equation(s):
// \stall_count[1]~39  = !dos_exec_stb1

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(dos_exec_stb1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\stall_count[1]~39 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \stall_count[1]~39_I .clock_enable_mode = "false";
defparam \stall_count[1]~39_I .lut_mask = "00ff";
defparam \stall_count[1]~39_I .operation_mode = "normal";
defparam \stall_count[1]~39_I .output_mode = "comb_only";
defparam \stall_count[1]~39_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A9
flex10ke_lcell \stall_count[1]~I (
// Equation(s):
// stall_count[1] = DFFEA(stall_count[1] $ (stall_count[0] & stall_count_2), GLOBAL(\fclk~dataout ), , , \stall_count[1]~39 , , )

        .dataa(\stall_count[1]~39 ),
        .datab(stall_count[0]),
        .datac(stall_count_2),
        .datad(stall_count[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(stall_count[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \stall_count[1]~I .clock_enable_mode = "true";
defparam \stall_count[1]~I .lut_mask = "3fc0";
defparam \stall_count[1]~I .operation_mode = "normal";
defparam \stall_count[1]~I .output_mode = "reg_only";
defparam \stall_count[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B21
flex10ke_lcell \pages[0][5]~I (
// Equation(s):
// \pages[0][5]  = DFFEA(!\d[5]~2 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][5]~I .clock_enable_mode = "true";
defparam \pages[0][5]~I .lut_mask = "00ff";
defparam \pages[0][5]~I .operation_mode = "normal";
defparam \pages[0][5]~I .output_mode = "reg_only";
defparam \pages[0][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B21
flex10ke_lcell \pages[1][5]~I (
// Equation(s):
// \pages[1][5]  = DFFEA(!\d[5]~2 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][5]~I .clock_enable_mode = "true";
defparam \pages[1][5]~I .lut_mask = "00ff";
defparam \pages[1][5]~I .operation_mode = "normal";
defparam \pages[1][5]~I .output_mode = "reg_only";
defparam \pages[1][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B21
flex10ke_lcell \page~1645_I (
// Equation(s):
// \page~1645  = p7ffd_int_4 & (\pages[1][5] ) # !p7ffd_int_4 & \pages[0][5] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][5] ),
        .datad(\pages[1][5] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1645 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1645_I .clock_enable_mode = "false";
defparam \page~1645_I .lut_mask = "fc30";
defparam \page~1645_I .operation_mode = "normal";
defparam \page~1645_I .output_mode = "comb_only";
defparam \page~1645_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D23
flex10ke_lcell \pages[0][6]~I (
// Equation(s):
// \pages[0][6]  = DFFEA(!\d[6]~1  & !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(d_6),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][6]~I .clock_enable_mode = "true";
defparam \pages[0][6]~I .lut_mask = "000f";
defparam \pages[0][6]~I .operation_mode = "normal";
defparam \pages[0][6]~I .output_mode = "reg_only";
defparam \pages[0][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D23
flex10ke_lcell \pages[1][6]~I (
// Equation(s):
// \pages[1][6]  = DFFEA(!\d[6]~1  & !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(d_6),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][6]~I .clock_enable_mode = "true";
defparam \pages[1][6]~I .lut_mask = "000f";
defparam \pages[1][6]~I .operation_mode = "normal";
defparam \pages[1][6]~I .output_mode = "reg_only";
defparam \pages[1][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D23
flex10ke_lcell \pages[0][7]~I (
// Equation(s):
// \pages[0][7]  = DFFEA(!\d[7]~0  & !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(d_7),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][7]~I .clock_enable_mode = "true";
defparam \pages[0][7]~I .lut_mask = "000f";
defparam \pages[0][7]~I .operation_mode = "normal";
defparam \pages[0][7]~I .output_mode = "reg_only";
defparam \pages[0][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D23
flex10ke_lcell \pages[1][7]~I (
// Equation(s):
// \pages[1][7]  = DFFEA(!\d[7]~0  & !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(d_7),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][7]~I .clock_enable_mode = "true";
defparam \pages[1][7]~I .lut_mask = "000f";
defparam \pages[1][7]~I .operation_mode = "normal";
defparam \pages[1][7]~I .output_mode = "reg_only";
defparam \pages[1][7]~I .packed_mode = "false";
// synopsys translate_on

endmodule

module atm_pager_2 (
        romnram,
        page_0,
        page_1,
        page_2,
        page_3,
        page_4,
        dos,
        p7ffd_int_4,
        atm_pen,
        p7ffd_int_0,
        always0,
        p7ffd_int_1,
        p7ffd_int_2,
        p7ffd_int_5,
        peff7_int_2,
        p7ffd_int_6,
        stall_count_2,
        atmF7_wr_fclk,
        dos_7ffd_0,
        dos_exec_stb,
        ramnrom_0,
        dos_exec_stb1,
        page_5,
        page_6,
        page_7,
        p7ffd_int_7,
        a_14,
        a_15,
        fclk,
        a_11,
        d_0,
        d_1,
        d_2,
        d_3,
        d_4,
        d_5,
        d_6,
        d_7,
        devpor,
        devclrn,
        devoe);
output  romnram;
output  page_0;
output  page_1;
output  page_2;
output  page_3;
output  page_4;
input   dos;
input   p7ffd_int_4;
input   atm_pen;
input   p7ffd_int_0;
output  always0;
input   p7ffd_int_1;
input   p7ffd_int_2;
input   p7ffd_int_5;
input   peff7_int_2;
input   p7ffd_int_6;
output  stall_count_2;
input   atmF7_wr_fclk;
input   dos_7ffd_0;
input   dos_exec_stb;
output  ramnrom_0;
output  dos_exec_stb1;
output  page_5;
output  page_6;
output  page_7;
input   p7ffd_int_7;
input   a_14;
input   a_15;
input   fclk;
input   a_11;
input   d_0;
input   d_1;
input   d_2;
input   d_3;
input   d_4;
input   d_5;
input   d_6;
input   d_7;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \dos_7ffd[1]~58 ;
wire \dos_7ffd[0]~59 ;
wire \ramnrom[1]~65 ;
wire \ramnrom[0]~64 ;
wire \always0~48 ;
wire \pages[0][0] ;
wire \pages[1][0] ;
wire \page~1615 ;
wire \page~1614 ;
wire \page~1618 ;
wire \pages[0][1] ;
wire \pages[1][1] ;
wire \page~1617 ;
wire \pages[0][2] ;
wire \pages[1][2] ;
wire \page~1620 ;
wire \page~1623 ;
wire \pages[0][3] ;
wire \pages[1][3] ;
wire \page~1622 ;
wire \pages[0][4] ;
wire \pages[1][4] ;
wire \page~1625 ;
wire \stall_count[1]~39 ;
wire \pages[0][5] ;
wire \pages[1][5] ;
wire \page~1627 ;
wire \pages[0][6] ;
wire \pages[1][6] ;
wire \pages[0][7] ;
wire \pages[1][7] ;
wire [1:0] dos_7ffd;
wire [1:0] ramnrom;
wire [2:0] stall_count;


// atom is at LC1_A14
flex10ke_lcell \dos_7ffd[1]~58_I (
// Equation(s):
// \dos_7ffd[1]~58  = !\a~dataout [14] & dos_7ffd_0 & p7ffd_int_4 & \a~dataout [15]

        .dataa(a_14),
        .datab(dos_7ffd_0),
        .datac(p7ffd_int_4),
        .datad(a_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dos_7ffd[1]~58 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[1]~58_I .clock_enable_mode = "false";
defparam \dos_7ffd[1]~58_I .lut_mask = "4000";
defparam \dos_7ffd[1]~58_I .operation_mode = "normal";
defparam \dos_7ffd[1]~58_I .output_mode = "comb_only";
defparam \dos_7ffd[1]~58_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A16
flex10ke_lcell \dos_7ffd[0]~59_I (
// Equation(s):
// \dos_7ffd[0]~59  = !\a~dataout [14] & !p7ffd_int_4 & \a~dataout [15] & dos_7ffd_0

        .dataa(a_14),
        .datab(p7ffd_int_4),
        .datac(a_15),
        .datad(dos_7ffd_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dos_7ffd[0]~59 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[0]~59_I .clock_enable_mode = "false";
defparam \dos_7ffd[0]~59_I .lut_mask = "1000";
defparam \dos_7ffd[0]~59_I .operation_mode = "normal";
defparam \dos_7ffd[0]~59_I .output_mode = "comb_only";
defparam \dos_7ffd[0]~59_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A13
flex10ke_lcell \romnram~I (
// Equation(s):
// romnram = DFFEA(p7ffd_int_4 & !ramnrom[1] # !p7ffd_int_4 & (!ramnrom[0]) # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(ramnrom[1]),
        .datac(ramnrom[0]),
        .datad(p7ffd_int_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(romnram),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \romnram~I .clock_enable_mode = "false";
defparam \romnram~I .lut_mask = "775f";
defparam \romnram~I .operation_mode = "normal";
defparam \romnram~I .output_mode = "reg_only";
defparam \romnram~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A13
flex10ke_lcell \page[0]~I (
// Equation(s):
// page_0 = DFFEA(\always0~48  & (\page~1614 ) # !\always0~48  & \page~1615  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\always0~48 ),
        .datac(\page~1615 ),
        .datad(\page~1614 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[0]~I .clock_enable_mode = "false";
defparam \page[0]~I .lut_mask = "fd75";
defparam \page[0]~I .operation_mode = "normal";
defparam \page[0]~I .output_mode = "reg_only";
defparam \page[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B4
flex10ke_lcell \page[1]~I (
// Equation(s):
// page_1 = DFFEA(\page~1618  & (p7ffd_int_1) # !\page~1618  & \page~1617  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\page~1618 ),
        .datac(\page~1617 ),
        .datad(p7ffd_int_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[1]~I .clock_enable_mode = "false";
defparam \page[1]~I .lut_mask = "fd75";
defparam \page[1]~I .operation_mode = "normal";
defparam \page[1]~I .output_mode = "reg_only";
defparam \page[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B4
flex10ke_lcell \page[2]~I (
// Equation(s):
// page_2 = DFFEA(\page~1618  & (p7ffd_int_2) # !\page~1618  & \page~1620  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\page~1618 ),
        .datac(\page~1620 ),
        .datad(p7ffd_int_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[2]~I .clock_enable_mode = "false";
defparam \page[2]~I .lut_mask = "fd75";
defparam \page[2]~I .operation_mode = "normal";
defparam \page[2]~I .output_mode = "reg_only";
defparam \page[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B19
flex10ke_lcell \page[3]~I (
// Equation(s):
// page_3 = DFFEA(\page~1623  & (p7ffd_int_5) # !\page~1623  & \page~1622  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\page~1623 ),
        .datac(\page~1622 ),
        .datad(p7ffd_int_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[3]~I .clock_enable_mode = "false";
defparam \page[3]~I .lut_mask = "fd75";
defparam \page[3]~I .operation_mode = "normal";
defparam \page[3]~I .output_mode = "reg_only";
defparam \page[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B19
flex10ke_lcell \page[4]~I (
// Equation(s):
// page_4 = DFFEA(\page~1623  & (p7ffd_int_6) # !\page~1623  & \page~1625  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\page~1623 ),
        .datac(\page~1625 ),
        .datad(p7ffd_int_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[4]~I .clock_enable_mode = "false";
defparam \page[4]~I .lut_mask = "fd75";
defparam \page[4]~I .operation_mode = "normal";
defparam \page[4]~I .output_mode = "reg_only";
defparam \page[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_A13
flex10ke_lcell \always0~47_I (
// Equation(s):
// always0 = p7ffd_int_4 & (ramnrom[1]) # !p7ffd_int_4 & ramnrom[0]

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(ramnrom[0]),
        .datad(ramnrom[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(always0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always0~47_I .clock_enable_mode = "false";
defparam \always0~47_I .lut_mask = "fc30";
defparam \always0~47_I .operation_mode = "normal";
defparam \always0~47_I .output_mode = "comb_only";
defparam \always0~47_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A8
flex10ke_lcell \stall_count[2]~I (
// Equation(s):
// stall_count_2 = DFFEA(dos_exec_stb1 # stall_count_2 & (!stall_count[1] # !stall_count[0]), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(stall_count[0]),
        .datab(stall_count[1]),
        .datac(stall_count_2),
        .datad(dos_exec_stb1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(stall_count_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \stall_count[2]~I .clock_enable_mode = "false";
defparam \stall_count[2]~I .lut_mask = "ff70";
defparam \stall_count[2]~I .operation_mode = "normal";
defparam \stall_count[2]~I .output_mode = "reg_only";
defparam \stall_count[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_A7
flex10ke_lcell \ramnrom[0]~66_I (
// Equation(s):
// ramnrom_0 = !\a~dataout [14] & \a~dataout [15]

        .dataa(vcc),
        .datab(vcc),
        .datac(a_14),
        .datad(a_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ramnrom_0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[0]~66_I .clock_enable_mode = "false";
defparam \ramnrom[0]~66_I .lut_mask = "0f00";
defparam \ramnrom[0]~66_I .operation_mode = "normal";
defparam \ramnrom[0]~66_I .output_mode = "comb_only";
defparam \ramnrom[0]~66_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A2
flex10ke_lcell \dos_exec_stb~67_I (
// Equation(s):
// dos_exec_stb1 = !ramnrom[1] & dos_7ffd[1] & ramnrom_0 & dos_exec_stb

        .dataa(ramnrom[1]),
        .datab(dos_7ffd[1]),
        .datac(ramnrom_0),
        .datad(dos_exec_stb),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dos_exec_stb1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_exec_stb~67_I .clock_enable_mode = "false";
defparam \dos_exec_stb~67_I .lut_mask = "4000";
defparam \dos_exec_stb~67_I .operation_mode = "normal";
defparam \dos_exec_stb~67_I .output_mode = "comb_only";
defparam \dos_exec_stb~67_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B19
flex10ke_lcell \page[5]~I (
// Equation(s):
// page_5 = DFFEA(\page~1623  & (p7ffd_int_7) # !\page~1623  & \page~1627  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\page~1623 ),
        .datac(\page~1627 ),
        .datad(p7ffd_int_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[5]~I .clock_enable_mode = "false";
defparam \page[5]~I .lut_mask = "fd75";
defparam \page[5]~I .operation_mode = "normal";
defparam \page[5]~I .output_mode = "reg_only";
defparam \page[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_A27
flex10ke_lcell \page[6]~I (
// Equation(s):
// page_6 = DFFEA(p7ffd_int_4 & (\pages[1][6] ) # !p7ffd_int_4 & \pages[0][6]  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(p7ffd_int_4),
        .datac(\pages[0][6] ),
        .datad(\pages[1][6] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[6]~I .clock_enable_mode = "false";
defparam \page[6]~I .lut_mask = "fd75";
defparam \page[6]~I .operation_mode = "normal";
defparam \page[6]~I .output_mode = "reg_only";
defparam \page[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A27
flex10ke_lcell \page[7]~I (
// Equation(s):
// page_7 = DFFEA(p7ffd_int_4 & (\pages[1][7] ) # !p7ffd_int_4 & \pages[0][7]  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(p7ffd_int_4),
        .datac(\pages[0][7] ),
        .datad(\pages[1][7] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[7]~I .clock_enable_mode = "false";
defparam \page[7]~I .lut_mask = "fd75";
defparam \page[7]~I .operation_mode = "normal";
defparam \page[7]~I .output_mode = "reg_only";
defparam \page[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_C21
flex10ke_lcell \ramnrom[1]~65_I (
// Equation(s):
// \ramnrom[1]~65  = !\a~dataout [14] & p7ffd_int_4 & \a~dataout [15] & atmF7_wr_fclk

        .dataa(a_14),
        .datab(p7ffd_int_4),
        .datac(a_15),
        .datad(atmF7_wr_fclk),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ramnrom[1]~65 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[1]~65_I .clock_enable_mode = "false";
defparam \ramnrom[1]~65_I .lut_mask = "4000";
defparam \ramnrom[1]~65_I .operation_mode = "normal";
defparam \ramnrom[1]~65_I .output_mode = "comb_only";
defparam \ramnrom[1]~65_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A25
flex10ke_lcell \ramnrom[1]~I (
// Equation(s):
// ramnrom[1] = DFFEA(\d[6]~1  # !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(a_11),
        .datad(d_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ramnrom[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[1]~I .clock_enable_mode = "true";
defparam \ramnrom[1]~I .lut_mask = "ff0f";
defparam \ramnrom[1]~I .operation_mode = "normal";
defparam \ramnrom[1]~I .output_mode = "reg_only";
defparam \ramnrom[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_C22
flex10ke_lcell \ramnrom[0]~64_I (
// Equation(s):
// \ramnrom[0]~64  = !\a~dataout [14] & !p7ffd_int_4 & \a~dataout [15] & atmF7_wr_fclk

        .dataa(a_14),
        .datab(p7ffd_int_4),
        .datac(a_15),
        .datad(atmF7_wr_fclk),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ramnrom[0]~64 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[0]~64_I .clock_enable_mode = "false";
defparam \ramnrom[0]~64_I .lut_mask = "1000";
defparam \ramnrom[0]~64_I .operation_mode = "normal";
defparam \ramnrom[0]~64_I .output_mode = "comb_only";
defparam \ramnrom[0]~64_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A27
flex10ke_lcell \ramnrom[0]~I (
// Equation(s):
// ramnrom[0] = DFFEA(\d[6]~1  # !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(a_11),
        .datad(d_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ramnrom[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[0]~I .clock_enable_mode = "true";
defparam \ramnrom[0]~I .lut_mask = "ff0f";
defparam \ramnrom[0]~I .operation_mode = "normal";
defparam \ramnrom[0]~I .output_mode = "reg_only";
defparam \ramnrom[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A16
flex10ke_lcell \dos_7ffd[0]~I (
// Equation(s):
// dos_7ffd[0] = DFFEA(\d[7]~0 , GLOBAL(\fclk~dataout ), , , \dos_7ffd[0]~59 , , )

        .dataa(\dos_7ffd[0]~59 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dos_7ffd[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[0]~I .clock_enable_mode = "true";
defparam \dos_7ffd[0]~I .lut_mask = "ff00";
defparam \dos_7ffd[0]~I .operation_mode = "normal";
defparam \dos_7ffd[0]~I .output_mode = "reg_only";
defparam \dos_7ffd[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_A14
flex10ke_lcell \dos_7ffd[1]~I (
// Equation(s):
// dos_7ffd[1] = DFFEA(\d[7]~0 , GLOBAL(\fclk~dataout ), , , \dos_7ffd[1]~58 , , )

        .dataa(\dos_7ffd[1]~58 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dos_7ffd[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[1]~I .clock_enable_mode = "true";
defparam \dos_7ffd[1]~I .lut_mask = "ff00";
defparam \dos_7ffd[1]~I .operation_mode = "normal";
defparam \dos_7ffd[1]~I .output_mode = "reg_only";
defparam \dos_7ffd[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_A13
flex10ke_lcell \always0~48_I (
// Equation(s):
// \always0~48  = p7ffd_int_4 & (dos_7ffd[1]) # !p7ffd_int_4 & dos_7ffd[0]

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(dos_7ffd[0]),
        .datad(dos_7ffd[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always0~48 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always0~48_I .clock_enable_mode = "false";
defparam \always0~48_I .lut_mask = "fc30";
defparam \always0~48_I .operation_mode = "normal";
defparam \always0~48_I .output_mode = "comb_only";
defparam \always0~48_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_A29
flex10ke_lcell \pages[0][0]~I (
// Equation(s):
// \pages[0][0]  = DFFEA(!\d[0]~7 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][0]~I .clock_enable_mode = "true";
defparam \pages[0][0]~I .lut_mask = "00ff";
defparam \pages[0][0]~I .operation_mode = "normal";
defparam \pages[0][0]~I .output_mode = "reg_only";
defparam \pages[0][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A29
flex10ke_lcell \pages[1][0]~I (
// Equation(s):
// \pages[1][0]  = DFFEA(!\d[0]~7 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][0]~I .clock_enable_mode = "true";
defparam \pages[1][0]~I .lut_mask = "00ff";
defparam \pages[1][0]~I .operation_mode = "normal";
defparam \pages[1][0]~I .output_mode = "reg_only";
defparam \pages[1][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A29
flex10ke_lcell \page~1615_I (
// Equation(s):
// \page~1615  = p7ffd_int_4 & (\pages[1][0] ) # !p7ffd_int_4 & \pages[0][0] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][0] ),
        .datad(\pages[1][0] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1615 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1615_I .clock_enable_mode = "false";
defparam \page~1615_I .lut_mask = "fc30";
defparam \page~1615_I .operation_mode = "normal";
defparam \page~1615_I .output_mode = "comb_only";
defparam \page~1615_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_A13
flex10ke_lcell \page~1614_I (
// Equation(s):
// \page~1614  = always0 & (p7ffd_int_0) # !always0 & !dos

        .dataa(vcc),
        .datab(dos),
        .datac(always0),
        .datad(p7ffd_int_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1614 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1614_I .clock_enable_mode = "false";
defparam \page~1614_I .lut_mask = "f303";
defparam \page~1614_I .operation_mode = "normal";
defparam \page~1614_I .output_mode = "comb_only";
defparam \page~1614_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A13
flex10ke_lcell \page~1618_I (
// Equation(s):
// \page~1618  = \always0~48  & (p7ffd_int_4 & (ramnrom[1]) # !p7ffd_int_4 & ramnrom[0])

        .dataa(p7ffd_int_4),
        .datab(ramnrom[0]),
        .datac(ramnrom[1]),
        .datad(\always0~48 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1618 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1618_I .clock_enable_mode = "false";
defparam \page~1618_I .lut_mask = "e400";
defparam \page~1618_I .operation_mode = "normal";
defparam \page~1618_I .output_mode = "comb_only";
defparam \page~1618_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B33
flex10ke_lcell \pages[0][1]~I (
// Equation(s):
// \pages[0][1]  = DFFEA(!\d[1]~6 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][1]~I .clock_enable_mode = "true";
defparam \pages[0][1]~I .lut_mask = "00ff";
defparam \pages[0][1]~I .operation_mode = "normal";
defparam \pages[0][1]~I .output_mode = "reg_only";
defparam \pages[0][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B33
flex10ke_lcell \pages[1][1]~I (
// Equation(s):
// \pages[1][1]  = DFFEA(!\d[1]~6 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][1]~I .clock_enable_mode = "true";
defparam \pages[1][1]~I .lut_mask = "00ff";
defparam \pages[1][1]~I .operation_mode = "normal";
defparam \pages[1][1]~I .output_mode = "reg_only";
defparam \pages[1][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B33
flex10ke_lcell \page~1617_I (
// Equation(s):
// \page~1617  = p7ffd_int_4 & (\pages[1][1] ) # !p7ffd_int_4 & \pages[0][1] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][1] ),
        .datad(\pages[1][1] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1617 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1617_I .clock_enable_mode = "false";
defparam \page~1617_I .lut_mask = "fc30";
defparam \page~1617_I .operation_mode = "normal";
defparam \page~1617_I .output_mode = "comb_only";
defparam \page~1617_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_B33
flex10ke_lcell \pages[0][2]~I (
// Equation(s):
// \pages[0][2]  = DFFEA(!\d[2]~5 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][2]~I .clock_enable_mode = "true";
defparam \pages[0][2]~I .lut_mask = "00ff";
defparam \pages[0][2]~I .operation_mode = "normal";
defparam \pages[0][2]~I .output_mode = "reg_only";
defparam \pages[0][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_B33
flex10ke_lcell \pages[1][2]~I (
// Equation(s):
// \pages[1][2]  = DFFEA(!\d[2]~5 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][2]~I .clock_enable_mode = "true";
defparam \pages[1][2]~I .lut_mask = "00ff";
defparam \pages[1][2]~I .operation_mode = "normal";
defparam \pages[1][2]~I .output_mode = "reg_only";
defparam \pages[1][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B33
flex10ke_lcell \page~1620_I (
// Equation(s):
// \page~1620  = p7ffd_int_4 & (\pages[1][2] ) # !p7ffd_int_4 & \pages[0][2] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][2] ),
        .datad(\pages[1][2] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1620 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1620_I .clock_enable_mode = "false";
defparam \page~1620_I .lut_mask = "fc30";
defparam \page~1620_I .operation_mode = "normal";
defparam \page~1620_I .output_mode = "comb_only";
defparam \page~1620_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B19
flex10ke_lcell \page~1623_I (
// Equation(s):
// \page~1623  = !peff7_int_2 & \page~1618 

        .dataa(vcc),
        .datab(vcc),
        .datac(peff7_int_2),
        .datad(\page~1618 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1623 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1623_I .clock_enable_mode = "false";
defparam \page~1623_I .lut_mask = "0f00";
defparam \page~1623_I .operation_mode = "normal";
defparam \page~1623_I .output_mode = "comb_only";
defparam \page~1623_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B23
flex10ke_lcell \pages[0][3]~I (
// Equation(s):
// \pages[0][3]  = DFFEA(!\d[3]~4 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][3]~I .clock_enable_mode = "true";
defparam \pages[0][3]~I .lut_mask = "00ff";
defparam \pages[0][3]~I .operation_mode = "normal";
defparam \pages[0][3]~I .output_mode = "reg_only";
defparam \pages[0][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B23
flex10ke_lcell \pages[1][3]~I (
// Equation(s):
// \pages[1][3]  = DFFEA(!\d[3]~4 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][3]~I .clock_enable_mode = "true";
defparam \pages[1][3]~I .lut_mask = "00ff";
defparam \pages[1][3]~I .operation_mode = "normal";
defparam \pages[1][3]~I .output_mode = "reg_only";
defparam \pages[1][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B23
flex10ke_lcell \page~1622_I (
// Equation(s):
// \page~1622  = p7ffd_int_4 & (\pages[1][3] ) # !p7ffd_int_4 & \pages[0][3] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][3] ),
        .datad(\pages[1][3] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1622 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1622_I .clock_enable_mode = "false";
defparam \page~1622_I .lut_mask = "fc30";
defparam \page~1622_I .operation_mode = "normal";
defparam \page~1622_I .output_mode = "comb_only";
defparam \page~1622_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_A29
flex10ke_lcell \pages[0][4]~I (
// Equation(s):
// \pages[0][4]  = DFFEA(!\d[4]~3 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][4]~I .clock_enable_mode = "true";
defparam \pages[0][4]~I .lut_mask = "00ff";
defparam \pages[0][4]~I .operation_mode = "normal";
defparam \pages[0][4]~I .output_mode = "reg_only";
defparam \pages[0][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_A29
flex10ke_lcell \pages[1][4]~I (
// Equation(s):
// \pages[1][4]  = DFFEA(!\d[4]~3 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][4]~I .clock_enable_mode = "true";
defparam \pages[1][4]~I .lut_mask = "00ff";
defparam \pages[1][4]~I .operation_mode = "normal";
defparam \pages[1][4]~I .output_mode = "reg_only";
defparam \pages[1][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A29
flex10ke_lcell \page~1625_I (
// Equation(s):
// \page~1625  = p7ffd_int_4 & (\pages[1][4] ) # !p7ffd_int_4 & \pages[0][4] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][4] ),
        .datad(\pages[1][4] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1625 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1625_I .clock_enable_mode = "false";
defparam \page~1625_I .lut_mask = "fc30";
defparam \page~1625_I .operation_mode = "normal";
defparam \page~1625_I .output_mode = "comb_only";
defparam \page~1625_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A8
flex10ke_lcell \stall_count[0]~I (
// Equation(s):
// stall_count[0] = DFFEA(dos_exec_stb1 # stall_count[0] $ stall_count_2, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(stall_count[0]),
        .datac(stall_count_2),
        .datad(dos_exec_stb1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(stall_count[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \stall_count[0]~I .clock_enable_mode = "false";
defparam \stall_count[0]~I .lut_mask = "ff3c";
defparam \stall_count[0]~I .operation_mode = "normal";
defparam \stall_count[0]~I .output_mode = "reg_only";
defparam \stall_count[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A8
flex10ke_lcell \stall_count[1]~39_I (
// Equation(s):
// \stall_count[1]~39  = !dos_exec_stb1

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(dos_exec_stb1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\stall_count[1]~39 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \stall_count[1]~39_I .clock_enable_mode = "false";
defparam \stall_count[1]~39_I .lut_mask = "00ff";
defparam \stall_count[1]~39_I .operation_mode = "normal";
defparam \stall_count[1]~39_I .output_mode = "comb_only";
defparam \stall_count[1]~39_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A8
flex10ke_lcell \stall_count[1]~I (
// Equation(s):
// stall_count[1] = DFFEA(stall_count[1] $ (stall_count[0] & stall_count_2), GLOBAL(\fclk~dataout ), , , \stall_count[1]~39 , , )

        .dataa(\stall_count[1]~39 ),
        .datab(stall_count[0]),
        .datac(stall_count_2),
        .datad(stall_count[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(stall_count[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \stall_count[1]~I .clock_enable_mode = "true";
defparam \stall_count[1]~I .lut_mask = "3fc0";
defparam \stall_count[1]~I .operation_mode = "normal";
defparam \stall_count[1]~I .output_mode = "reg_only";
defparam \stall_count[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B23
flex10ke_lcell \pages[0][5]~I (
// Equation(s):
// \pages[0][5]  = DFFEA(!\d[5]~2 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][5]~I .clock_enable_mode = "true";
defparam \pages[0][5]~I .lut_mask = "00ff";
defparam \pages[0][5]~I .operation_mode = "normal";
defparam \pages[0][5]~I .output_mode = "reg_only";
defparam \pages[0][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B23
flex10ke_lcell \pages[1][5]~I (
// Equation(s):
// \pages[1][5]  = DFFEA(!\d[5]~2 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][5]~I .clock_enable_mode = "true";
defparam \pages[1][5]~I .lut_mask = "00ff";
defparam \pages[1][5]~I .operation_mode = "normal";
defparam \pages[1][5]~I .output_mode = "reg_only";
defparam \pages[1][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B23
flex10ke_lcell \page~1627_I (
// Equation(s):
// \page~1627  = p7ffd_int_4 & (\pages[1][5] ) # !p7ffd_int_4 & \pages[0][5] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][5] ),
        .datad(\pages[1][5] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1627 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1627_I .clock_enable_mode = "false";
defparam \page~1627_I .lut_mask = "fc30";
defparam \page~1627_I .operation_mode = "normal";
defparam \page~1627_I .output_mode = "comb_only";
defparam \page~1627_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A27
flex10ke_lcell \pages[0][6]~I (
// Equation(s):
// \pages[0][6]  = DFFEA(!\d[6]~1  & !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(d_6),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][6]~I .clock_enable_mode = "true";
defparam \pages[0][6]~I .lut_mask = "000f";
defparam \pages[0][6]~I .operation_mode = "normal";
defparam \pages[0][6]~I .output_mode = "reg_only";
defparam \pages[0][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A27
flex10ke_lcell \pages[1][6]~I (
// Equation(s):
// \pages[1][6]  = DFFEA(!\d[6]~1  & !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(d_6),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][6]~I .clock_enable_mode = "true";
defparam \pages[1][6]~I .lut_mask = "000f";
defparam \pages[1][6]~I .operation_mode = "normal";
defparam \pages[1][6]~I .output_mode = "reg_only";
defparam \pages[1][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_A27
flex10ke_lcell \pages[0][7]~I (
// Equation(s):
// \pages[0][7]  = DFFEA(!\d[7]~0  & !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[0]~64 , , )

        .dataa(\ramnrom[0]~64 ),
        .datab(vcc),
        .datac(d_7),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][7]~I .clock_enable_mode = "true";
defparam \pages[0][7]~I .lut_mask = "000f";
defparam \pages[0][7]~I .operation_mode = "normal";
defparam \pages[0][7]~I .output_mode = "reg_only";
defparam \pages[0][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A27
flex10ke_lcell \pages[1][7]~I (
// Equation(s):
// \pages[1][7]  = DFFEA(!\d[7]~0  & !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[1]~65 , , )

        .dataa(\ramnrom[1]~65 ),
        .datab(vcc),
        .datac(d_7),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][7]~I .clock_enable_mode = "true";
defparam \pages[1][7]~I .lut_mask = "000f";
defparam \pages[1][7]~I .operation_mode = "normal";
defparam \pages[1][7]~I .output_mode = "reg_only";
defparam \pages[1][7]~I .packed_mode = "false";
// synopsys translate_on

endmodule

module atm_pager_3 (
        romnram,
        page_0,
        page_1,
        page_2,
        page_3,
        page_4,
        dos,
        p7ffd_int_4,
        atm_pen,
        p7ffd_int_0,
        p7ffd_int_1,
        p7ffd_int_2,
        p7ffd_int_5,
        peff7_int_2,
        p7ffd_int_6,
        stall_count_2,
        atmF7_wr_fclk,
        dos_7ffd_0,
        dos_exec_stb,
        pre_bc1,
        dos_exec_stb1,
        dos_turn_off,
        page_5,
        page_6,
        page_7,
        p7ffd_int_7,
        a_14,
        a_15,
        fclk,
        a_11,
        d_0,
        d_1,
        d_2,
        d_3,
        d_4,
        d_5,
        d_6,
        d_7,
        devpor,
        devclrn,
        devoe);
output  romnram;
output  page_0;
output  page_1;
output  page_2;
output  page_3;
output  page_4;
input   dos;
input   p7ffd_int_4;
input   atm_pen;
input   p7ffd_int_0;
input   p7ffd_int_1;
input   p7ffd_int_2;
input   p7ffd_int_5;
input   peff7_int_2;
input   p7ffd_int_6;
output  stall_count_2;
input   atmF7_wr_fclk;
input   dos_7ffd_0;
input   dos_exec_stb;
input   pre_bc1;
output  dos_exec_stb1;
output  dos_turn_off;
output  page_5;
output  page_6;
output  page_7;
input   p7ffd_int_7;
input   a_14;
input   a_15;
input   fclk;
input   a_11;
input   d_0;
input   d_1;
input   d_2;
input   d_3;
input   d_4;
input   d_5;
input   d_6;
input   d_7;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \dos_7ffd[1]~58 ;
wire \dos_7ffd[0]~59 ;
wire \ramnrom[1]~64 ;
wire \ramnrom[0]~63 ;
wire \always0~48 ;
wire \pages[0][0] ;
wire \pages[1][0] ;
wire \page~1597 ;
wire \always0~47 ;
wire \page~1596 ;
wire \page~1600 ;
wire \pages[0][1] ;
wire \pages[1][1] ;
wire \page~1599 ;
wire \pages[0][2] ;
wire \pages[1][2] ;
wire \page~1602 ;
wire \page~1605 ;
wire \pages[0][3] ;
wire \pages[1][3] ;
wire \page~1604 ;
wire \pages[0][4] ;
wire \pages[1][4] ;
wire \page~1607 ;
wire \stall_count[1]~39 ;
wire \pages[0][5] ;
wire \pages[1][5] ;
wire \page~1609 ;
wire \pages[0][6] ;
wire \pages[1][6] ;
wire \pages[0][7] ;
wire \pages[1][7] ;
wire [1:0] dos_7ffd;
wire [1:0] ramnrom;
wire [2:0] stall_count;


// atom is at LC8_A16
flex10ke_lcell \dos_7ffd[1]~58_I (
// Equation(s):
// \dos_7ffd[1]~58  = \a~dataout [15] & \a~dataout [14] & dos_7ffd_0 & p7ffd_int_4

        .dataa(a_15),
        .datab(a_14),
        .datac(dos_7ffd_0),
        .datad(p7ffd_int_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dos_7ffd[1]~58 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[1]~58_I .clock_enable_mode = "false";
defparam \dos_7ffd[1]~58_I .lut_mask = "8000";
defparam \dos_7ffd[1]~58_I .operation_mode = "normal";
defparam \dos_7ffd[1]~58_I .output_mode = "comb_only";
defparam \dos_7ffd[1]~58_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_A11
flex10ke_lcell \dos_7ffd[0]~59_I (
// Equation(s):
// \dos_7ffd[0]~59  = !p7ffd_int_4 & \a~dataout [15] & \a~dataout [14] & dos_7ffd_0

        .dataa(p7ffd_int_4),
        .datab(a_15),
        .datac(a_14),
        .datad(dos_7ffd_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dos_7ffd[0]~59 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[0]~59_I .clock_enable_mode = "false";
defparam \dos_7ffd[0]~59_I .lut_mask = "4000";
defparam \dos_7ffd[0]~59_I .operation_mode = "normal";
defparam \dos_7ffd[0]~59_I .output_mode = "comb_only";
defparam \dos_7ffd[0]~59_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A10
flex10ke_lcell \romnram~I (
// Equation(s):
// romnram = DFFEA(p7ffd_int_4 & !ramnrom[1] # !p7ffd_int_4 & (!ramnrom[0]) # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(ramnrom[1]),
        .datac(ramnrom[0]),
        .datad(p7ffd_int_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(romnram),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \romnram~I .clock_enable_mode = "false";
defparam \romnram~I .lut_mask = "775f";
defparam \romnram~I .operation_mode = "normal";
defparam \romnram~I .output_mode = "reg_only";
defparam \romnram~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A10
flex10ke_lcell \page[0]~I (
// Equation(s):
// page_0 = DFFEA(\always0~48  & (\page~1596 ) # !\always0~48  & \page~1597  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\always0~48 ),
        .datac(\page~1597 ),
        .datad(\page~1596 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[0]~I .clock_enable_mode = "false";
defparam \page[0]~I .lut_mask = "fd75";
defparam \page[0]~I .operation_mode = "normal";
defparam \page[0]~I .output_mode = "reg_only";
defparam \page[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_B4
flex10ke_lcell \page[1]~I (
// Equation(s):
// page_1 = DFFEA(\page~1600  & (p7ffd_int_1) # !\page~1600  & \page~1599  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\page~1600 ),
        .datac(\page~1599 ),
        .datad(p7ffd_int_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[1]~I .clock_enable_mode = "false";
defparam \page[1]~I .lut_mask = "fd75";
defparam \page[1]~I .operation_mode = "normal";
defparam \page[1]~I .output_mode = "reg_only";
defparam \page[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B4
flex10ke_lcell \page[2]~I (
// Equation(s):
// page_2 = DFFEA(\page~1600  & (p7ffd_int_2) # !\page~1600  & \page~1602  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\page~1600 ),
        .datac(\page~1602 ),
        .datad(p7ffd_int_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[2]~I .clock_enable_mode = "false";
defparam \page[2]~I .lut_mask = "fd75";
defparam \page[2]~I .operation_mode = "normal";
defparam \page[2]~I .output_mode = "reg_only";
defparam \page[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B6
flex10ke_lcell \page[3]~I (
// Equation(s):
// page_3 = DFFEA(\page~1605  & (p7ffd_int_5) # !\page~1605  & \page~1604  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\page~1605 ),
        .datac(\page~1604 ),
        .datad(p7ffd_int_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[3]~I .clock_enable_mode = "false";
defparam \page[3]~I .lut_mask = "fd75";
defparam \page[3]~I .operation_mode = "normal";
defparam \page[3]~I .output_mode = "reg_only";
defparam \page[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B6
flex10ke_lcell \page[4]~I (
// Equation(s):
// page_4 = DFFEA(\page~1605  & (p7ffd_int_6) # !\page~1605  & \page~1607  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\page~1605 ),
        .datac(\page~1607 ),
        .datad(p7ffd_int_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[4]~I .clock_enable_mode = "false";
defparam \page[4]~I .lut_mask = "fd75";
defparam \page[4]~I .operation_mode = "normal";
defparam \page[4]~I .output_mode = "reg_only";
defparam \page[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A6
flex10ke_lcell \stall_count[2]~I (
// Equation(s):
// stall_count_2 = DFFEA(dos_exec_stb1 # stall_count_2 & (!stall_count[1] # !stall_count[0]), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(stall_count[0]),
        .datab(stall_count[1]),
        .datac(stall_count_2),
        .datad(dos_exec_stb1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(stall_count_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \stall_count[2]~I .clock_enable_mode = "false";
defparam \stall_count[2]~I .lut_mask = "ff70";
defparam \stall_count[2]~I .operation_mode = "normal";
defparam \stall_count[2]~I .output_mode = "reg_only";
defparam \stall_count[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A2
flex10ke_lcell \dos_exec_stb~67_I (
// Equation(s):
// dos_exec_stb1 = !ramnrom[1] & dos_7ffd[1] & pre_bc1 & dos_exec_stb

        .dataa(ramnrom[1]),
        .datab(dos_7ffd[1]),
        .datac(pre_bc1),
        .datad(dos_exec_stb),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dos_exec_stb1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_exec_stb~67_I .clock_enable_mode = "false";
defparam \dos_exec_stb~67_I .lut_mask = "4000";
defparam \dos_exec_stb~67_I .operation_mode = "normal";
defparam \dos_exec_stb~67_I .output_mode = "comb_only";
defparam \dos_exec_stb~67_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A7
flex10ke_lcell \dos_turn_off~39_I (
// Equation(s):
// dos_turn_off = \a~dataout [15] & \a~dataout [14] & \always0~47 

        .dataa(vcc),
        .datab(a_15),
        .datac(a_14),
        .datad(\always0~47 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dos_turn_off),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_turn_off~39_I .clock_enable_mode = "false";
defparam \dos_turn_off~39_I .lut_mask = "c000";
defparam \dos_turn_off~39_I .operation_mode = "normal";
defparam \dos_turn_off~39_I .output_mode = "comb_only";
defparam \dos_turn_off~39_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_B6
flex10ke_lcell \page[5]~I (
// Equation(s):
// page_5 = DFFEA(\page~1605  & (p7ffd_int_7) # !\page~1605  & \page~1609  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(\page~1605 ),
        .datac(\page~1609 ),
        .datad(p7ffd_int_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[5]~I .clock_enable_mode = "false";
defparam \page[5]~I .lut_mask = "fd75";
defparam \page[5]~I .operation_mode = "normal";
defparam \page[5]~I .output_mode = "reg_only";
defparam \page[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D21
flex10ke_lcell \page[6]~I (
// Equation(s):
// page_6 = DFFEA(p7ffd_int_4 & (\pages[1][6] ) # !p7ffd_int_4 & \pages[0][6]  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(p7ffd_int_4),
        .datac(\pages[0][6] ),
        .datad(\pages[1][6] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[6]~I .clock_enable_mode = "false";
defparam \page[6]~I .lut_mask = "fd75";
defparam \page[6]~I .operation_mode = "normal";
defparam \page[6]~I .output_mode = "reg_only";
defparam \page[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D21
flex10ke_lcell \page[7]~I (
// Equation(s):
// page_7 = DFFEA(p7ffd_int_4 & (\pages[1][7] ) # !p7ffd_int_4 & \pages[0][7]  # !atm_pen, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(atm_pen),
        .datab(p7ffd_int_4),
        .datac(\pages[0][7] ),
        .datad(\pages[1][7] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(page_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page[7]~I .clock_enable_mode = "false";
defparam \page[7]~I .lut_mask = "fd75";
defparam \page[7]~I .operation_mode = "normal";
defparam \page[7]~I .output_mode = "reg_only";
defparam \page[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_C21
flex10ke_lcell \ramnrom[1]~64_I (
// Equation(s):
// \ramnrom[1]~64  = \a~dataout [15] & \a~dataout [14] & p7ffd_int_4 & atmF7_wr_fclk

        .dataa(a_15),
        .datab(a_14),
        .datac(p7ffd_int_4),
        .datad(atmF7_wr_fclk),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ramnrom[1]~64 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[1]~64_I .clock_enable_mode = "false";
defparam \ramnrom[1]~64_I .lut_mask = "8000";
defparam \ramnrom[1]~64_I .operation_mode = "normal";
defparam \ramnrom[1]~64_I .output_mode = "comb_only";
defparam \ramnrom[1]~64_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A10
flex10ke_lcell \ramnrom[1]~I (
// Equation(s):
// ramnrom[1] = DFFEA(\d[6]~1  # !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[1]~64 , , )

        .dataa(\ramnrom[1]~64 ),
        .datab(vcc),
        .datac(a_11),
        .datad(d_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ramnrom[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[1]~I .clock_enable_mode = "true";
defparam \ramnrom[1]~I .lut_mask = "ff0f";
defparam \ramnrom[1]~I .operation_mode = "normal";
defparam \ramnrom[1]~I .output_mode = "reg_only";
defparam \ramnrom[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_C21
flex10ke_lcell \ramnrom[0]~63_I (
// Equation(s):
// \ramnrom[0]~63  = !p7ffd_int_4 & \a~dataout [15] & \a~dataout [14] & atmF7_wr_fclk

        .dataa(p7ffd_int_4),
        .datab(a_15),
        .datac(a_14),
        .datad(atmF7_wr_fclk),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ramnrom[0]~63 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[0]~63_I .clock_enable_mode = "false";
defparam \ramnrom[0]~63_I .lut_mask = "4000";
defparam \ramnrom[0]~63_I .operation_mode = "normal";
defparam \ramnrom[0]~63_I .output_mode = "comb_only";
defparam \ramnrom[0]~63_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_A10
flex10ke_lcell \ramnrom[0]~I (
// Equation(s):
// ramnrom[0] = DFFEA(\d[6]~1  # !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[0]~63 , , )

        .dataa(\ramnrom[0]~63 ),
        .datab(vcc),
        .datac(a_11),
        .datad(d_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ramnrom[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramnrom[0]~I .clock_enable_mode = "true";
defparam \ramnrom[0]~I .lut_mask = "ff0f";
defparam \ramnrom[0]~I .operation_mode = "normal";
defparam \ramnrom[0]~I .output_mode = "reg_only";
defparam \ramnrom[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A11
flex10ke_lcell \dos_7ffd[0]~I (
// Equation(s):
// dos_7ffd[0] = DFFEA(\d[7]~0 , GLOBAL(\fclk~dataout ), , , \dos_7ffd[0]~59 , , )

        .dataa(\dos_7ffd[0]~59 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dos_7ffd[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[0]~I .clock_enable_mode = "true";
defparam \dos_7ffd[0]~I .lut_mask = "ff00";
defparam \dos_7ffd[0]~I .operation_mode = "normal";
defparam \dos_7ffd[0]~I .output_mode = "reg_only";
defparam \dos_7ffd[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A16
flex10ke_lcell \dos_7ffd[1]~I (
// Equation(s):
// dos_7ffd[1] = DFFEA(\d[7]~0 , GLOBAL(\fclk~dataout ), , , \dos_7ffd[1]~58 , , )

        .dataa(\dos_7ffd[1]~58 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dos_7ffd[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos_7ffd[1]~I .clock_enable_mode = "true";
defparam \dos_7ffd[1]~I .lut_mask = "ff00";
defparam \dos_7ffd[1]~I .operation_mode = "normal";
defparam \dos_7ffd[1]~I .output_mode = "reg_only";
defparam \dos_7ffd[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_A10
flex10ke_lcell \always0~48_I (
// Equation(s):
// \always0~48  = p7ffd_int_4 & (dos_7ffd[1]) # !p7ffd_int_4 & dos_7ffd[0]

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(dos_7ffd[0]),
        .datad(dos_7ffd[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always0~48 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always0~48_I .clock_enable_mode = "false";
defparam \always0~48_I .lut_mask = "fc30";
defparam \always0~48_I .operation_mode = "normal";
defparam \always0~48_I .output_mode = "comb_only";
defparam \always0~48_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B11
flex10ke_lcell \pages[0][0]~I (
// Equation(s):
// \pages[0][0]  = DFFEA(!\d[0]~7 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~63 , , )

        .dataa(\ramnrom[0]~63 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][0]~I .clock_enable_mode = "true";
defparam \pages[0][0]~I .lut_mask = "00ff";
defparam \pages[0][0]~I .operation_mode = "normal";
defparam \pages[0][0]~I .output_mode = "reg_only";
defparam \pages[0][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B11
flex10ke_lcell \pages[1][0]~I (
// Equation(s):
// \pages[1][0]  = DFFEA(!\d[0]~7 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~64 , , )

        .dataa(\ramnrom[1]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][0]~I .clock_enable_mode = "true";
defparam \pages[1][0]~I .lut_mask = "00ff";
defparam \pages[1][0]~I .operation_mode = "normal";
defparam \pages[1][0]~I .output_mode = "reg_only";
defparam \pages[1][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B11
flex10ke_lcell \page~1597_I (
// Equation(s):
// \page~1597  = p7ffd_int_4 & (\pages[1][0] ) # !p7ffd_int_4 & \pages[0][0] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][0] ),
        .datad(\pages[1][0] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1597 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1597_I .clock_enable_mode = "false";
defparam \page~1597_I .lut_mask = "fc30";
defparam \page~1597_I .operation_mode = "normal";
defparam \page~1597_I .output_mode = "comb_only";
defparam \page~1597_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A10
flex10ke_lcell \always0~47_I (
// Equation(s):
// \always0~47  = p7ffd_int_4 & (ramnrom[1]) # !p7ffd_int_4 & ramnrom[0]

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(ramnrom[0]),
        .datad(ramnrom[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always0~47 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always0~47_I .clock_enable_mode = "false";
defparam \always0~47_I .lut_mask = "fc30";
defparam \always0~47_I .operation_mode = "normal";
defparam \always0~47_I .output_mode = "comb_only";
defparam \always0~47_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_A10
flex10ke_lcell \page~1596_I (
// Equation(s):
// \page~1596  = \always0~47  & (p7ffd_int_0) # !\always0~47  & !dos

        .dataa(vcc),
        .datab(dos),
        .datac(\always0~47 ),
        .datad(p7ffd_int_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1596 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1596_I .clock_enable_mode = "false";
defparam \page~1596_I .lut_mask = "f303";
defparam \page~1596_I .operation_mode = "normal";
defparam \page~1596_I .output_mode = "comb_only";
defparam \page~1596_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A10
flex10ke_lcell \page~1600_I (
// Equation(s):
// \page~1600  = \always0~48  & (p7ffd_int_4 & (ramnrom[1]) # !p7ffd_int_4 & ramnrom[0])

        .dataa(p7ffd_int_4),
        .datab(ramnrom[0]),
        .datac(ramnrom[1]),
        .datad(\always0~48 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1600 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1600_I .clock_enable_mode = "false";
defparam \page~1600_I .lut_mask = "e400";
defparam \page~1600_I .operation_mode = "normal";
defparam \page~1600_I .output_mode = "comb_only";
defparam \page~1600_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B11
flex10ke_lcell \pages[0][1]~I (
// Equation(s):
// \pages[0][1]  = DFFEA(!\d[1]~6 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~63 , , )

        .dataa(\ramnrom[0]~63 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][1]~I .clock_enable_mode = "true";
defparam \pages[0][1]~I .lut_mask = "00ff";
defparam \pages[0][1]~I .operation_mode = "normal";
defparam \pages[0][1]~I .output_mode = "reg_only";
defparam \pages[0][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B11
flex10ke_lcell \pages[1][1]~I (
// Equation(s):
// \pages[1][1]  = DFFEA(!\d[1]~6 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~64 , , )

        .dataa(\ramnrom[1]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][1]~I .clock_enable_mode = "true";
defparam \pages[1][1]~I .lut_mask = "00ff";
defparam \pages[1][1]~I .operation_mode = "normal";
defparam \pages[1][1]~I .output_mode = "reg_only";
defparam \pages[1][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B11
flex10ke_lcell \page~1599_I (
// Equation(s):
// \page~1599  = p7ffd_int_4 & (\pages[1][1] ) # !p7ffd_int_4 & \pages[0][1] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][1] ),
        .datad(\pages[1][1] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1599 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1599_I .clock_enable_mode = "false";
defparam \page~1599_I .lut_mask = "fc30";
defparam \page~1599_I .operation_mode = "normal";
defparam \page~1599_I .output_mode = "comb_only";
defparam \page~1599_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B2
flex10ke_lcell \pages[0][2]~I (
// Equation(s):
// \pages[0][2]  = DFFEA(!\d[2]~5 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~63 , , )

        .dataa(\ramnrom[0]~63 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][2]~I .clock_enable_mode = "true";
defparam \pages[0][2]~I .lut_mask = "00ff";
defparam \pages[0][2]~I .operation_mode = "normal";
defparam \pages[0][2]~I .output_mode = "reg_only";
defparam \pages[0][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B2
flex10ke_lcell \pages[1][2]~I (
// Equation(s):
// \pages[1][2]  = DFFEA(!\d[2]~5 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~64 , , )

        .dataa(\ramnrom[1]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][2]~I .clock_enable_mode = "true";
defparam \pages[1][2]~I .lut_mask = "00ff";
defparam \pages[1][2]~I .operation_mode = "normal";
defparam \pages[1][2]~I .output_mode = "reg_only";
defparam \pages[1][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B2
flex10ke_lcell \page~1602_I (
// Equation(s):
// \page~1602  = p7ffd_int_4 & (\pages[1][2] ) # !p7ffd_int_4 & \pages[0][2] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][2] ),
        .datad(\pages[1][2] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1602 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1602_I .clock_enable_mode = "false";
defparam \page~1602_I .lut_mask = "fc30";
defparam \page~1602_I .operation_mode = "normal";
defparam \page~1602_I .output_mode = "comb_only";
defparam \page~1602_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B6
flex10ke_lcell \page~1605_I (
// Equation(s):
// \page~1605  = !peff7_int_2 & \page~1600 

        .dataa(vcc),
        .datab(vcc),
        .datac(peff7_int_2),
        .datad(\page~1600 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1605 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1605_I .clock_enable_mode = "false";
defparam \page~1605_I .lut_mask = "0f00";
defparam \page~1605_I .operation_mode = "normal";
defparam \page~1605_I .output_mode = "comb_only";
defparam \page~1605_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B18
flex10ke_lcell \pages[0][3]~I (
// Equation(s):
// \pages[0][3]  = DFFEA(!\d[3]~4 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~63 , , )

        .dataa(\ramnrom[0]~63 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][3]~I .clock_enable_mode = "true";
defparam \pages[0][3]~I .lut_mask = "00ff";
defparam \pages[0][3]~I .operation_mode = "normal";
defparam \pages[0][3]~I .output_mode = "reg_only";
defparam \pages[0][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B18
flex10ke_lcell \pages[1][3]~I (
// Equation(s):
// \pages[1][3]  = DFFEA(!\d[3]~4 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~64 , , )

        .dataa(\ramnrom[1]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][3]~I .clock_enable_mode = "true";
defparam \pages[1][3]~I .lut_mask = "00ff";
defparam \pages[1][3]~I .operation_mode = "normal";
defparam \pages[1][3]~I .output_mode = "reg_only";
defparam \pages[1][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B18
flex10ke_lcell \page~1604_I (
// Equation(s):
// \page~1604  = p7ffd_int_4 & (\pages[1][3] ) # !p7ffd_int_4 & \pages[0][3] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][3] ),
        .datad(\pages[1][3] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1604 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1604_I .clock_enable_mode = "false";
defparam \page~1604_I .lut_mask = "fc30";
defparam \page~1604_I .operation_mode = "normal";
defparam \page~1604_I .output_mode = "comb_only";
defparam \page~1604_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B2
flex10ke_lcell \pages[0][4]~I (
// Equation(s):
// \pages[0][4]  = DFFEA(!\d[4]~3 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~63 , , )

        .dataa(\ramnrom[0]~63 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][4]~I .clock_enable_mode = "true";
defparam \pages[0][4]~I .lut_mask = "00ff";
defparam \pages[0][4]~I .operation_mode = "normal";
defparam \pages[0][4]~I .output_mode = "reg_only";
defparam \pages[0][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B2
flex10ke_lcell \pages[1][4]~I (
// Equation(s):
// \pages[1][4]  = DFFEA(!\d[4]~3 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~64 , , )

        .dataa(\ramnrom[1]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][4]~I .clock_enable_mode = "true";
defparam \pages[1][4]~I .lut_mask = "00ff";
defparam \pages[1][4]~I .operation_mode = "normal";
defparam \pages[1][4]~I .output_mode = "reg_only";
defparam \pages[1][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B2
flex10ke_lcell \page~1607_I (
// Equation(s):
// \page~1607  = p7ffd_int_4 & (\pages[1][4] ) # !p7ffd_int_4 & \pages[0][4] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][4] ),
        .datad(\pages[1][4] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1607 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1607_I .clock_enable_mode = "false";
defparam \page~1607_I .lut_mask = "fc30";
defparam \page~1607_I .operation_mode = "normal";
defparam \page~1607_I .output_mode = "comb_only";
defparam \page~1607_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A6
flex10ke_lcell \stall_count[0]~I (
// Equation(s):
// stall_count[0] = DFFEA(dos_exec_stb1 # stall_count[0] $ stall_count_2, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(stall_count[0]),
        .datac(stall_count_2),
        .datad(dos_exec_stb1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(stall_count[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \stall_count[0]~I .clock_enable_mode = "false";
defparam \stall_count[0]~I .lut_mask = "ff3c";
defparam \stall_count[0]~I .operation_mode = "normal";
defparam \stall_count[0]~I .output_mode = "reg_only";
defparam \stall_count[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A6
flex10ke_lcell \stall_count[1]~39_I (
// Equation(s):
// \stall_count[1]~39  = !dos_exec_stb1

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(dos_exec_stb1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\stall_count[1]~39 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \stall_count[1]~39_I .clock_enable_mode = "false";
defparam \stall_count[1]~39_I .lut_mask = "00ff";
defparam \stall_count[1]~39_I .operation_mode = "normal";
defparam \stall_count[1]~39_I .output_mode = "comb_only";
defparam \stall_count[1]~39_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A6
flex10ke_lcell \stall_count[1]~I (
// Equation(s):
// stall_count[1] = DFFEA(stall_count[1] $ (stall_count[0] & stall_count_2), GLOBAL(\fclk~dataout ), , , \stall_count[1]~39 , , )

        .dataa(\stall_count[1]~39 ),
        .datab(stall_count[0]),
        .datac(stall_count_2),
        .datad(stall_count[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(stall_count[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \stall_count[1]~I .clock_enable_mode = "true";
defparam \stall_count[1]~I .lut_mask = "3fc0";
defparam \stall_count[1]~I .operation_mode = "normal";
defparam \stall_count[1]~I .output_mode = "reg_only";
defparam \stall_count[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B18
flex10ke_lcell \pages[0][5]~I (
// Equation(s):
// \pages[0][5]  = DFFEA(!\d[5]~2 , GLOBAL(\fclk~dataout ), , , \ramnrom[0]~63 , , )

        .dataa(\ramnrom[0]~63 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][5]~I .clock_enable_mode = "true";
defparam \pages[0][5]~I .lut_mask = "00ff";
defparam \pages[0][5]~I .operation_mode = "normal";
defparam \pages[0][5]~I .output_mode = "reg_only";
defparam \pages[0][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B18
flex10ke_lcell \pages[1][5]~I (
// Equation(s):
// \pages[1][5]  = DFFEA(!\d[5]~2 , GLOBAL(\fclk~dataout ), , , \ramnrom[1]~64 , , )

        .dataa(\ramnrom[1]~64 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][5]~I .clock_enable_mode = "true";
defparam \pages[1][5]~I .lut_mask = "00ff";
defparam \pages[1][5]~I .operation_mode = "normal";
defparam \pages[1][5]~I .output_mode = "reg_only";
defparam \pages[1][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B18
flex10ke_lcell \page~1609_I (
// Equation(s):
// \page~1609  = p7ffd_int_4 & (\pages[1][5] ) # !p7ffd_int_4 & \pages[0][5] 

        .dataa(vcc),
        .datab(p7ffd_int_4),
        .datac(\pages[0][5] ),
        .datad(\pages[1][5] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\page~1609 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \page~1609_I .clock_enable_mode = "false";
defparam \page~1609_I .lut_mask = "fc30";
defparam \page~1609_I .operation_mode = "normal";
defparam \page~1609_I .output_mode = "comb_only";
defparam \page~1609_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D21
flex10ke_lcell \pages[0][6]~I (
// Equation(s):
// \pages[0][6]  = DFFEA(!\d[6]~1  & !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[0]~63 , , )

        .dataa(\ramnrom[0]~63 ),
        .datab(vcc),
        .datac(d_6),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][6]~I .clock_enable_mode = "true";
defparam \pages[0][6]~I .lut_mask = "000f";
defparam \pages[0][6]~I .operation_mode = "normal";
defparam \pages[0][6]~I .output_mode = "reg_only";
defparam \pages[0][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D21
flex10ke_lcell \pages[1][6]~I (
// Equation(s):
// \pages[1][6]  = DFFEA(!\d[6]~1  & !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[1]~64 , , )

        .dataa(\ramnrom[1]~64 ),
        .datab(vcc),
        .datac(d_6),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][6]~I .clock_enable_mode = "true";
defparam \pages[1][6]~I .lut_mask = "000f";
defparam \pages[1][6]~I .operation_mode = "normal";
defparam \pages[1][6]~I .output_mode = "reg_only";
defparam \pages[1][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D21
flex10ke_lcell \pages[0][7]~I (
// Equation(s):
// \pages[0][7]  = DFFEA(!\d[7]~0  & !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[0]~63 , , )

        .dataa(\ramnrom[0]~63 ),
        .datab(vcc),
        .datac(d_7),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[0][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[0][7]~I .clock_enable_mode = "true";
defparam \pages[0][7]~I .lut_mask = "000f";
defparam \pages[0][7]~I .operation_mode = "normal";
defparam \pages[0][7]~I .output_mode = "reg_only";
defparam \pages[0][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D21
flex10ke_lcell \pages[1][7]~I (
// Equation(s):
// \pages[1][7]  = DFFEA(!\d[7]~0  & !\a~dataout [11], GLOBAL(\fclk~dataout ), , , \ramnrom[1]~64 , , )

        .dataa(\ramnrom[1]~64 ),
        .datab(vcc),
        .datac(d_7),
        .datad(a_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pages[1][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages[1][7]~I .clock_enable_mode = "true";
defparam \pages[1][7]~I .lut_mask = "000f";
defparam \pages[1][7]~I .operation_mode = "normal";
defparam \pages[1][7]~I .output_mode = "reg_only";
defparam \pages[1][7]~I .packed_mode = "false";
// synopsys translate_on

endmodule

module dram (
        rst_out_n,
        Mux6,
        Mux5,
        Mux4,
        Mux3,
        ra_0,
        ra_1,
        ra_2,
        ra_3,
        ra_4,
        ra_5,
        ra_6,
        ra_7,
        ra_8,
        ra_9,
        rwe_n,
        rucas_n,
        rlcas_n,
        rras0_n,
        rras1_n,
        cpu_rnw,
        cpu_req,
        Equal2,
        next_cycle_0,
        Selector1,
        next_cycle_1,
        cbeg,
        q_1,
        q_2,
        q_3,
        q_31,
        p7ffd_int_3,
        q_4,
        q_5,
        q_0,
        int_wrdata_0,
        int_wrdata_1,
        int_wrdata_2,
        int_wrdata_3,
        int_wrdata_4,
        int_wrdata_5,
        int_wrdata_6,
        int_wrdata_7,
        next_cycle_01,
        dram_addr_11,
        dram_addr_12,
        dram_addr_13,
        Mux2,
        dram_addr_9,
        Mux1,
        dram_addr_10,
        Mux0,
        rddata_15,
        rddata_6,
        rddata_14,
        rddata_7,
        rddata_1,
        rddata_12,
        rddata_9,
        rddata_4,
        rddata_5,
        rddata_13,
        rddata_2,
        rddata_10,
        rddata_3,
        rddata_11,
        rddata_0,
        rddata_8,
        dram_addr_7,
        dram_addr_8,
        a_3,
        a_4,
        a_0,
        a_1,
        a_2,
        a_6,
        a_5,
        a_7,
        clk,
        a_8,
        a_11,
        a_12,
        a_13,
        a_10,
        a_9,
        rucas_n1,
        rlcas_n1,
        rras0_n1,
        rras1_n1,
        d_0,
        d_1,
        d_2,
        d_3,
        d_4,
        d_5,
        d_6,
        d_7,
        rd_0,
        rd_1,
        rd_2,
        rd_3,
        rd_4,
        rd_5,
        rd_6,
        rd_7,
        rd_8,
        rd_9,
        rd_10,
        rd_11,
        rd_12,
        rd_13,
        rd_14,
        rd_15,
        int_wrdata_01,
        int_wrdata_11,
        int_wrdata_21,
        int_wrdata_31,
        int_wrdata_41,
        int_wrdata_51,
        int_wrdata_61,
        int_wrdata_71,
        devpor,
        devclrn,
        devoe);
input   rst_out_n;
input   Mux6;
input   Mux5;
input   Mux4;
input   Mux3;
output  ra_0;
output  ra_1;
output  ra_2;
output  ra_3;
output  ra_4;
output  ra_5;
output  ra_6;
output  ra_7;
output  ra_8;
output  ra_9;
output  rwe_n;
output  rucas_n;
output  rlcas_n;
output  rras0_n;
output  rras1_n;
input   cpu_rnw;
input   cpu_req;
input   Equal2;
input   next_cycle_0;
output  Selector1;
input   next_cycle_1;
output  cbeg;
input   q_1;
input   q_2;
input   q_3;
input   q_31;
input   p7ffd_int_3;
input   q_4;
input   q_5;
input   q_0;
output  int_wrdata_0;
output  int_wrdata_1;
output  int_wrdata_2;
output  int_wrdata_3;
output  int_wrdata_4;
output  int_wrdata_5;
output  int_wrdata_6;
output  int_wrdata_7;
input   next_cycle_01;
input   dram_addr_11;
input   dram_addr_12;
input   dram_addr_13;
input   Mux2;
input   dram_addr_9;
input   Mux1;
input   dram_addr_10;
input   Mux0;
output  rddata_15;
output  rddata_6;
output  rddata_14;
output  rddata_7;
output  rddata_1;
output  rddata_12;
output  rddata_9;
output  rddata_4;
output  rddata_5;
output  rddata_13;
output  rddata_2;
output  rddata_10;
output  rddata_3;
output  rddata_11;
output  rddata_0;
output  rddata_8;
input   dram_addr_7;
input   dram_addr_8;
input   a_3;
input   a_4;
input   a_0;
input   a_1;
input   a_2;
input   a_6;
input   a_5;
input   a_7;
input   clk;
input   a_8;
input   a_11;
input   a_12;
input   a_13;
input   a_10;
input   a_9;
input   rucas_n1;
input   rlcas_n1;
input   rras0_n1;
input   rras1_n1;
input   d_0;
input   d_1;
input   d_2;
input   d_3;
input   d_4;
input   d_5;
input   d_6;
input   d_7;
input   rd_0;
input   rd_1;
input   rd_2;
input   rd_3;
input   rd_4;
input   rd_5;
input   rd_6;
input   rd_7;
input   rd_8;
input   rd_9;
input   rd_10;
input   rd_11;
input   rd_12;
input   rd_13;
input   rd_14;
input   rd_15;
output  int_wrdata_01;
output  int_wrdata_11;
output  int_wrdata_21;
output  int_wrdata_31;
output  int_wrdata_41;
output  int_wrdata_51;
output  int_wrdata_61;
output  int_wrdata_71;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \state.RD2 ;
wire \state.RD3 ;
wire \state.RD4 ;
wire \state.WR1 ;
wire \state.WR2 ;
wire \state.WR3 ;
wire \state.WR4 ;
wire \state.RFSH1 ;
wire \state.RFSH2 ;
wire \state.RFSH3 ;
wire \state.RFSH4 ;
wire \WideOr0~18 ;
wire \state.RD1 ;
wire \int_addr[1]~144 ;
wire \Selector0~28 ;
wire WideOr3;
wire \Selector5~69 ;
wire \Selector6~67 ;
wire \state.RFSH1~33 ;
wire \WideOr3~18 ;
wire rfsh_alt;
wire \Selector3~80 ;
wire \Selector4~49 ;
wire [20:0] int_addr;
wire [1:0] int_bsel;
wire [1:0] rst_sync;


// atom is at LC1_I15
flex10ke_lcell \ra[0]~I (
// Equation(s):
// ra_0 = DFFEA(\state.RD1  & (int_addr[1]) # !\state.RD1  & (\state.WR1  & (int_addr[1]) # !\state.WR1  & int_addr[11]), !GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\state.RD1 ),
        .datab(\state.WR1 ),
        .datac(int_addr[11]),
        .datad(int_addr[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(!clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ra_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ra[0]~I .clock_enable_mode = "false";
defparam \ra[0]~I .lut_mask = "fe10";
defparam \ra[0]~I .operation_mode = "normal";
defparam \ra[0]~I .output_mode = "reg_only";
defparam \ra[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I13
flex10ke_lcell \ra[1]~I (
// Equation(s):
// ra_1 = DFFEA(\state.RD1  & (int_addr[2]) # !\state.RD1  & (\state.WR1  & (int_addr[2]) # !\state.WR1  & int_addr[12]), !GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\state.RD1 ),
        .datab(\state.WR1 ),
        .datac(int_addr[12]),
        .datad(int_addr[2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(!clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ra_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ra[1]~I .clock_enable_mode = "false";
defparam \ra[1]~I .lut_mask = "fe10";
defparam \ra[1]~I .operation_mode = "normal";
defparam \ra[1]~I .output_mode = "reg_only";
defparam \ra[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I13
flex10ke_lcell \ra[2]~I (
// Equation(s):
// ra_2 = DFFEA(\state.RD1  & (int_addr[3]) # !\state.RD1  & (\state.WR1  & (int_addr[3]) # !\state.WR1  & int_addr[13]), !GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\state.RD1 ),
        .datab(\state.WR1 ),
        .datac(int_addr[13]),
        .datad(int_addr[3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(!clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ra_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ra[2]~I .clock_enable_mode = "false";
defparam \ra[2]~I .lut_mask = "fe10";
defparam \ra[2]~I .operation_mode = "normal";
defparam \ra[2]~I .output_mode = "reg_only";
defparam \ra[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I11
flex10ke_lcell \ra[3]~I (
// Equation(s):
// ra_3 = DFFEA(\state.RD1  & (int_addr[4]) # !\state.RD1  & (\state.WR1  & (int_addr[4]) # !\state.WR1  & int_addr[14]), !GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\state.RD1 ),
        .datab(\state.WR1 ),
        .datac(int_addr[14]),
        .datad(int_addr[4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(!clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ra_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ra[3]~I .clock_enable_mode = "false";
defparam \ra[3]~I .lut_mask = "fe10";
defparam \ra[3]~I .operation_mode = "normal";
defparam \ra[3]~I .output_mode = "reg_only";
defparam \ra[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I10
flex10ke_lcell \ra[4]~I (
// Equation(s):
// ra_4 = DFFEA(\state.RD1  & (int_addr[5]) # !\state.RD1  & (\state.WR1  & (int_addr[5]) # !\state.WR1  & int_addr[15]), !GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\state.RD1 ),
        .datab(\state.WR1 ),
        .datac(int_addr[15]),
        .datad(int_addr[5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(!clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ra_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ra[4]~I .clock_enable_mode = "false";
defparam \ra[4]~I .lut_mask = "fe10";
defparam \ra[4]~I .operation_mode = "normal";
defparam \ra[4]~I .output_mode = "reg_only";
defparam \ra[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I11
flex10ke_lcell \ra[5]~I (
// Equation(s):
// ra_5 = DFFEA(\state.RD1  & (int_addr[6]) # !\state.RD1  & (\state.WR1  & (int_addr[6]) # !\state.WR1  & int_addr[16]), !GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\state.RD1 ),
        .datab(\state.WR1 ),
        .datac(int_addr[16]),
        .datad(int_addr[6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(!clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ra_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ra[5]~I .clock_enable_mode = "false";
defparam \ra[5]~I .lut_mask = "fe10";
defparam \ra[5]~I .operation_mode = "normal";
defparam \ra[5]~I .output_mode = "reg_only";
defparam \ra[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I13
flex10ke_lcell \ra[6]~I (
// Equation(s):
// ra_6 = DFFEA(\state.RD1  & (int_addr[7]) # !\state.RD1  & (\state.WR1  & (int_addr[7]) # !\state.WR1  & int_addr[17]), !GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\state.RD1 ),
        .datab(\state.WR1 ),
        .datac(int_addr[17]),
        .datad(int_addr[7]),
        .aclr(gnd),
        .aload(gnd),
        .clk(!clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ra_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ra[6]~I .clock_enable_mode = "false";
defparam \ra[6]~I .lut_mask = "fe10";
defparam \ra[6]~I .operation_mode = "normal";
defparam \ra[6]~I .output_mode = "reg_only";
defparam \ra[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I15
flex10ke_lcell \ra[7]~I (
// Equation(s):
// ra_7 = DFFEA(\state.RD1  & (int_addr[8]) # !\state.RD1  & (\state.WR1  & (int_addr[8]) # !\state.WR1  & int_addr[18]), !GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\state.RD1 ),
        .datab(\state.WR1 ),
        .datac(int_addr[18]),
        .datad(int_addr[8]),
        .aclr(gnd),
        .aload(gnd),
        .clk(!clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ra_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ra[7]~I .clock_enable_mode = "false";
defparam \ra[7]~I .lut_mask = "fe10";
defparam \ra[7]~I .operation_mode = "normal";
defparam \ra[7]~I .output_mode = "reg_only";
defparam \ra[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I17
flex10ke_lcell \ra[8]~I (
// Equation(s):
// ra_8 = DFFEA(\state.RD1  & (int_addr[9]) # !\state.RD1  & (\state.WR1  & (int_addr[9]) # !\state.WR1  & int_addr[19]), !GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\state.RD1 ),
        .datab(\state.WR1 ),
        .datac(int_addr[19]),
        .datad(int_addr[9]),
        .aclr(gnd),
        .aload(gnd),
        .clk(!clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ra_8),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ra[8]~I .clock_enable_mode = "false";
defparam \ra[8]~I .lut_mask = "fe10";
defparam \ra[8]~I .operation_mode = "normal";
defparam \ra[8]~I .output_mode = "reg_only";
defparam \ra[8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I17
flex10ke_lcell \ra[9]~I (
// Equation(s):
// ra_9 = DFFEA(\state.RD1  & (int_addr[10]) # !\state.RD1  & (\state.WR1  & (int_addr[10]) # !\state.WR1  & int_addr[20]), !GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\state.RD1 ),
        .datab(\state.WR1 ),
        .datac(int_addr[20]),
        .datad(int_addr[10]),
        .aclr(gnd),
        .aload(gnd),
        .clk(!clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ra_9),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ra[9]~I .clock_enable_mode = "false";
defparam \ra[9]~I .lut_mask = "fe10";
defparam \ra[9]~I .operation_mode = "normal";
defparam \ra[9]~I .output_mode = "reg_only";
defparam \ra[9]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_F20
flex10ke_lcell \rwe_n~COMB_I (
// Equation(s):
// rwe_n = !\state.WR2  & !\state.WR3  & !\state.WR1  & !\Selector0~28 

        .dataa(\state.WR2 ),
        .datab(\state.WR3 ),
        .datac(\state.WR1 ),
        .datad(\Selector0~28 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(rwe_n),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rwe_n~COMB_I .clock_enable_mode = "false";
defparam \rwe_n~COMB_I .lut_mask = "0001";
defparam \rwe_n~COMB_I .operation_mode = "normal";
defparam \rwe_n~COMB_I .output_mode = "comb_only";
defparam \rwe_n~COMB_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F19
flex10ke_lcell \rucas_n~COMB_I (
// Equation(s):
// rucas_n = \Selector5~69  # !int_bsel[1] & \state.WR2 

        .dataa(vcc),
        .datab(int_bsel[1]),
        .datac(\state.WR2 ),
        .datad(\Selector5~69 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(rucas_n),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rucas_n~COMB_I .clock_enable_mode = "false";
defparam \rucas_n~COMB_I .lut_mask = "ff30";
defparam \rucas_n~COMB_I .operation_mode = "normal";
defparam \rucas_n~COMB_I .output_mode = "comb_only";
defparam \rucas_n~COMB_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_F21
flex10ke_lcell \rlcas_n~COMB_I (
// Equation(s):
// rlcas_n = \Selector6~67  # int_bsel[1] & \state.WR2 

        .dataa(vcc),
        .datab(int_bsel[1]),
        .datac(\state.WR2 ),
        .datad(\Selector6~67 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(rlcas_n),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rlcas_n~COMB_I .clock_enable_mode = "false";
defparam \rlcas_n~COMB_I .lut_mask = "ffc0";
defparam \rlcas_n~COMB_I .operation_mode = "normal";
defparam \rlcas_n~COMB_I .output_mode = "comb_only";
defparam \rlcas_n~COMB_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_F22
flex10ke_lcell \rras0_n~COMB_I (
// Equation(s):
// rras0_n = \Selector3~80  & (\state.RFSH1~33  # \dram|rras0_n )

        .dataa(vcc),
        .datab(\state.RFSH1~33 ),
        .datac(rras0_n1),
        .datad(\Selector3~80 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(rras0_n),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rras0_n~COMB_I .clock_enable_mode = "false";
defparam \rras0_n~COMB_I .lut_mask = "fc00";
defparam \rras0_n~COMB_I .operation_mode = "normal";
defparam \rras0_n~COMB_I .output_mode = "comb_only";
defparam \rras0_n~COMB_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F9
flex10ke_lcell \rras1_n~COMB_I (
// Equation(s):
// rras1_n = \Selector4~49  & (\state.RFSH1~33  # \dram|rras1_n )

        .dataa(vcc),
        .datab(\state.RFSH1~33 ),
        .datac(rras1_n1),
        .datad(\Selector4~49 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(rras1_n),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rras1_n~COMB_I .clock_enable_mode = "false";
defparam \rras1_n~COMB_I .lut_mask = "fc00";
defparam \rras1_n~COMB_I .operation_mode = "normal";
defparam \rras1_n~COMB_I .output_mode = "comb_only";
defparam \rras1_n~COMB_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_E2
flex10ke_lcell \Selector1~73_I (
// Equation(s):
// Selector1 = !cpu_rnw & cpu_req & (Equal2 # !next_cycle_0)

        .dataa(cpu_rnw),
        .datab(next_cycle_0),
        .datac(Equal2),
        .datad(cpu_req),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector1~73_I .clock_enable_mode = "false";
defparam \Selector1~73_I .lut_mask = "5100";
defparam \Selector1~73_I .operation_mode = "normal";
defparam \Selector1~73_I .output_mode = "comb_only";
defparam \Selector1~73_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A1
flex10ke_lcell \cbeg~I (
// Equation(s):
// cbeg = DFFEA(!\WideOr0~18 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\WideOr0~18 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(cbeg),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \cbeg~I .clock_enable_mode = "false";
defparam \cbeg~I .lut_mask = "00ff";
defparam \cbeg~I .operation_mode = "normal";
defparam \cbeg~I .output_mode = "reg_only";
defparam \cbeg~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F35
flex10ke_lcell \int_wrdata[0]~I (
// Equation(s):
// int_wrdata_0 = DFFEA(\d[0]~7 , GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_wrdata_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_wrdata[0]~I .clock_enable_mode = "true";
defparam \int_wrdata[0]~I .lut_mask = "ff00";
defparam \int_wrdata[0]~I .operation_mode = "normal";
defparam \int_wrdata[0]~I .output_mode = "reg_only";
defparam \int_wrdata[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B33
flex10ke_lcell \int_wrdata[1]~I (
// Equation(s):
// int_wrdata_1 = DFFEA(\d[1]~6 , GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_wrdata_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_wrdata[1]~I .clock_enable_mode = "true";
defparam \int_wrdata[1]~I .lut_mask = "ff00";
defparam \int_wrdata[1]~I .operation_mode = "normal";
defparam \int_wrdata[1]~I .output_mode = "reg_only";
defparam \int_wrdata[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B33
flex10ke_lcell \int_wrdata[2]~I (
// Equation(s):
// int_wrdata_2 = DFFEA(\d[2]~5 , GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_wrdata_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_wrdata[2]~I .clock_enable_mode = "true";
defparam \int_wrdata[2]~I .lut_mask = "ff00";
defparam \int_wrdata[2]~I .operation_mode = "normal";
defparam \int_wrdata[2]~I .output_mode = "reg_only";
defparam \int_wrdata[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A31
flex10ke_lcell \int_wrdata[3]~I (
// Equation(s):
// int_wrdata_3 = DFFEA(\d[3]~4 , GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_wrdata_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_wrdata[3]~I .clock_enable_mode = "true";
defparam \int_wrdata[3]~I .lut_mask = "ff00";
defparam \int_wrdata[3]~I .operation_mode = "normal";
defparam \int_wrdata[3]~I .output_mode = "reg_only";
defparam \int_wrdata[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A29
flex10ke_lcell \int_wrdata[4]~I (
// Equation(s):
// int_wrdata_4 = DFFEA(\d[4]~3 , GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_wrdata_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_wrdata[4]~I .clock_enable_mode = "true";
defparam \int_wrdata[4]~I .lut_mask = "ff00";
defparam \int_wrdata[4]~I .operation_mode = "normal";
defparam \int_wrdata[4]~I .output_mode = "reg_only";
defparam \int_wrdata[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F27
flex10ke_lcell \int_wrdata[5]~I (
// Equation(s):
// int_wrdata_5 = DFFEA(\d[5]~2 , GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_wrdata_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_wrdata[5]~I .clock_enable_mode = "true";
defparam \int_wrdata[5]~I .lut_mask = "ff00";
defparam \int_wrdata[5]~I .operation_mode = "normal";
defparam \int_wrdata[5]~I .output_mode = "reg_only";
defparam \int_wrdata[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J26
flex10ke_lcell \int_wrdata[6]~I (
// Equation(s):
// int_wrdata_6 = DFFEA(\d[6]~1 , GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_wrdata_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_wrdata[6]~I .clock_enable_mode = "true";
defparam \int_wrdata[6]~I .lut_mask = "ff00";
defparam \int_wrdata[6]~I .operation_mode = "normal";
defparam \int_wrdata[6]~I .output_mode = "reg_only";
defparam \int_wrdata[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F23
flex10ke_lcell \int_wrdata[7]~I (
// Equation(s):
// int_wrdata_7 = DFFEA(\d[7]~0 , GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_wrdata_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_wrdata[7]~I .clock_enable_mode = "true";
defparam \int_wrdata[7]~I .lut_mask = "ff00";
defparam \int_wrdata[7]~I .operation_mode = "normal";
defparam \int_wrdata[7]~I .output_mode = "reg_only";
defparam \int_wrdata[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G34
flex10ke_lcell \rddata[15]~I (
// Equation(s):
// rddata_15 = DFFEA(\rd[15]~0 , GLOBAL(\fclk~dataout ), , , \state.RD3 , , )

        .dataa(\state.RD3 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rd_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rddata_15),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rddata[15]~I .clock_enable_mode = "true";
defparam \rddata[15]~I .lut_mask = "ff00";
defparam \rddata[15]~I .operation_mode = "normal";
defparam \rddata[15]~I .output_mode = "reg_only";
defparam \rddata[15]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G34
flex10ke_lcell \rddata[6]~I (
// Equation(s):
// rddata_6 = DFFEA(\rd[6]~9 , GLOBAL(\fclk~dataout ), , , \state.RD3 , , )

        .dataa(\state.RD3 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rd_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rddata_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rddata[6]~I .clock_enable_mode = "true";
defparam \rddata[6]~I .lut_mask = "ff00";
defparam \rddata[6]~I .operation_mode = "normal";
defparam \rddata[6]~I .output_mode = "reg_only";
defparam \rddata[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G34
flex10ke_lcell \rddata[14]~I (
// Equation(s):
// rddata_14 = DFFEA(\rd[14]~1 , GLOBAL(\fclk~dataout ), , , \state.RD3 , , )

        .dataa(\state.RD3 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rd_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rddata_14),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rddata[14]~I .clock_enable_mode = "true";
defparam \rddata[14]~I .lut_mask = "ff00";
defparam \rddata[14]~I .operation_mode = "normal";
defparam \rddata[14]~I .output_mode = "reg_only";
defparam \rddata[14]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G34
flex10ke_lcell \rddata[7]~I (
// Equation(s):
// rddata_7 = DFFEA(\rd[7]~8 , GLOBAL(\fclk~dataout ), , , \state.RD3 , , )

        .dataa(\state.RD3 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rd_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rddata_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rddata[7]~I .clock_enable_mode = "true";
defparam \rddata[7]~I .lut_mask = "ff00";
defparam \rddata[7]~I .operation_mode = "normal";
defparam \rddata[7]~I .output_mode = "reg_only";
defparam \rddata[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G1
flex10ke_lcell \rddata[1]~I (
// Equation(s):
// rddata_1 = DFFEA(\rd[1]~14 , GLOBAL(\fclk~dataout ), , , \state.RD3 , , )

        .dataa(\state.RD3 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rd_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rddata_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rddata[1]~I .clock_enable_mode = "true";
defparam \rddata[1]~I .lut_mask = "ff00";
defparam \rddata[1]~I .operation_mode = "normal";
defparam \rddata[1]~I .output_mode = "reg_only";
defparam \rddata[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G24
flex10ke_lcell \rddata[12]~I (
// Equation(s):
// rddata_12 = DFFEA(\rd[12]~3 , GLOBAL(\fclk~dataout ), , , \state.RD3 , , )

        .dataa(\state.RD3 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rd_12),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rddata_12),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rddata[12]~I .clock_enable_mode = "true";
defparam \rddata[12]~I .lut_mask = "ff00";
defparam \rddata[12]~I .operation_mode = "normal";
defparam \rddata[12]~I .output_mode = "reg_only";
defparam \rddata[12]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G1
flex10ke_lcell \rddata[9]~I (
// Equation(s):
// rddata_9 = DFFEA(\rd[9]~6 , GLOBAL(\fclk~dataout ), , , \state.RD3 , , )

        .dataa(\state.RD3 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rd_9),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rddata_9),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rddata[9]~I .clock_enable_mode = "true";
defparam \rddata[9]~I .lut_mask = "ff00";
defparam \rddata[9]~I .operation_mode = "normal";
defparam \rddata[9]~I .output_mode = "reg_only";
defparam \rddata[9]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G27
flex10ke_lcell \rddata[4]~I (
// Equation(s):
// rddata_4 = DFFEA(\rd[4]~11 , GLOBAL(\fclk~dataout ), , , \state.RD3 , , )

        .dataa(\state.RD3 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rd_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rddata_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rddata[4]~I .clock_enable_mode = "true";
defparam \rddata[4]~I .lut_mask = "ff00";
defparam \rddata[4]~I .operation_mode = "normal";
defparam \rddata[4]~I .output_mode = "reg_only";
defparam \rddata[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G29
flex10ke_lcell \rddata[5]~I (
// Equation(s):
// rddata_5 = DFFEA(\rd[5]~10 , GLOBAL(\fclk~dataout ), , , \state.RD3 , , )

        .dataa(\state.RD3 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rd_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rddata_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rddata[5]~I .clock_enable_mode = "true";
defparam \rddata[5]~I .lut_mask = "ff00";
defparam \rddata[5]~I .operation_mode = "normal";
defparam \rddata[5]~I .output_mode = "reg_only";
defparam \rddata[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G5
flex10ke_lcell \rddata[13]~I (
// Equation(s):
// rddata_13 = DFFEA(\rd[13]~2 , GLOBAL(\fclk~dataout ), , , \state.RD3 , , )

        .dataa(\state.RD3 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rd_13),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rddata_13),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rddata[13]~I .clock_enable_mode = "true";
defparam \rddata[13]~I .lut_mask = "ff00";
defparam \rddata[13]~I .operation_mode = "normal";
defparam \rddata[13]~I .output_mode = "reg_only";
defparam \rddata[13]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G25
flex10ke_lcell \rddata[2]~I (
// Equation(s):
// rddata_2 = DFFEA(\rd[2]~13 , GLOBAL(\fclk~dataout ), , , \state.RD3 , , )

        .dataa(\state.RD3 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rd_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rddata_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rddata[2]~I .clock_enable_mode = "true";
defparam \rddata[2]~I .lut_mask = "ff00";
defparam \rddata[2]~I .operation_mode = "normal";
defparam \rddata[2]~I .output_mode = "reg_only";
defparam \rddata[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G25
flex10ke_lcell \rddata[10]~I (
// Equation(s):
// rddata_10 = DFFEA(\rd[10]~5 , GLOBAL(\fclk~dataout ), , , \state.RD3 , , )

        .dataa(\state.RD3 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rd_10),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rddata_10),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rddata[10]~I .clock_enable_mode = "true";
defparam \rddata[10]~I .lut_mask = "ff00";
defparam \rddata[10]~I .operation_mode = "normal";
defparam \rddata[10]~I .output_mode = "reg_only";
defparam \rddata[10]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F18
flex10ke_lcell \rddata[3]~I (
// Equation(s):
// rddata_3 = DFFEA(\rd[3]~12 , GLOBAL(\fclk~dataout ), , , \state.RD3 , , )

        .dataa(\state.RD3 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rd_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rddata_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rddata[3]~I .clock_enable_mode = "true";
defparam \rddata[3]~I .lut_mask = "ff00";
defparam \rddata[3]~I .operation_mode = "normal";
defparam \rddata[3]~I .output_mode = "reg_only";
defparam \rddata[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G11
flex10ke_lcell \rddata[11]~I (
// Equation(s):
// rddata_11 = DFFEA(\rd[11]~4 , GLOBAL(\fclk~dataout ), , , \state.RD3 , , )

        .dataa(\state.RD3 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rd_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rddata_11),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rddata[11]~I .clock_enable_mode = "true";
defparam \rddata[11]~I .lut_mask = "ff00";
defparam \rddata[11]~I .operation_mode = "normal";
defparam \rddata[11]~I .output_mode = "reg_only";
defparam \rddata[11]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G17
flex10ke_lcell \rddata[0]~I (
// Equation(s):
// rddata_0 = DFFEA(\rd[0]~15 , GLOBAL(\fclk~dataout ), , , \state.RD3 , , )

        .dataa(\state.RD3 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rd_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rddata_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rddata[0]~I .clock_enable_mode = "true";
defparam \rddata[0]~I .lut_mask = "ff00";
defparam \rddata[0]~I .operation_mode = "normal";
defparam \rddata[0]~I .output_mode = "reg_only";
defparam \rddata[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F16
flex10ke_lcell \rddata[8]~I (
// Equation(s):
// rddata_8 = DFFEA(\rd[8]~7 , GLOBAL(\fclk~dataout ), , , \state.RD3 , , )

        .dataa(\state.RD3 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rd_8),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rddata_8),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rddata[8]~I .clock_enable_mode = "true";
defparam \rddata[8]~I .lut_mask = "ff00";
defparam \rddata[8]~I .operation_mode = "normal";
defparam \rddata[8]~I .output_mode = "reg_only";
defparam \rddata[8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F23
flex10ke_lcell \int_wrdata[0]~24_I (
// Equation(s):
// int_wrdata_01 = DFFEA(\d[0]~7 , GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_wrdata_01),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_wrdata[0]~24_I .clock_enable_mode = "true";
defparam \int_wrdata[0]~24_I .lut_mask = "ff00";
defparam \int_wrdata[0]~24_I .operation_mode = "normal";
defparam \int_wrdata[0]~24_I .output_mode = "reg_only";
defparam \int_wrdata[0]~24_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F25
flex10ke_lcell \int_wrdata[1]~25_I (
// Equation(s):
// int_wrdata_11 = DFFEA(\d[1]~6 , GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_wrdata_11),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_wrdata[1]~25_I .clock_enable_mode = "true";
defparam \int_wrdata[1]~25_I .lut_mask = "ff00";
defparam \int_wrdata[1]~25_I .operation_mode = "normal";
defparam \int_wrdata[1]~25_I .output_mode = "reg_only";
defparam \int_wrdata[1]~25_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_F27
flex10ke_lcell \int_wrdata[2]~26_I (
// Equation(s):
// int_wrdata_21 = DFFEA(\d[2]~5 , GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_wrdata_21),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_wrdata[2]~26_I .clock_enable_mode = "true";
defparam \int_wrdata[2]~26_I .lut_mask = "ff00";
defparam \int_wrdata[2]~26_I .operation_mode = "normal";
defparam \int_wrdata[2]~26_I .output_mode = "reg_only";
defparam \int_wrdata[2]~26_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F28
flex10ke_lcell \int_wrdata[3]~27_I (
// Equation(s):
// int_wrdata_31 = DFFEA(\d[3]~4 , GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_wrdata_31),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_wrdata[3]~27_I .clock_enable_mode = "true";
defparam \int_wrdata[3]~27_I .lut_mask = "ff00";
defparam \int_wrdata[3]~27_I .operation_mode = "normal";
defparam \int_wrdata[3]~27_I .output_mode = "reg_only";
defparam \int_wrdata[3]~27_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A29
flex10ke_lcell \int_wrdata[4]~28_I (
// Equation(s):
// int_wrdata_41 = DFFEA(\d[4]~3 , GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_wrdata_41),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_wrdata[4]~28_I .clock_enable_mode = "true";
defparam \int_wrdata[4]~28_I .lut_mask = "ff00";
defparam \int_wrdata[4]~28_I .operation_mode = "normal";
defparam \int_wrdata[4]~28_I .output_mode = "reg_only";
defparam \int_wrdata[4]~28_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A31
flex10ke_lcell \int_wrdata[5]~29_I (
// Equation(s):
// int_wrdata_51 = DFFEA(\d[5]~2 , GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_wrdata_51),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_wrdata[5]~29_I .clock_enable_mode = "true";
defparam \int_wrdata[5]~29_I .lut_mask = "ff00";
defparam \int_wrdata[5]~29_I .operation_mode = "normal";
defparam \int_wrdata[5]~29_I .output_mode = "reg_only";
defparam \int_wrdata[5]~29_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J33
flex10ke_lcell \int_wrdata[6]~30_I (
// Equation(s):
// int_wrdata_61 = DFFEA(\d[6]~1 , GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_wrdata_61),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_wrdata[6]~30_I .clock_enable_mode = "true";
defparam \int_wrdata[6]~30_I .lut_mask = "ff00";
defparam \int_wrdata[6]~30_I .operation_mode = "normal";
defparam \int_wrdata[6]~30_I .output_mode = "reg_only";
defparam \int_wrdata[6]~30_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A35
flex10ke_lcell \int_wrdata[7]~31_I (
// Equation(s):
// int_wrdata_71 = DFFEA(\d[7]~0 , GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_wrdata_71),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_wrdata[7]~31_I .clock_enable_mode = "true";
defparam \int_wrdata[7]~31_I .lut_mask = "ff00";
defparam \int_wrdata[7]~31_I .operation_mode = "normal";
defparam \int_wrdata[7]~31_I .output_mode = "reg_only";
defparam \int_wrdata[7]~31_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_F9
flex10ke_lcell \state.RD2~I (
// Equation(s):
// \state.RD2  = DFFEA(\state.RD1 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\state.RD1 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\state.RD2 ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \state.RD2~I .clock_enable_mode = "false";
defparam \state.RD2~I .lut_mask = "ff00";
defparam \state.RD2~I .operation_mode = "normal";
defparam \state.RD2~I .output_mode = "reg_only";
defparam \state.RD2~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F9
flex10ke_lcell \state.RD3~I (
// Equation(s):
// \state.RD3  = DFFEA(\state.RD2 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\state.RD2 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\state.RD3 ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \state.RD3~I .clock_enable_mode = "false";
defparam \state.RD3~I .lut_mask = "ff00";
defparam \state.RD3~I .operation_mode = "normal";
defparam \state.RD3~I .output_mode = "reg_only";
defparam \state.RD3~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_F21
flex10ke_lcell \state.RD4~I (
// Equation(s):
// \state.RD4  = DFFEA(\state.RD3 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\state.RD3 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\state.RD4 ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \state.RD4~I .clock_enable_mode = "false";
defparam \state.RD4~I .lut_mask = "ff00";
defparam \state.RD4~I .operation_mode = "normal";
defparam \state.RD4~I .output_mode = "reg_only";
defparam \state.RD4~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J6
flex10ke_lcell \rst_sync[0]~I (
// Equation(s):
// rst_sync[0] = DFFEA(!rst_out_n, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(rst_out_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rst_sync[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rst_sync[0]~I .clock_enable_mode = "false";
defparam \rst_sync[0]~I .lut_mask = "00ff";
defparam \rst_sync[0]~I .operation_mode = "normal";
defparam \rst_sync[0]~I .output_mode = "reg_only";
defparam \rst_sync[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J6
flex10ke_lcell \rst_sync[1]~I (
// Equation(s):
// rst_sync[1] = DFFEA(rst_sync[0], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(rst_sync[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rst_sync[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rst_sync[1]~I .clock_enable_mode = "false";
defparam \rst_sync[1]~I .lut_mask = "ff00";
defparam \rst_sync[1]~I .operation_mode = "normal";
defparam \rst_sync[1]~I .output_mode = "reg_only";
defparam \rst_sync[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_F20
flex10ke_lcell \state.WR1~I (
// Equation(s):
// \state.WR1  = DFFEA(!\WideOr0~18  & !rst_sync[1] & !next_cycle_1 & Selector1, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\WideOr0~18 ),
        .datab(rst_sync[1]),
        .datac(next_cycle_1),
        .datad(Selector1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\state.WR1 ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \state.WR1~I .clock_enable_mode = "false";
defparam \state.WR1~I .lut_mask = "0100";
defparam \state.WR1~I .operation_mode = "normal";
defparam \state.WR1~I .output_mode = "reg_only";
defparam \state.WR1~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_F20
flex10ke_lcell \state.WR2~I (
// Equation(s):
// \state.WR2  = DFFEA(\state.WR1 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\state.WR1 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\state.WR2 ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \state.WR2~I .clock_enable_mode = "false";
defparam \state.WR2~I .lut_mask = "ff00";
defparam \state.WR2~I .operation_mode = "normal";
defparam \state.WR2~I .output_mode = "reg_only";
defparam \state.WR2~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_F20
flex10ke_lcell \state.WR3~I (
// Equation(s):
// \state.WR3  = DFFEA(\state.WR2 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\state.WR2 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\state.WR3 ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \state.WR3~I .clock_enable_mode = "false";
defparam \state.WR3~I .lut_mask = "ff00";
defparam \state.WR3~I .operation_mode = "normal";
defparam \state.WR3~I .output_mode = "reg_only";
defparam \state.WR3~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_F21
flex10ke_lcell \state.WR4~I (
// Equation(s):
// \state.WR4  = DFFEA(\state.WR3 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\state.WR3 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\state.WR4 ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \state.WR4~I .clock_enable_mode = "false";
defparam \state.WR4~I .lut_mask = "ff00";
defparam \state.WR4~I .operation_mode = "normal";
defparam \state.WR4~I .output_mode = "reg_only";
defparam \state.WR4~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_F20
flex10ke_lcell \state.RFSH1~I (
// Equation(s):
// \state.RFSH1  = DFFEA(!\WideOr0~18  & (rst_sync[1] # next_cycle_1), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(\WideOr0~18 ),
        .datac(rst_sync[1]),
        .datad(next_cycle_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\state.RFSH1 ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \state.RFSH1~I .clock_enable_mode = "false";
defparam \state.RFSH1~I .lut_mask = "3330";
defparam \state.RFSH1~I .operation_mode = "normal";
defparam \state.RFSH1~I .output_mode = "reg_only";
defparam \state.RFSH1~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F22
flex10ke_lcell \state.RFSH2~I (
// Equation(s):
// \state.RFSH2  = DFFEA(\state.RFSH1 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\state.RFSH1 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\state.RFSH2 ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \state.RFSH2~I .clock_enable_mode = "false";
defparam \state.RFSH2~I .lut_mask = "ff00";
defparam \state.RFSH2~I .operation_mode = "normal";
defparam \state.RFSH2~I .output_mode = "reg_only";
defparam \state.RFSH2~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_F22
flex10ke_lcell \state.RFSH3~I (
// Equation(s):
// \state.RFSH3  = DFFEA(\state.RFSH2 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\state.RFSH2 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\state.RFSH3 ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \state.RFSH3~I .clock_enable_mode = "false";
defparam \state.RFSH3~I .lut_mask = "ff00";
defparam \state.RFSH3~I .operation_mode = "normal";
defparam \state.RFSH3~I .output_mode = "reg_only";
defparam \state.RFSH3~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F21
flex10ke_lcell \state.RFSH4~I (
// Equation(s):
// \state.RFSH4  = DFFEA(!\state.RFSH3 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\state.RFSH3 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\state.RFSH4 ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \state.RFSH4~I .clock_enable_mode = "false";
defparam \state.RFSH4~I .lut_mask = "00ff";
defparam \state.RFSH4~I .operation_mode = "normal";
defparam \state.RFSH4~I .output_mode = "reg_only";
defparam \state.RFSH4~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_F21
flex10ke_lcell \WideOr0~18_I (
// Equation(s):
// \WideOr0~18  = !\state.RD4  & !\state.WR4  & \state.RFSH4 

        .dataa(vcc),
        .datab(\state.RD4 ),
        .datac(\state.WR4 ),
        .datad(\state.RFSH4 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\WideOr0~18 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \WideOr0~18_I .clock_enable_mode = "false";
defparam \WideOr0~18_I .lut_mask = "0300";
defparam \WideOr0~18_I .operation_mode = "normal";
defparam \WideOr0~18_I .output_mode = "comb_only";
defparam \WideOr0~18_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F20
flex10ke_lcell \state.RD1~I (
// Equation(s):
// \state.RD1  = DFFEA(!\WideOr0~18  & !Selector1 & !rst_sync[1] & !next_cycle_1, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\WideOr0~18 ),
        .datab(Selector1),
        .datac(rst_sync[1]),
        .datad(next_cycle_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\state.RD1 ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \state.RD1~I .clock_enable_mode = "false";
defparam \state.RD1~I .lut_mask = "0001";
defparam \state.RD1~I .operation_mode = "normal";
defparam \state.RD1~I .output_mode = "reg_only";
defparam \state.RD1~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F20
flex10ke_lcell \int_addr[1]~144_I (
// Equation(s):
// \int_addr[1]~144  = !\WideOr0~18 

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\WideOr0~18 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\int_addr[1]~144 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[1]~144_I .clock_enable_mode = "false";
defparam \int_addr[1]~144_I .lut_mask = "00ff";
defparam \int_addr[1]~144_I .operation_mode = "normal";
defparam \int_addr[1]~144_I .output_mode = "comb_only";
defparam \int_addr[1]~144_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I15
flex10ke_lcell \int_addr[11]~I (
// Equation(s):
// int_addr[11] = DFFEA(next_cycle_01 & \a~dataout [12] # !next_cycle_01 & (dram_addr_11), GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(next_cycle_01),
        .datac(a_12),
        .datad(dram_addr_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[11]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[11]~I .clock_enable_mode = "true";
defparam \int_addr[11]~I .lut_mask = "f3c0";
defparam \int_addr[11]~I .operation_mode = "normal";
defparam \int_addr[11]~I .output_mode = "reg_only";
defparam \int_addr[11]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I23
flex10ke_lcell \int_addr[1]~I (
// Equation(s):
// int_addr[1] = DFFEA(next_cycle_01 & \a~dataout [2] # !next_cycle_01 & (q_1), GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(next_cycle_01),
        .datac(a_2),
        .datad(q_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[1]~I .clock_enable_mode = "true";
defparam \int_addr[1]~I .lut_mask = "f3c0";
defparam \int_addr[1]~I .operation_mode = "normal";
defparam \int_addr[1]~I .output_mode = "reg_only";
defparam \int_addr[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I13
flex10ke_lcell \int_addr[12]~I (
// Equation(s):
// int_addr[12] = DFFEA(next_cycle_01 & \a~dataout [13] # !next_cycle_01 & (dram_addr_12), GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(next_cycle_01),
        .datac(a_13),
        .datad(dram_addr_12),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[12]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[12]~I .clock_enable_mode = "true";
defparam \int_addr[12]~I .lut_mask = "f3c0";
defparam \int_addr[12]~I .operation_mode = "normal";
defparam \int_addr[12]~I .output_mode = "reg_only";
defparam \int_addr[12]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I23
flex10ke_lcell \int_addr[2]~I (
// Equation(s):
// int_addr[2] = DFFEA(next_cycle_01 & \a~dataout [3] # !next_cycle_01 & (q_2), GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(next_cycle_01),
        .datac(a_3),
        .datad(q_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[2]~I .clock_enable_mode = "true";
defparam \int_addr[2]~I .lut_mask = "f3c0";
defparam \int_addr[2]~I .operation_mode = "normal";
defparam \int_addr[2]~I .output_mode = "reg_only";
defparam \int_addr[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I13
flex10ke_lcell \int_addr[13]~I (
// Equation(s):
// int_addr[13] = DFFEA(dram_addr_13, GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(dram_addr_13),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[13]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[13]~I .clock_enable_mode = "true";
defparam \int_addr[13]~I .lut_mask = "ff00";
defparam \int_addr[13]~I .operation_mode = "normal";
defparam \int_addr[13]~I .output_mode = "reg_only";
defparam \int_addr[13]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_I23
flex10ke_lcell \int_addr[3]~I (
// Equation(s):
// int_addr[3] = DFFEA(next_cycle_01 & \a~dataout [4] # !next_cycle_01 & (q_3), GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(next_cycle_01),
        .datac(a_4),
        .datad(q_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[3]~I .clock_enable_mode = "true";
defparam \int_addr[3]~I .lut_mask = "f3c0";
defparam \int_addr[3]~I .operation_mode = "normal";
defparam \int_addr[3]~I .output_mode = "reg_only";
defparam \int_addr[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I11
flex10ke_lcell \int_addr[14]~I (
// Equation(s):
// int_addr[14] = DFFEA(next_cycle_01 & Mux6 # !next_cycle_01 & (p7ffd_int_3), GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(next_cycle_01),
        .datac(Mux6),
        .datad(p7ffd_int_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[14]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[14]~I .clock_enable_mode = "true";
defparam \int_addr[14]~I .lut_mask = "f3c0";
defparam \int_addr[14]~I .operation_mode = "normal";
defparam \int_addr[14]~I .output_mode = "reg_only";
defparam \int_addr[14]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I11
flex10ke_lcell \int_addr[4]~I (
// Equation(s):
// int_addr[4] = DFFEA(next_cycle_01 & \a~dataout [5] # !next_cycle_01 & (q_31), GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(next_cycle_01),
        .datac(a_5),
        .datad(q_31),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[4]~I .clock_enable_mode = "true";
defparam \int_addr[4]~I .lut_mask = "f3c0";
defparam \int_addr[4]~I .operation_mode = "normal";
defparam \int_addr[4]~I .output_mode = "reg_only";
defparam \int_addr[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I10
flex10ke_lcell \int_addr[15]~I (
// Equation(s):
// int_addr[15] = DFFEA(Mux5 # !next_cycle_01, GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(next_cycle_01),
        .datad(Mux5),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[15]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[15]~I .clock_enable_mode = "true";
defparam \int_addr[15]~I .lut_mask = "ff0f";
defparam \int_addr[15]~I .operation_mode = "normal";
defparam \int_addr[15]~I .output_mode = "reg_only";
defparam \int_addr[15]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I10
flex10ke_lcell \int_addr[5]~I (
// Equation(s):
// int_addr[5] = DFFEA(next_cycle_01 & \a~dataout [6] # !next_cycle_01 & (q_4), GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(next_cycle_01),
        .datac(a_6),
        .datad(q_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[5]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[5]~I .clock_enable_mode = "true";
defparam \int_addr[5]~I .lut_mask = "f3c0";
defparam \int_addr[5]~I .operation_mode = "normal";
defparam \int_addr[5]~I .output_mode = "reg_only";
defparam \int_addr[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I11
flex10ke_lcell \int_addr[16]~I (
// Equation(s):
// int_addr[16] = DFFEA(Mux4 & next_cycle_01, GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(Mux4),
        .datad(next_cycle_01),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[16]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[16]~I .clock_enable_mode = "true";
defparam \int_addr[16]~I .lut_mask = "f000";
defparam \int_addr[16]~I .operation_mode = "normal";
defparam \int_addr[16]~I .output_mode = "reg_only";
defparam \int_addr[16]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I11
flex10ke_lcell \int_addr[6]~I (
// Equation(s):
// int_addr[6] = DFFEA(next_cycle_01 & \a~dataout [7] # !next_cycle_01 & (q_5), GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(next_cycle_01),
        .datac(a_7),
        .datad(q_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[6]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[6]~I .clock_enable_mode = "true";
defparam \int_addr[6]~I .lut_mask = "f3c0";
defparam \int_addr[6]~I .operation_mode = "normal";
defparam \int_addr[6]~I .output_mode = "reg_only";
defparam \int_addr[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I13
flex10ke_lcell \int_addr[17]~I (
// Equation(s):
// int_addr[17] = DFFEA(Mux3 & next_cycle_01, GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(Mux3),
        .datad(next_cycle_01),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[17]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[17]~I .clock_enable_mode = "true";
defparam \int_addr[17]~I .lut_mask = "f000";
defparam \int_addr[17]~I .operation_mode = "normal";
defparam \int_addr[17]~I .output_mode = "reg_only";
defparam \int_addr[17]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I26
flex10ke_lcell \int_addr[7]~I (
// Equation(s):
// int_addr[7] = DFFEA(next_cycle_01 & (\a~dataout [8]) # !next_cycle_01 & !dram_addr_7, GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(dram_addr_7),
        .datac(a_8),
        .datad(next_cycle_01),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[7]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[7]~I .clock_enable_mode = "true";
defparam \int_addr[7]~I .lut_mask = "f033";
defparam \int_addr[7]~I .operation_mode = "normal";
defparam \int_addr[7]~I .output_mode = "reg_only";
defparam \int_addr[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I15
flex10ke_lcell \int_addr[18]~I (
// Equation(s):
// int_addr[18] = DFFEA(next_cycle_01 & Mux2, GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(next_cycle_01),
        .datad(Mux2),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[18]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[18]~I .clock_enable_mode = "true";
defparam \int_addr[18]~I .lut_mask = "f000";
defparam \int_addr[18]~I .operation_mode = "normal";
defparam \int_addr[18]~I .output_mode = "reg_only";
defparam \int_addr[18]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I15
flex10ke_lcell \int_addr[8]~I (
// Equation(s):
// int_addr[8] = DFFEA(next_cycle_01 & (\a~dataout [9]) # !next_cycle_01 & !dram_addr_8, GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(dram_addr_8),
        .datac(a_9),
        .datad(next_cycle_01),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[8]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[8]~I .clock_enable_mode = "true";
defparam \int_addr[8]~I .lut_mask = "f033";
defparam \int_addr[8]~I .operation_mode = "normal";
defparam \int_addr[8]~I .output_mode = "reg_only";
defparam \int_addr[8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I17
flex10ke_lcell \int_addr[19]~I (
// Equation(s):
// int_addr[19] = DFFEA(next_cycle_01 & Mux1, GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(next_cycle_01),
        .datad(Mux1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[19]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[19]~I .clock_enable_mode = "true";
defparam \int_addr[19]~I .lut_mask = "f000";
defparam \int_addr[19]~I .operation_mode = "normal";
defparam \int_addr[19]~I .output_mode = "reg_only";
defparam \int_addr[19]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I17
flex10ke_lcell \int_addr[9]~I (
// Equation(s):
// int_addr[9] = DFFEA(next_cycle_01 & \a~dataout [10] # !next_cycle_01 & (dram_addr_9), GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(next_cycle_01),
        .datac(a_10),
        .datad(dram_addr_9),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[9]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[9]~I .clock_enable_mode = "true";
defparam \int_addr[9]~I .lut_mask = "f3c0";
defparam \int_addr[9]~I .operation_mode = "normal";
defparam \int_addr[9]~I .output_mode = "reg_only";
defparam \int_addr[9]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I17
flex10ke_lcell \int_addr[20]~I (
// Equation(s):
// int_addr[20] = DFFEA(next_cycle_01 & Mux0, GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(next_cycle_01),
        .datad(Mux0),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[20]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[20]~I .clock_enable_mode = "true";
defparam \int_addr[20]~I .lut_mask = "f000";
defparam \int_addr[20]~I .operation_mode = "normal";
defparam \int_addr[20]~I .output_mode = "reg_only";
defparam \int_addr[20]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I17
flex10ke_lcell \int_addr[10]~I (
// Equation(s):
// int_addr[10] = DFFEA(next_cycle_01 & \a~dataout [11] # !next_cycle_01 & (dram_addr_10), GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(next_cycle_01),
        .datac(a_11),
        .datad(dram_addr_10),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[10]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[10]~I .clock_enable_mode = "true";
defparam \int_addr[10]~I .lut_mask = "f3c0";
defparam \int_addr[10]~I .operation_mode = "normal";
defparam \int_addr[10]~I .output_mode = "reg_only";
defparam \int_addr[10]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F20
flex10ke_lcell \Selector0~28_I (
// Equation(s):
// \Selector0~28  = !\WideOr0~18  & !rst_sync[1] & !next_cycle_1 & Selector1

        .dataa(\WideOr0~18 ),
        .datab(rst_sync[1]),
        .datac(next_cycle_1),
        .datad(Selector1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector0~28 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector0~28_I .clock_enable_mode = "false";
defparam \Selector0~28_I .lut_mask = "0100";
defparam \Selector0~28_I .operation_mode = "normal";
defparam \Selector0~28_I .output_mode = "comb_only";
defparam \Selector0~28_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_F19
flex10ke_lcell \int_bsel[1]~I (
// Equation(s):
// int_bsel[1] = DFFEA(!\a~dataout [0], GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(vcc),
        .datac(vcc),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_bsel[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_bsel[1]~I .clock_enable_mode = "true";
defparam \int_bsel[1]~I .lut_mask = "00ff";
defparam \int_bsel[1]~I .operation_mode = "normal";
defparam \int_bsel[1]~I .output_mode = "reg_only";
defparam \int_bsel[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F22
flex10ke_lcell \WideOr3~I (
// Equation(s):
// WideOr3 = \state.RFSH2  # \state.WR3  # \state.RD3  # !\WideOr3~18 

        .dataa(\WideOr3~18 ),
        .datab(\state.RFSH2 ),
        .datac(\state.WR3 ),
        .datad(\state.RD3 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(WideOr3),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \WideOr3~I .clock_enable_mode = "false";
defparam \WideOr3~I .lut_mask = "fffd";
defparam \WideOr3~I .operation_mode = "normal";
defparam \WideOr3~I .output_mode = "comb_only";
defparam \WideOr3~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F21
flex10ke_lcell \Selector5~69_I (
// Equation(s):
// \Selector5~69  = \state.RFSH3  # WideOr3 & \dram|rucas_n  # !\WideOr0~18 

        .dataa(\WideOr0~18 ),
        .datab(WideOr3),
        .datac(rucas_n1),
        .datad(\state.RFSH3 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector5~69 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector5~69_I .clock_enable_mode = "false";
defparam \Selector5~69_I .lut_mask = "ffd5";
defparam \Selector5~69_I .operation_mode = "normal";
defparam \Selector5~69_I .output_mode = "comb_only";
defparam \Selector5~69_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F21
flex10ke_lcell \Selector6~67_I (
// Equation(s):
// \Selector6~67  = \state.RFSH3  # WideOr3 & \dram|rlcas_n  # !\WideOr0~18 

        .dataa(\WideOr0~18 ),
        .datab(WideOr3),
        .datac(rlcas_n1),
        .datad(\state.RFSH3 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector6~67 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector6~67_I .clock_enable_mode = "false";
defparam \Selector6~67_I .lut_mask = "ffd5";
defparam \Selector6~67_I .operation_mode = "normal";
defparam \Selector6~67_I .output_mode = "comb_only";
defparam \Selector6~67_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F9
flex10ke_lcell \state.RFSH1~33_I (
// Equation(s):
// \state.RFSH1~33  = !\state.RFSH1  & !\state.RD2  & !\state.RFSH3  & !\state.WR2 

        .dataa(\state.RFSH1 ),
        .datab(\state.RD2 ),
        .datac(\state.RFSH3 ),
        .datad(\state.WR2 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\state.RFSH1~33 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \state.RFSH1~33_I .clock_enable_mode = "false";
defparam \state.RFSH1~33_I .lut_mask = "0001";
defparam \state.RFSH1~33_I .operation_mode = "normal";
defparam \state.RFSH1~33_I .output_mode = "comb_only";
defparam \state.RFSH1~33_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I23
flex10ke_lcell \int_addr[0]~I (
// Equation(s):
// int_addr[0] = DFFEA(next_cycle_01 & \a~dataout [1] # !next_cycle_01 & (q_0), GLOBAL(\fclk~dataout ), , , \int_addr[1]~144 , , )

        .dataa(\int_addr[1]~144 ),
        .datab(next_cycle_01),
        .datac(a_1),
        .datad(q_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_addr[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_addr[0]~I .clock_enable_mode = "true";
defparam \int_addr[0]~I .lut_mask = "f3c0";
defparam \int_addr[0]~I .operation_mode = "normal";
defparam \int_addr[0]~I .output_mode = "reg_only";
defparam \int_addr[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_F22
flex10ke_lcell \WideOr3~18_I (
// Equation(s):
// \WideOr3~18  = !\state.RD1  & !\state.WR1 

        .dataa(vcc),
        .datab(vcc),
        .datac(\state.RD1 ),
        .datad(\state.WR1 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\WideOr3~18 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \WideOr3~18_I .clock_enable_mode = "false";
defparam \WideOr3~18_I .lut_mask = "000f";
defparam \WideOr3~18_I .operation_mode = "normal";
defparam \WideOr3~18_I .output_mode = "comb_only";
defparam \WideOr3~18_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F22
flex10ke_lcell \rfsh_alt~I (
// Equation(s):
// rfsh_alt = DFFEA(!rfsh_alt, GLOBAL(\fclk~dataout ), , , \state.RFSH2 , , )

        .dataa(\state.RFSH2 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rfsh_alt),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rfsh_alt),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rfsh_alt~I .clock_enable_mode = "true";
defparam \rfsh_alt~I .lut_mask = "00ff";
defparam \rfsh_alt~I .operation_mode = "normal";
defparam \rfsh_alt~I .output_mode = "reg_only";
defparam \rfsh_alt~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_F22
flex10ke_lcell \Selector3~80_I (
// Equation(s):
// \Selector3~80  = \state.RFSH2  & rfsh_alt & (int_addr[0] # \WideOr3~18 ) # !\state.RFSH2  & (int_addr[0] # \WideOr3~18 )

        .dataa(\state.RFSH2 ),
        .datab(int_addr[0]),
        .datac(\WideOr3~18 ),
        .datad(rfsh_alt),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector3~80 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector3~80_I .clock_enable_mode = "false";
defparam \Selector3~80_I .lut_mask = "fc54";
defparam \Selector3~80_I .operation_mode = "normal";
defparam \Selector3~80_I .output_mode = "comb_only";
defparam \Selector3~80_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_F22
flex10ke_lcell \Selector4~49_I (
// Equation(s):
// \Selector4~49  = rfsh_alt & !\state.RFSH2  & (\WideOr3~18  # !int_addr[0]) # !rfsh_alt & (\WideOr3~18  # !int_addr[0])

        .dataa(rfsh_alt),
        .datab(\state.RFSH2 ),
        .datac(int_addr[0]),
        .datad(\WideOr3~18 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector4~49 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector4~49_I .clock_enable_mode = "false";
defparam \Selector4~49_I .lut_mask = "7707";
defparam \Selector4~49_I .operation_mode = "normal";
defparam \Selector4~49_I .output_mode = "comb_only";
defparam \Selector4~49_I .packed_mode = "false";
// synopsys translate_on

endmodule

module fetch (
        go,
        vpix,
        Mux10,
        zxcolor_3,
        peff7_int_0,
        Mux15,
        zxcolor,
        zxcolor_1,
        Mux14,
        zxcolor1,
        zxcolor_2,
        Mux16,
        zxcolor2,
        zxcolor_0,
        q_1,
        q_2,
        q_3,
        q_31,
        q_4,
        q_5,
        q_0,
        int_start,
        dcnt_0,
        video_next,
        dcnt_1,
        line_start,
        q_7,
        q_21,
        q_6,
        cend,
        rddata_15,
        video_strobe,
        rddata_6,
        rddata_14,
        rddata_7,
        rddata_1,
        rddata_12,
        rddata_9,
        rddata_4,
        rddata_5,
        rddata_13,
        rddata_2,
        rddata_10,
        rddata_3,
        rddata_11,
        rddata_0,
        rddata_8,
        q_11,
        q_01,
        clk,
        line_start1,
        int_start1,
        devpor,
        devclrn,
        devoe);
output  go;
input   vpix;
output  Mux10;
output  zxcolor_3;
input   peff7_int_0;
output  Mux15;
output  zxcolor;
output  zxcolor_1;
output  Mux14;
output  zxcolor1;
output  zxcolor_2;
output  Mux16;
output  zxcolor2;
output  zxcolor_0;
output  q_1;
output  q_2;
output  q_3;
output  q_31;
output  q_4;
output  q_5;
output  q_0;
input   int_start;
output  dcnt_0;
input   video_next;
output  dcnt_1;
input   line_start;
output  q_7;
output  q_21;
output  q_6;
input   cend;
input   rddata_15;
input   video_strobe;
input   rddata_6;
input   rddata_14;
input   rddata_7;
input   rddata_1;
input   rddata_12;
input   rddata_9;
input   rddata_4;
input   rddata_5;
input   rddata_13;
input   rddata_2;
input   rddata_10;
input   rddata_3;
input   rddata_11;
input   rddata_0;
input   rddata_8;
output  q_11;
output  q_01;
input   clk;
input   line_start1;
input   int_start1;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \shift[0][7] ;
wire \shift[7][6] ;
wire \shift[6][6] ;
wire \shift[1][7] ;
wire \shift[0][4] ;
wire \shift[6][4] ;
wire \shift[6][1] ;
wire \shift[1][4] ;
wire \pixbyte~34 ;
wire \pixbyte~35 ;
wire \pixbyte~38 ;
wire \shift[1][0] ;
wire \shift[0][0] ;
wire \pixbyte~39 ;
wire \zxcolor~197 ;
wire \shift[4][2] ;
wire \shift[6][5] ;
wire \shift[5][2] ;
wire \shift[6][3] ;
wire \shift[4][3] ;
wire \fbuf[0][15] ;
wire \fbuf[3][6] ;
wire \fbuf[3][14] ;
wire \fbuf[0][7] ;
wire \fbuf[0][12] ;
wire \fbuf[3][12] ;
wire \fbuf[3][9] ;
wire \fbuf[0][4] ;
wire \fbuf[0][0] ;
wire \fbuf[0][8] ;
wire \flashctr_rtl_5|wysi_counter|counter_cell[3]~COUT ;
wire \fbuf[2][10] ;
wire \fbuf[3][13] ;
wire \fbuf[2][2] ;
wire \fbuf[3][11] ;
wire \fbuf[2][11] ;
wire \always4~0 ;
wire \fbuf[2][14]~413 ;
wire \fbuf[1][14]~414 ;
wire \fbuf[0][14]~415 ;
wire \fbuf[3][14]~416 ;
wire \flashctr_rtl_5|wysi_counter|counter_cell[2]~COUT ;
wire \ddcnt[1]~18 ;
wire \flashctr_rtl_5|wysi_counter|counter_cell[1]~COUT ;
wire \flashctr_rtl_5|wysi_counter|counter_cell[0]~COUT ;
wire \hcnt_rtl_11|wysi_counter|counter_cell[1]~COUT ;
wire \hcnt_rtl_11|wysi_counter|counter_cell[2]~COUT ;
wire \vcnt_rtl_10|wysi_counter|counter_cell[3]~COUT ;
wire \vcnt_rtl_10|wysi_counter|counter_cell[4]~COUT ;
wire \vcnt_rtl_10|wysi_counter|counter_cell[5]~COUT ;
wire \hcnt_rtl_11|wysi_counter|counter_cell[0]~COUT ;
wire \vcnt_rtl_10|wysi_counter|counter_cell[2]~COUT ;
wire \vcnt_rtl_10|wysi_counter|counter_cell[6]~COUT ;
wire \vcnt_rtl_10|wysi_counter|counter_cell[1]~COUT ;
wire \vcnt_rtl_10|wysi_counter|counter_cell[0]~COUT ;
wire \always1~0 ;
wire \Equal0~42 ;
wire \Equal0~41 ;
wire \wcnt_rtl_9|wysi_counter|counter_cell[3]~1 ;
wire \wcnt_rtl_9|wysi_counter|counter_cell[0]~COUT ;
wire \wcnt_rtl_9|wysi_counter|counter_cell[1]~COUT ;
wire \wcnt_rtl_9|wysi_counter|counter_cell[2]~COUT ;
wire go_start;
wire \fcnt_rtl_8|wysi_counter|counter_cell[0]~COUT ;
wire \fcnt_rtl_8|wysi_counter|counter_cell[1]~COUT ;
wire \fcnt_rtl_8|wysi_counter|counter_cell[2]~COUT ;
wire \fcnt_rtl_8|wysi_counter|counter_cell[3]~COUT ;
wire \go~68 ;
wire \go~69 ;
wire \fbuf[3][7] ;
wire \shift[7][7] ;
wire \wordsync~31 ;
wire wordsync;
wire \pixnumber_rtl_4|wysi_counter|counter_cell[3]~1 ;
wire \pixnumber_rtl_4|wysi_counter|counter_cell[0]~COUT ;
wire \pixnumber_rtl_4|wysi_counter|counter_cell[1]~COUT ;
wire \fbuf[2][7] ;
wire \shift[5][7] ;
wire \Mux10~28 ;
wire \fbuf[1][7] ;
wire \shift[3][7] ;
wire \Mux10~29 ;
wire \fbuf[1][14] ;
wire \shift[2][6] ;
wire \Mux10~25 ;
wire \fbuf[2][14] ;
wire \shift[4][6] ;
wire \Mux10~26 ;
wire \pixnumber_rtl_4|wysi_counter|counter_cell[2]~COUT ;
wire \fbuf[1][6] ;
wire \shift[3][6] ;
wire \Mux10~23 ;
wire \fbuf[2][6] ;
wire \shift[5][6] ;
wire \Mux10~24 ;
wire \Mux10~27 ;
wire \fbuf[3][15] ;
wire \shift[6][7] ;
wire \fbuf[1][15] ;
wire \shift[2][7] ;
wire \Mux10~21 ;
wire \fbuf[2][15] ;
wire \shift[4][7] ;
wire \Mux10~22 ;
wire \fbuf[3][4] ;
wire \shift[7][4] ;
wire \fbuf[2][4] ;
wire \shift[5][4] ;
wire \Mux15~28 ;
wire \fbuf[1][4] ;
wire \shift[3][4] ;
wire \Mux15~29 ;
wire \fbuf[1][9] ;
wire \shift[2][1] ;
wire \Mux15~25 ;
wire \fbuf[2][9] ;
wire \shift[4][1] ;
wire \Mux15~26 ;
wire \fbuf[1][12] ;
wire \shift[2][4] ;
wire \Mux15~23 ;
wire \fbuf[2][12] ;
wire \shift[4][4] ;
wire \Mux15~24 ;
wire \Mux15~27 ;
wire \fbuf[3][1] ;
wire \shift[7][1] ;
wire \fbuf[1][1] ;
wire \shift[3][1] ;
wire \Mux15~21 ;
wire \fbuf[2][1] ;
wire \shift[5][1] ;
wire \Mux15~22 ;
wire \fbuf[0][9] ;
wire \shift[0][1] ;
wire \fbuf[0][1] ;
wire \shift[1][1] ;
wire \pixbyte~37 ;
wire \Mux8~13 ;
wire \fbuf[0][10] ;
wire \shift[0][2] ;
wire \fbuf[0][2] ;
wire \shift[1][2] ;
wire \pixbyte~36 ;
wire \Mux8~14 ;
wire \fbuf[0][13] ;
wire \shift[0][5] ;
wire \fbuf[0][5] ;
wire \shift[1][5] ;
wire \pixbyte~33 ;
wire \Mux8~11 ;
wire \fbuf[0][14] ;
wire \shift[0][6] ;
wire \fbuf[0][6] ;
wire \shift[1][6] ;
wire \pixbyte~32 ;
wire \Mux8~12 ;
wire \zxcolor~1 ;
wire \zxcolor~198 ;
wire \fbuf[3][5] ;
wire \shift[7][5] ;
wire \fbuf[3][2] ;
wire \shift[7][2] ;
wire \Mux14~28 ;
wire \fbuf[2][5] ;
wire \shift[5][5] ;
wire \Mux14~29 ;
wire \Mux14~25 ;
wire \fbuf[1][10] ;
wire \shift[2][2] ;
wire \Mux14~26 ;
wire \fbuf[2][13] ;
wire \shift[4][5] ;
wire \Mux14~23 ;
wire \fbuf[3][10] ;
wire \shift[6][2] ;
wire \Mux14~24 ;
wire \Mux14~27 ;
wire \fbuf[1][5] ;
wire \shift[3][5] ;
wire \Mux14~21 ;
wire \fbuf[1][2] ;
wire \shift[3][2] ;
wire \Mux14~22 ;
wire \fbuf[1][13] ;
wire \shift[2][5] ;
wire \zxcolor~201 ;
wire \fbuf[3][3] ;
wire \shift[7][3] ;
wire \fbuf[1][3] ;
wire \shift[3][3] ;
wire \Mux16~28 ;
wire \fbuf[3][0] ;
wire \shift[7][0] ;
wire \Mux16~29 ;
wire \fbuf[2][8] ;
wire \shift[4][0] ;
wire \Mux16~25 ;
wire \fbuf[0][11] ;
wire \shift[0][3] ;
wire \Mux16~26 ;
wire \fbuf[3][8] ;
wire \shift[6][0] ;
wire \Mux16~23 ;
wire \fbuf[1][11] ;
wire \shift[2][3] ;
wire \Mux16~24 ;
wire \Mux16~27 ;
wire \fbuf[2][3] ;
wire \shift[5][3] ;
wire \fbuf[2][0] ;
wire \shift[5][0] ;
wire \Mux16~21 ;
wire \fbuf[0][3] ;
wire \shift[1][3] ;
wire \Mux16~22 ;
wire \fbuf[1][0] ;
wire \shift[3][0] ;
wire \zxcolor~204 ;
wire \fbuf[1][8] ;
wire \shift[2][0] ;
wire \hcnt~59 ;
wire [1:0] ddcnt;
wire [5:0] scnt;
wire [5:0] \Add2|adder|result_node|cout ;
wire [5:0] \Add2|adder|result_node|cs_buffer ;
wire [5:0] \Add2|adder|unreg_res_node ;
wire [4:0] \flashctr_rtl_5|wysi_counter|q ;
wire [3:0] \pixnumber_rtl_4|wysi_counter|q ;
wire [3:0] \wcnt_rtl_9|wysi_counter|q ;
wire [4:0] \fcnt_rtl_8|wysi_counter|q ;


// atom is at LC8_G19
flex10ke_lcell \shift[0][7]~I (
// Equation(s):
// \shift[0][7]  = DFFEA(\fbuf[0][15] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[0][15] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[0][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[0][7]~I .clock_enable_mode = "true";
defparam \shift[0][7]~I .lut_mask = "ff00";
defparam \shift[0][7]~I .operation_mode = "normal";
defparam \shift[0][7]~I .output_mode = "reg_only";
defparam \shift[0][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G28
flex10ke_lcell \shift[7][6]~I (
// Equation(s):
// \shift[7][6]  = DFFEA(\fbuf[3][6] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[3][6] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[7][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[7][6]~I .clock_enable_mode = "true";
defparam \shift[7][6]~I .lut_mask = "ff00";
defparam \shift[7][6]~I .operation_mode = "normal";
defparam \shift[7][6]~I .output_mode = "reg_only";
defparam \shift[7][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G10
flex10ke_lcell \shift[6][6]~I (
// Equation(s):
// \shift[6][6]  = DFFEA(\fbuf[3][14] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[3][14] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[6][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[6][6]~I .clock_enable_mode = "true";
defparam \shift[6][6]~I .lut_mask = "ff00";
defparam \shift[6][6]~I .operation_mode = "normal";
defparam \shift[6][6]~I .output_mode = "reg_only";
defparam \shift[6][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G10
flex10ke_lcell \shift[1][7]~I (
// Equation(s):
// \shift[1][7]  = DFFEA(\fbuf[0][7] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[0][7] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[1][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[1][7]~I .clock_enable_mode = "true";
defparam \shift[1][7]~I .lut_mask = "ff00";
defparam \shift[1][7]~I .operation_mode = "normal";
defparam \shift[1][7]~I .output_mode = "reg_only";
defparam \shift[1][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G20
flex10ke_lcell \shift[0][4]~I (
// Equation(s):
// \shift[0][4]  = DFFEA(\fbuf[0][12] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[0][12] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[0][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[0][4]~I .clock_enable_mode = "true";
defparam \shift[0][4]~I .lut_mask = "ff00";
defparam \shift[0][4]~I .operation_mode = "normal";
defparam \shift[0][4]~I .output_mode = "reg_only";
defparam \shift[0][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G28
flex10ke_lcell \shift[6][4]~I (
// Equation(s):
// \shift[6][4]  = DFFEA(\fbuf[3][12] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[3][12] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[6][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[6][4]~I .clock_enable_mode = "true";
defparam \shift[6][4]~I .lut_mask = "ff00";
defparam \shift[6][4]~I .operation_mode = "normal";
defparam \shift[6][4]~I .output_mode = "reg_only";
defparam \shift[6][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G8
flex10ke_lcell \shift[6][1]~I (
// Equation(s):
// \shift[6][1]  = DFFEA(\fbuf[3][9] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[3][9] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[6][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[6][1]~I .clock_enable_mode = "true";
defparam \shift[6][1]~I .lut_mask = "ff00";
defparam \shift[6][1]~I .operation_mode = "normal";
defparam \shift[6][1]~I .output_mode = "reg_only";
defparam \shift[6][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G22
flex10ke_lcell \shift[1][4]~I (
// Equation(s):
// \shift[1][4]  = DFFEA(\fbuf[0][4] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[0][4] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[1][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[1][4]~I .clock_enable_mode = "true";
defparam \shift[1][4]~I .lut_mask = "ff00";
defparam \shift[1][4]~I .operation_mode = "normal";
defparam \shift[1][4]~I .output_mode = "reg_only";
defparam \shift[1][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G2
flex10ke_lcell \pixbyte~34_I (
// Equation(s):
// \pixbyte~34  = \pixnumber_rtl_4|wysi_counter|q [3] & (\shift[1][7] ) # !\pixnumber_rtl_4|wysi_counter|q [3] & \shift[0][7] 

        .dataa(vcc),
        .datab(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datac(\shift[0][7] ),
        .datad(\shift[1][7] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\pixbyte~34 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pixbyte~34_I .clock_enable_mode = "false";
defparam \pixbyte~34_I .lut_mask = "fc30";
defparam \pixbyte~34_I .operation_mode = "normal";
defparam \pixbyte~34_I .output_mode = "comb_only";
defparam \pixbyte~34_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G20
flex10ke_lcell \pixbyte~35_I (
// Equation(s):
// \pixbyte~35  = \pixnumber_rtl_4|wysi_counter|q [3] & (\shift[1][4] ) # !\pixnumber_rtl_4|wysi_counter|q [3] & \shift[0][4] 

        .dataa(vcc),
        .datab(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datac(\shift[0][4] ),
        .datad(\shift[1][4] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\pixbyte~35 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pixbyte~35_I .clock_enable_mode = "false";
defparam \pixbyte~35_I .lut_mask = "fc30";
defparam \pixbyte~35_I .operation_mode = "normal";
defparam \pixbyte~35_I .output_mode = "comb_only";
defparam \pixbyte~35_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G4
flex10ke_lcell \pixbyte~38_I (
// Equation(s):
// \pixbyte~38  = \pixnumber_rtl_4|wysi_counter|q [3] & (\shift[1][3] ) # !\pixnumber_rtl_4|wysi_counter|q [3] & \shift[0][3] 

        .dataa(vcc),
        .datab(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datac(\shift[0][3] ),
        .datad(\shift[1][3] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\pixbyte~38 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pixbyte~38_I .clock_enable_mode = "false";
defparam \pixbyte~38_I .lut_mask = "fc30";
defparam \pixbyte~38_I .operation_mode = "normal";
defparam \pixbyte~38_I .output_mode = "comb_only";
defparam \pixbyte~38_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G6
flex10ke_lcell \shift[1][0]~I (
// Equation(s):
// \shift[1][0]  = DFFEA(\fbuf[0][0] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[0][0] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[1][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[1][0]~I .clock_enable_mode = "true";
defparam \shift[1][0]~I .lut_mask = "ff00";
defparam \shift[1][0]~I .operation_mode = "normal";
defparam \shift[1][0]~I .output_mode = "reg_only";
defparam \shift[1][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G6
flex10ke_lcell \shift[0][0]~I (
// Equation(s):
// \shift[0][0]  = DFFEA(\fbuf[0][8] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[0][8] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[0][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[0][0]~I .clock_enable_mode = "true";
defparam \shift[0][0]~I .lut_mask = "ff00";
defparam \shift[0][0]~I .operation_mode = "normal";
defparam \shift[0][0]~I .output_mode = "reg_only";
defparam \shift[0][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G6
flex10ke_lcell \pixbyte~39_I (
// Equation(s):
// \pixbyte~39  = \pixnumber_rtl_4|wysi_counter|q [3] & (\shift[1][0] ) # !\pixnumber_rtl_4|wysi_counter|q [3] & \shift[0][0] 

        .dataa(vcc),
        .datab(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datac(\shift[0][0] ),
        .datad(\shift[1][0] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\pixbyte~39 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pixbyte~39_I .clock_enable_mode = "false";
defparam \pixbyte~39_I .lut_mask = "fc30";
defparam \pixbyte~39_I .operation_mode = "normal";
defparam \pixbyte~39_I .output_mode = "comb_only";
defparam \pixbyte~39_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G21
flex10ke_lcell \flashctr_rtl_5|wysi_counter|counter_cell[4] (
// Equation(s):
// \flashctr_rtl_5|wysi_counter|q [4] = DFFEA((\flashctr_rtl_5|wysi_counter|q [4] $ (int_start & \flashctr_rtl_5|wysi_counter|counter_cell[3]~COUT )) & VCC, GLOBAL(\fclk~dataout ), , , int_start, , )

        .dataa(int_start),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\flashctr_rtl_5|wysi_counter|counter_cell[3]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\flashctr_rtl_5|wysi_counter|q [4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \flashctr_rtl_5|wysi_counter|counter_cell[4] .cin_used = "true";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[4] .clock_enable_mode = "true";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[4] .lut_mask = "6c6c";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[4] .operation_mode = "clrb_cntr";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[4] .output_mode = "reg_only";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[4] .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G21
flex10ke_lcell \zxcolor~197_I (
// Equation(s):
// \zxcolor~197  = \flashctr_rtl_5|wysi_counter|q [4] & (\pixnumber_rtl_4|wysi_counter|q [3] & (\shift[3][7] ) # !\pixnumber_rtl_4|wysi_counter|q [3] & \shift[2][7] )

        .dataa(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datab(\shift[2][7] ),
        .datac(\shift[3][7] ),
        .datad(\flashctr_rtl_5|wysi_counter|q [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\zxcolor~197 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zxcolor~197_I .clock_enable_mode = "false";
defparam \zxcolor~197_I .lut_mask = "e400";
defparam \zxcolor~197_I .operation_mode = "normal";
defparam \zxcolor~197_I .output_mode = "comb_only";
defparam \zxcolor~197_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G18
flex10ke_lcell \shift[4][2]~I (
// Equation(s):
// \shift[4][2]  = DFFEA(\fbuf[2][10] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[2][10] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[4][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[4][2]~I .clock_enable_mode = "true";
defparam \shift[4][2]~I .lut_mask = "ff00";
defparam \shift[4][2]~I .operation_mode = "normal";
defparam \shift[4][2]~I .output_mode = "reg_only";
defparam \shift[4][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G5
flex10ke_lcell \shift[6][5]~I (
// Equation(s):
// \shift[6][5]  = DFFEA(\fbuf[3][13] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[3][13] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[6][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[6][5]~I .clock_enable_mode = "true";
defparam \shift[6][5]~I .lut_mask = "ff00";
defparam \shift[6][5]~I .operation_mode = "normal";
defparam \shift[6][5]~I .output_mode = "reg_only";
defparam \shift[6][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G26
flex10ke_lcell \shift[5][2]~I (
// Equation(s):
// \shift[5][2]  = DFFEA(\fbuf[2][2] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[2][2] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[5][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[5][2]~I .clock_enable_mode = "true";
defparam \shift[5][2]~I .lut_mask = "ff00";
defparam \shift[5][2]~I .operation_mode = "normal";
defparam \shift[5][2]~I .output_mode = "reg_only";
defparam \shift[5][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_F11
flex10ke_lcell \shift[6][3]~I (
// Equation(s):
// \shift[6][3]  = DFFEA(\fbuf[3][11] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[3][11] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[6][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[6][3]~I .clock_enable_mode = "true";
defparam \shift[6][3]~I .lut_mask = "ff00";
defparam \shift[6][3]~I .operation_mode = "normal";
defparam \shift[6][3]~I .output_mode = "reg_only";
defparam \shift[6][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G11
flex10ke_lcell \shift[4][3]~I (
// Equation(s):
// \shift[4][3]  = DFFEA(\fbuf[2][11] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[2][11] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[4][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[4][3]~I .clock_enable_mode = "true";
defparam \shift[4][3]~I .lut_mask = "ff00";
defparam \shift[4][3]~I .operation_mode = "normal";
defparam \shift[4][3]~I .output_mode = "reg_only";
defparam \shift[4][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G19
flex10ke_lcell \fbuf[0][15]~I (
// Equation(s):
// \fbuf[0][15]  = DFFEA(rddata_15, GLOBAL(\fclk~dataout ), , , \fbuf[0][14]~415 , , )

        .dataa(\fbuf[0][14]~415 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[0][15] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][15]~I .clock_enable_mode = "true";
defparam \fbuf[0][15]~I .lut_mask = "ff00";
defparam \fbuf[0][15]~I .operation_mode = "normal";
defparam \fbuf[0][15]~I .output_mode = "reg_only";
defparam \fbuf[0][15]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G28
flex10ke_lcell \fbuf[3][6]~I (
// Equation(s):
// \fbuf[3][6]  = DFFEA(rddata_6, GLOBAL(\fclk~dataout ), , , \fbuf[3][14]~416 , , )

        .dataa(\fbuf[3][14]~416 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[3][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][6]~I .clock_enable_mode = "true";
defparam \fbuf[3][6]~I .lut_mask = "ff00";
defparam \fbuf[3][6]~I .operation_mode = "normal";
defparam \fbuf[3][6]~I .output_mode = "reg_only";
defparam \fbuf[3][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G10
flex10ke_lcell \fbuf[3][14]~I (
// Equation(s):
// \fbuf[3][14]  = DFFEA(rddata_14, GLOBAL(\fclk~dataout ), , , \fbuf[3][14]~416 , , )

        .dataa(\fbuf[3][14]~416 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[3][14] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][14]~I .clock_enable_mode = "true";
defparam \fbuf[3][14]~I .lut_mask = "ff00";
defparam \fbuf[3][14]~I .operation_mode = "normal";
defparam \fbuf[3][14]~I .output_mode = "reg_only";
defparam \fbuf[3][14]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G10
flex10ke_lcell \fbuf[0][7]~I (
// Equation(s):
// \fbuf[0][7]  = DFFEA(rddata_7, GLOBAL(\fclk~dataout ), , , \fbuf[0][14]~415 , , )

        .dataa(\fbuf[0][14]~415 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[0][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][7]~I .clock_enable_mode = "true";
defparam \fbuf[0][7]~I .lut_mask = "ff00";
defparam \fbuf[0][7]~I .operation_mode = "normal";
defparam \fbuf[0][7]~I .output_mode = "reg_only";
defparam \fbuf[0][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G23
flex10ke_lcell \fbuf[0][12]~I (
// Equation(s):
// \fbuf[0][12]  = DFFEA(rddata_12, GLOBAL(\fclk~dataout ), , , \fbuf[0][14]~415 , , )

        .dataa(\fbuf[0][14]~415 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_12),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[0][12] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][12]~I .clock_enable_mode = "true";
defparam \fbuf[0][12]~I .lut_mask = "ff00";
defparam \fbuf[0][12]~I .operation_mode = "normal";
defparam \fbuf[0][12]~I .output_mode = "reg_only";
defparam \fbuf[0][12]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G28
flex10ke_lcell \fbuf[3][12]~I (
// Equation(s):
// \fbuf[3][12]  = DFFEA(rddata_12, GLOBAL(\fclk~dataout ), , , \fbuf[3][14]~416 , , )

        .dataa(\fbuf[3][14]~416 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_12),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[3][12] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][12]~I .clock_enable_mode = "true";
defparam \fbuf[3][12]~I .lut_mask = "ff00";
defparam \fbuf[3][12]~I .operation_mode = "normal";
defparam \fbuf[3][12]~I .output_mode = "reg_only";
defparam \fbuf[3][12]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G8
flex10ke_lcell \fbuf[3][9]~I (
// Equation(s):
// \fbuf[3][9]  = DFFEA(rddata_9, GLOBAL(\fclk~dataout ), , , \fbuf[3][14]~416 , , )

        .dataa(\fbuf[3][14]~416 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_9),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[3][9] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][9]~I .clock_enable_mode = "true";
defparam \fbuf[3][9]~I .lut_mask = "ff00";
defparam \fbuf[3][9]~I .operation_mode = "normal";
defparam \fbuf[3][9]~I .output_mode = "reg_only";
defparam \fbuf[3][9]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G22
flex10ke_lcell \fbuf[0][4]~I (
// Equation(s):
// \fbuf[0][4]  = DFFEA(rddata_4, GLOBAL(\fclk~dataout ), , , \fbuf[0][14]~415 , , )

        .dataa(\fbuf[0][14]~415 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[0][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][4]~I .clock_enable_mode = "true";
defparam \fbuf[0][4]~I .lut_mask = "ff00";
defparam \fbuf[0][4]~I .operation_mode = "normal";
defparam \fbuf[0][4]~I .output_mode = "reg_only";
defparam \fbuf[0][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G17
flex10ke_lcell \fbuf[0][0]~I (
// Equation(s):
// \fbuf[0][0]  = DFFEA(rddata_0, GLOBAL(\fclk~dataout ), , , \fbuf[0][14]~415 , , )

        .dataa(\fbuf[0][14]~415 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[0][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][0]~I .clock_enable_mode = "true";
defparam \fbuf[0][0]~I .lut_mask = "ff00";
defparam \fbuf[0][0]~I .operation_mode = "normal";
defparam \fbuf[0][0]~I .output_mode = "reg_only";
defparam \fbuf[0][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G6
flex10ke_lcell \fbuf[0][8]~I (
// Equation(s):
// \fbuf[0][8]  = DFFEA(rddata_8, GLOBAL(\fclk~dataout ), , , \fbuf[0][14]~415 , , )

        .dataa(\fbuf[0][14]~415 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_8),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[0][8] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][8]~I .clock_enable_mode = "true";
defparam \fbuf[0][8]~I .lut_mask = "ff00";
defparam \fbuf[0][8]~I .operation_mode = "normal";
defparam \fbuf[0][8]~I .output_mode = "reg_only";
defparam \fbuf[0][8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G21
flex10ke_lcell \flashctr_rtl_5|wysi_counter|counter_cell[3] (
// Equation(s):
// \flashctr_rtl_5|wysi_counter|counter_cell[3]~COUT  = CARRY( & (\flashctr_rtl_5|wysi_counter|counter_cell[2]~COUT ))

        .dataa(int_start),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\flashctr_rtl_5|wysi_counter|counter_cell[2]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\flashctr_rtl_5|wysi_counter|q [3]),
        .cout(\flashctr_rtl_5|wysi_counter|counter_cell[3]~COUT ),
        .cascout());
// synopsys translate_off
defparam \flashctr_rtl_5|wysi_counter|counter_cell[3] .cin_used = "true";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[3] .clock_enable_mode = "true";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[3] .lut_mask = "6ca0";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[3] .operation_mode = "clrb_cntr";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[3] .output_mode = "none";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[3] .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G18
flex10ke_lcell \fbuf[2][10]~I (
// Equation(s):
// \fbuf[2][10]  = DFFEA(rddata_10, GLOBAL(\fclk~dataout ), , , \fbuf[2][14]~413 , , )

        .dataa(\fbuf[2][14]~413 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_10),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[2][10] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][10]~I .clock_enable_mode = "true";
defparam \fbuf[2][10]~I .lut_mask = "ff00";
defparam \fbuf[2][10]~I .operation_mode = "normal";
defparam \fbuf[2][10]~I .output_mode = "reg_only";
defparam \fbuf[2][10]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G5
flex10ke_lcell \fbuf[3][13]~I (
// Equation(s):
// \fbuf[3][13]  = DFFEA(rddata_13, GLOBAL(\fclk~dataout ), , , \fbuf[3][14]~416 , , )

        .dataa(\fbuf[3][14]~416 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_13),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[3][13] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][13]~I .clock_enable_mode = "true";
defparam \fbuf[3][13]~I .lut_mask = "ff00";
defparam \fbuf[3][13]~I .operation_mode = "normal";
defparam \fbuf[3][13]~I .output_mode = "reg_only";
defparam \fbuf[3][13]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G26
flex10ke_lcell \fbuf[2][2]~I (
// Equation(s):
// \fbuf[2][2]  = DFFEA(rddata_2, GLOBAL(\fclk~dataout ), , , \fbuf[2][14]~413 , , )

        .dataa(\fbuf[2][14]~413 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[2][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][2]~I .clock_enable_mode = "true";
defparam \fbuf[2][2]~I .lut_mask = "ff00";
defparam \fbuf[2][2]~I .operation_mode = "normal";
defparam \fbuf[2][2]~I .output_mode = "reg_only";
defparam \fbuf[2][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_F11
flex10ke_lcell \fbuf[3][11]~I (
// Equation(s):
// \fbuf[3][11]  = DFFEA(rddata_11, GLOBAL(\fclk~dataout ), , , \fbuf[3][14]~416 , , )

        .dataa(\fbuf[3][14]~416 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[3][11] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][11]~I .clock_enable_mode = "true";
defparam \fbuf[3][11]~I .lut_mask = "ff00";
defparam \fbuf[3][11]~I .operation_mode = "normal";
defparam \fbuf[3][11]~I .output_mode = "reg_only";
defparam \fbuf[3][11]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G11
flex10ke_lcell \fbuf[2][11]~I (
// Equation(s):
// \fbuf[2][11]  = DFFEA(rddata_11, GLOBAL(\fclk~dataout ), , , \fbuf[2][14]~413 , , )

        .dataa(\fbuf[2][14]~413 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[2][11] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][11]~I .clock_enable_mode = "true";
defparam \fbuf[2][11]~I .lut_mask = "ff00";
defparam \fbuf[2][11]~I .operation_mode = "normal";
defparam \fbuf[2][11]~I .output_mode = "reg_only";
defparam \fbuf[2][11]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I14
flex10ke_lcell \always4~0_I (
// Equation(s):
// \always4~0  = !\fcnt_rtl_8|wysi_counter|q [4] & wordsync

        .dataa(vcc),
        .datab(vcc),
        .datac(\fcnt_rtl_8|wysi_counter|q [4]),
        .datad(wordsync),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always4~0 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always4~0_I .clock_enable_mode = "false";
defparam \always4~0_I .lut_mask = "0f00";
defparam \always4~0_I .operation_mode = "normal";
defparam \always4~0_I .output_mode = "comb_only";
defparam \always4~0_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I22
flex10ke_lcell \ddcnt[1]~I (
// Equation(s):
// ddcnt[1] = DFFEA(dcnt_1, GLOBAL(\fclk~dataout ), , , \ddcnt[1]~18 , , )

        .dataa(\ddcnt[1]~18 ),
        .datab(vcc),
        .datac(vcc),
        .datad(dcnt_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ddcnt[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ddcnt[1]~I .clock_enable_mode = "true";
defparam \ddcnt[1]~I .lut_mask = "ff00";
defparam \ddcnt[1]~I .operation_mode = "normal";
defparam \ddcnt[1]~I .output_mode = "reg_only";
defparam \ddcnt[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I22
flex10ke_lcell \ddcnt[0]~I (
// Equation(s):
// ddcnt[0] = DFFEA(dcnt_0, GLOBAL(\fclk~dataout ), , , \ddcnt[1]~18 , , )

        .dataa(\ddcnt[1]~18 ),
        .datab(vcc),
        .datac(vcc),
        .datad(dcnt_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ddcnt[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ddcnt[0]~I .clock_enable_mode = "true";
defparam \ddcnt[0]~I .lut_mask = "ff00";
defparam \ddcnt[0]~I .operation_mode = "normal";
defparam \ddcnt[0]~I .output_mode = "reg_only";
defparam \ddcnt[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I19
flex10ke_lcell \fbuf[2][14]~413_I (
// Equation(s):
// \fbuf[2][14]~413  = !ddcnt[0] & ddcnt[1] & peff7_int_0 & video_strobe

        .dataa(ddcnt[0]),
        .datab(ddcnt[1]),
        .datac(peff7_int_0),
        .datad(video_strobe),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\fbuf[2][14]~413 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][14]~413_I .clock_enable_mode = "false";
defparam \fbuf[2][14]~413_I .lut_mask = "4000";
defparam \fbuf[2][14]~413_I .operation_mode = "normal";
defparam \fbuf[2][14]~413_I .output_mode = "comb_only";
defparam \fbuf[2][14]~413_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I19
flex10ke_lcell \fbuf[1][14]~414_I (
// Equation(s):
// \fbuf[1][14]~414  = video_strobe & ddcnt[0] & (!peff7_int_0 # !ddcnt[1])

        .dataa(ddcnt[1]),
        .datab(peff7_int_0),
        .datac(video_strobe),
        .datad(ddcnt[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\fbuf[1][14]~414 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][14]~414_I .clock_enable_mode = "false";
defparam \fbuf[1][14]~414_I .lut_mask = "7000";
defparam \fbuf[1][14]~414_I .operation_mode = "normal";
defparam \fbuf[1][14]~414_I .output_mode = "comb_only";
defparam \fbuf[1][14]~414_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_I19
flex10ke_lcell \fbuf[0][14]~415_I (
// Equation(s):
// \fbuf[0][14]~415  = !ddcnt[0] & video_strobe & (!peff7_int_0 # !ddcnt[1])

        .dataa(ddcnt[0]),
        .datab(ddcnt[1]),
        .datac(peff7_int_0),
        .datad(video_strobe),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\fbuf[0][14]~415 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][14]~415_I .clock_enable_mode = "false";
defparam \fbuf[0][14]~415_I .lut_mask = "1500";
defparam \fbuf[0][14]~415_I .operation_mode = "normal";
defparam \fbuf[0][14]~415_I .output_mode = "comb_only";
defparam \fbuf[0][14]~415_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I19
flex10ke_lcell \fbuf[3][14]~416_I (
// Equation(s):
// \fbuf[3][14]~416  = ddcnt[1] & peff7_int_0 & video_strobe & ddcnt[0]

        .dataa(ddcnt[1]),
        .datab(peff7_int_0),
        .datac(video_strobe),
        .datad(ddcnt[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\fbuf[3][14]~416 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][14]~416_I .clock_enable_mode = "false";
defparam \fbuf[3][14]~416_I .lut_mask = "8000";
defparam \fbuf[3][14]~416_I .operation_mode = "normal";
defparam \fbuf[3][14]~416_I .output_mode = "comb_only";
defparam \fbuf[3][14]~416_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G21
flex10ke_lcell \flashctr_rtl_5|wysi_counter|counter_cell[2] (
// Equation(s):
// \flashctr_rtl_5|wysi_counter|counter_cell[2]~COUT  = CARRY( & (\flashctr_rtl_5|wysi_counter|counter_cell[1]~COUT ))

        .dataa(int_start),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\flashctr_rtl_5|wysi_counter|counter_cell[1]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\flashctr_rtl_5|wysi_counter|q [2]),
        .cout(\flashctr_rtl_5|wysi_counter|counter_cell[2]~COUT ),
        .cascout());
// synopsys translate_off
defparam \flashctr_rtl_5|wysi_counter|counter_cell[2] .cin_used = "true";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[2] .clock_enable_mode = "true";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[2] .lut_mask = "6ca0";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[2] .operation_mode = "clrb_cntr";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[2] .output_mode = "none";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[2] .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I22
flex10ke_lcell \ddcnt[1]~18_I (
// Equation(s):
// \ddcnt[1]~18  = !line_start & video_next

        .dataa(vcc),
        .datab(vcc),
        .datac(line_start),
        .datad(video_next),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ddcnt[1]~18 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ddcnt[1]~18_I .clock_enable_mode = "false";
defparam \ddcnt[1]~18_I .lut_mask = "0f00";
defparam \ddcnt[1]~18_I .operation_mode = "normal";
defparam \ddcnt[1]~18_I .output_mode = "comb_only";
defparam \ddcnt[1]~18_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G21
flex10ke_lcell \flashctr_rtl_5|wysi_counter|counter_cell[1] (
// Equation(s):
// \flashctr_rtl_5|wysi_counter|counter_cell[1]~COUT  = CARRY( & (\flashctr_rtl_5|wysi_counter|counter_cell[0]~COUT ))

        .dataa(int_start),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\flashctr_rtl_5|wysi_counter|counter_cell[0]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\flashctr_rtl_5|wysi_counter|q [1]),
        .cout(\flashctr_rtl_5|wysi_counter|counter_cell[1]~COUT ),
        .cascout());
// synopsys translate_off
defparam \flashctr_rtl_5|wysi_counter|counter_cell[1] .cin_used = "true";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[1] .clock_enable_mode = "true";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[1] .lut_mask = "6ca0";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[1] .operation_mode = "clrb_cntr";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[1] .output_mode = "none";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[1] .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G21
flex10ke_lcell \flashctr_rtl_5|wysi_counter|counter_cell[0] (
// Equation(s):
// \flashctr_rtl_5|wysi_counter|counter_cell[0]~COUT  = CARRY()

        .dataa(int_start),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\flashctr_rtl_5|wysi_counter|q [0]),
        .cout(\flashctr_rtl_5|wysi_counter|counter_cell[0]~COUT ),
        .cascout());
// synopsys translate_off
defparam \flashctr_rtl_5|wysi_counter|counter_cell[0] .clock_enable_mode = "true";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[0] .lut_mask = "66aa";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[0] .operation_mode = "clrb_cntr";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[0] .output_mode = "none";
defparam \flashctr_rtl_5|wysi_counter|counter_cell[0] .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I14
flex10ke_lcell \go~I (
// Equation(s):
// go = DFFEA(\go~69  & go # !go_start, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(\go~69 ),
        .datac(go),
        .datad(go_start),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(go),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \go~I .clock_enable_mode = "false";
defparam \go~I .lut_mask = "c0ff";
defparam \go~I .operation_mode = "normal";
defparam \go~I .output_mode = "reg_only";
defparam \go~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G15
flex10ke_lcell \Mux10~30_I (
// Equation(s):
// Mux10 = \Mux10~27  & (\Mux10~29  # !\pixnumber_rtl_4|wysi_counter|q [0]) # !\Mux10~27  & (\pixnumber_rtl_4|wysi_counter|q [0] & \Mux10~22 )

        .dataa(\Mux10~29 ),
        .datab(\Mux10~27 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [0]),
        .datad(\Mux10~22 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Mux10),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux10~30_I .clock_enable_mode = "false";
defparam \Mux10~30_I .lut_mask = "bc8c";
defparam \Mux10~30_I .operation_mode = "normal";
defparam \Mux10~30_I .output_mode = "comb_only";
defparam \Mux10~30_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G14
flex10ke_lcell \zxcolor[3]~196_I (
// Equation(s):
// zxcolor_3 = \pixnumber_rtl_4|wysi_counter|q [3] & (\shift[3][6] ) # !\pixnumber_rtl_4|wysi_counter|q [3] & \shift[2][6] 

        .dataa(vcc),
        .datab(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datac(\shift[2][6] ),
        .datad(\shift[3][6] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(zxcolor_3),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zxcolor[3]~196_I .clock_enable_mode = "false";
defparam \zxcolor[3]~196_I .lut_mask = "fc30";
defparam \zxcolor[3]~196_I .operation_mode = "normal";
defparam \zxcolor[3]~196_I .output_mode = "comb_only";
defparam \zxcolor[3]~196_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G20
flex10ke_lcell \Mux15~30_I (
// Equation(s):
// Mux15 = \Mux15~27  & (\Mux15~29  # !\pixnumber_rtl_4|wysi_counter|q [3]) # !\Mux15~27  & (\pixnumber_rtl_4|wysi_counter|q [3] & \Mux15~22 )

        .dataa(\Mux15~29 ),
        .datab(\Mux15~27 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datad(\Mux15~22 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Mux15),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux15~30_I .clock_enable_mode = "false";
defparam \Mux15~30_I .lut_mask = "bc8c";
defparam \Mux15~30_I .operation_mode = "normal";
defparam \Mux15~30_I .output_mode = "comb_only";
defparam \Mux15~30_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G1
flex10ke_lcell \zxcolor~199_I (
// Equation(s):
// zxcolor = \zxcolor~198  & (\shift[3][1]  # !\zxcolor~1 ) # !\zxcolor~198  & (\zxcolor~1  & \shift[2][1] )

        .dataa(\shift[3][1] ),
        .datab(\zxcolor~198 ),
        .datac(\zxcolor~1 ),
        .datad(\shift[2][1] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(zxcolor),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zxcolor~199_I .clock_enable_mode = "false";
defparam \zxcolor~199_I .lut_mask = "bc8c";
defparam \zxcolor~199_I .operation_mode = "normal";
defparam \zxcolor~199_I .output_mode = "comb_only";
defparam \zxcolor~199_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F2
flex10ke_lcell \zxcolor[1]~200_I (
// Equation(s):
// zxcolor_1 = peff7_int_0 & (Mux15) # !peff7_int_0 & zxcolor

        .dataa(vcc),
        .datab(peff7_int_0),
        .datac(zxcolor),
        .datad(Mux15),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(zxcolor_1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zxcolor[1]~200_I .clock_enable_mode = "false";
defparam \zxcolor[1]~200_I .lut_mask = "fc30";
defparam \zxcolor[1]~200_I .operation_mode = "normal";
defparam \zxcolor[1]~200_I .output_mode = "comb_only";
defparam \zxcolor[1]~200_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G7
flex10ke_lcell \Mux14~30_I (
// Equation(s):
// Mux14 = \Mux14~27  & (\Mux14~29  # !\pixnumber_rtl_4|wysi_counter|q [3]) # !\Mux14~27  & (\pixnumber_rtl_4|wysi_counter|q [3] & \Mux14~22 )

        .dataa(\Mux14~29 ),
        .datab(\Mux14~27 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datad(\Mux14~22 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Mux14),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux14~30_I .clock_enable_mode = "false";
defparam \Mux14~30_I .lut_mask = "bc8c";
defparam \Mux14~30_I .operation_mode = "normal";
defparam \Mux14~30_I .output_mode = "comb_only";
defparam \Mux14~30_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G16
flex10ke_lcell \zxcolor~202_I (
// Equation(s):
// zxcolor1 = \zxcolor~201  & (\shift[3][2]  # !\zxcolor~1 ) # !\zxcolor~201  & (\zxcolor~1  & \shift[2][2] )

        .dataa(\shift[3][2] ),
        .datab(\zxcolor~201 ),
        .datac(\zxcolor~1 ),
        .datad(\shift[2][2] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(zxcolor1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zxcolor~202_I .clock_enable_mode = "false";
defparam \zxcolor~202_I .lut_mask = "bc8c";
defparam \zxcolor~202_I .operation_mode = "normal";
defparam \zxcolor~202_I .output_mode = "comb_only";
defparam \zxcolor~202_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_F4
flex10ke_lcell \zxcolor[2]~203_I (
// Equation(s):
// zxcolor_2 = peff7_int_0 & (Mux14) # !peff7_int_0 & zxcolor1

        .dataa(vcc),
        .datab(peff7_int_0),
        .datac(zxcolor1),
        .datad(Mux14),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(zxcolor_2),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zxcolor[2]~203_I .clock_enable_mode = "false";
defparam \zxcolor[2]~203_I .lut_mask = "fc30";
defparam \zxcolor[2]~203_I .operation_mode = "normal";
defparam \zxcolor[2]~203_I .output_mode = "comb_only";
defparam \zxcolor[2]~203_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G11
flex10ke_lcell \Mux16~30_I (
// Equation(s):
// Mux16 = \Mux16~27  & (\Mux16~29  # !\pixnumber_rtl_4|wysi_counter|q [3]) # !\Mux16~27  & (\pixnumber_rtl_4|wysi_counter|q [3] & \Mux16~22 )

        .dataa(\Mux16~29 ),
        .datab(\Mux16~27 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datad(\Mux16~22 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Mux16),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux16~30_I .clock_enable_mode = "false";
defparam \Mux16~30_I .lut_mask = "bc8c";
defparam \Mux16~30_I .operation_mode = "normal";
defparam \Mux16~30_I .output_mode = "comb_only";
defparam \Mux16~30_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_F1
flex10ke_lcell \zxcolor~205_I (
// Equation(s):
// zxcolor2 = \zxcolor~204  & (\shift[3][0]  # !\zxcolor~1 ) # !\zxcolor~204  & (\zxcolor~1  & \shift[2][0] )

        .dataa(\shift[3][0] ),
        .datab(\zxcolor~204 ),
        .datac(\zxcolor~1 ),
        .datad(\shift[2][0] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(zxcolor2),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zxcolor~205_I .clock_enable_mode = "false";
defparam \zxcolor~205_I .lut_mask = "bc8c";
defparam \zxcolor~205_I .operation_mode = "normal";
defparam \zxcolor~205_I .output_mode = "comb_only";
defparam \zxcolor~205_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_F1
flex10ke_lcell \zxcolor[0]~206_I (
// Equation(s):
// zxcolor_0 = peff7_int_0 & (Mux16) # !peff7_int_0 & zxcolor2

        .dataa(vcc),
        .datab(peff7_int_0),
        .datac(zxcolor2),
        .datad(Mux16),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(zxcolor_0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zxcolor[0]~206_I .clock_enable_mode = "false";
defparam \zxcolor[0]~206_I .lut_mask = "fc30";
defparam \zxcolor[0]~206_I .operation_mode = "normal";
defparam \zxcolor[0]~206_I .output_mode = "comb_only";
defparam \zxcolor[0]~206_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I23
flex10ke_lcell \hcnt_rtl_11|wysi_counter|counter_cell[1] (
// Equation(s):
// q_1 = DFFEA((q_1 $ (\hcnt~59  & \hcnt_rtl_11|wysi_counter|counter_cell[0]~COUT )) & line_start1, GLOBAL(\fclk~dataout ), , , , , )
// \hcnt_rtl_11|wysi_counter|counter_cell[1]~COUT  = CARRY(q_1 & (\hcnt_rtl_11|wysi_counter|counter_cell[0]~COUT ))

        .dataa(\hcnt~59 ),
        .datab(line_start1),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\hcnt_rtl_11|wysi_counter|counter_cell[0]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(q_1),
        .cout(\hcnt_rtl_11|wysi_counter|counter_cell[1]~COUT ),
        .cascout());
// synopsys translate_off
defparam \hcnt_rtl_11|wysi_counter|counter_cell[1] .cin_used = "true";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[1] .clock_enable_mode = "false";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[1] .lut_mask = "6ca0";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[1] .operation_mode = "clrb_cntr";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[1] .output_mode = "reg_only";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[1] .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I23
flex10ke_lcell \hcnt_rtl_11|wysi_counter|counter_cell[2] (
// Equation(s):
// q_2 = DFFEA((q_2 $ (\hcnt~59  & \hcnt_rtl_11|wysi_counter|counter_cell[1]~COUT )) & line_start1, GLOBAL(\fclk~dataout ), , , , , )
// \hcnt_rtl_11|wysi_counter|counter_cell[2]~COUT  = CARRY(q_2 & (\hcnt_rtl_11|wysi_counter|counter_cell[1]~COUT ))

        .dataa(\hcnt~59 ),
        .datab(line_start1),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\hcnt_rtl_11|wysi_counter|counter_cell[1]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(q_2),
        .cout(\hcnt_rtl_11|wysi_counter|counter_cell[2]~COUT ),
        .cascout());
// synopsys translate_off
defparam \hcnt_rtl_11|wysi_counter|counter_cell[2] .cin_used = "true";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[2] .clock_enable_mode = "false";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[2] .lut_mask = "6ca0";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[2] .operation_mode = "clrb_cntr";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[2] .output_mode = "reg_only";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[2] .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I23
flex10ke_lcell \hcnt_rtl_11|wysi_counter|counter_cell[3] (
// Equation(s):
// q_3 = DFFEA((q_3 $ (\hcnt~59  & \hcnt_rtl_11|wysi_counter|counter_cell[2]~COUT )) & line_start1, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\hcnt~59 ),
        .datab(line_start1),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\hcnt_rtl_11|wysi_counter|counter_cell[2]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(q_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcnt_rtl_11|wysi_counter|counter_cell[3] .cin_used = "true";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[3] .clock_enable_mode = "false";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[3] .lut_mask = "6c6c";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[3] .operation_mode = "clrb_cntr";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[3] .output_mode = "reg_only";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[3] .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I18
flex10ke_lcell \vcnt_rtl_10|wysi_counter|counter_cell[3] (
// Equation(s):
// q_31 = DFFEA(((q_31 $ (\always1~0  & \vcnt_rtl_10|wysi_counter|counter_cell[2]~COUT ) & int_start1) # (int_start & !int_start1)) & VCC, GLOBAL(\fclk~dataout ), , , , , )
// \vcnt_rtl_10|wysi_counter|counter_cell[3]~COUT  = CARRY(q_31 & (\vcnt_rtl_10|wysi_counter|counter_cell[2]~COUT ))

        .dataa(\always1~0 ),
        .datab(vcc),
        .datac(int_start),
        .datad(int_start1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\vcnt_rtl_10|wysi_counter|counter_cell[2]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(q_31),
        .cout(\vcnt_rtl_10|wysi_counter|counter_cell[3]~COUT ),
        .cascout());
// synopsys translate_off
defparam \vcnt_rtl_10|wysi_counter|counter_cell[3] .cin_used = "true";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[3] .clock_enable_mode = "false";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[3] .lut_mask = "6ca0";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[3] .operation_mode = "clrb_cntr";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[3] .output_mode = "reg_only";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[3] .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I18
flex10ke_lcell \vcnt_rtl_10|wysi_counter|counter_cell[4] (
// Equation(s):
// q_4 = DFFEA(((q_4 $ (\always1~0  & \vcnt_rtl_10|wysi_counter|counter_cell[3]~COUT ) & int_start1) # (int_start & !int_start1)) & VCC, GLOBAL(\fclk~dataout ), , , , , )
// \vcnt_rtl_10|wysi_counter|counter_cell[4]~COUT  = CARRY(q_4 & (\vcnt_rtl_10|wysi_counter|counter_cell[3]~COUT ))

        .dataa(\always1~0 ),
        .datab(vcc),
        .datac(int_start),
        .datad(int_start1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\vcnt_rtl_10|wysi_counter|counter_cell[3]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(q_4),
        .cout(\vcnt_rtl_10|wysi_counter|counter_cell[4]~COUT ),
        .cascout());
// synopsys translate_off
defparam \vcnt_rtl_10|wysi_counter|counter_cell[4] .cin_used = "true";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[4] .clock_enable_mode = "false";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[4] .lut_mask = "6ca0";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[4] .operation_mode = "clrb_cntr";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[4] .output_mode = "reg_only";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[4] .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I18
flex10ke_lcell \vcnt_rtl_10|wysi_counter|counter_cell[5] (
// Equation(s):
// q_5 = DFFEA(((q_5 $ (\always1~0  & \vcnt_rtl_10|wysi_counter|counter_cell[4]~COUT ) & int_start1) # (int_start & !int_start1)) & VCC, GLOBAL(\fclk~dataout ), , , , , )
// \vcnt_rtl_10|wysi_counter|counter_cell[5]~COUT  = CARRY(q_5 & (\vcnt_rtl_10|wysi_counter|counter_cell[4]~COUT ))

        .dataa(\always1~0 ),
        .datab(vcc),
        .datac(int_start),
        .datad(int_start1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\vcnt_rtl_10|wysi_counter|counter_cell[4]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(q_5),
        .cout(\vcnt_rtl_10|wysi_counter|counter_cell[5]~COUT ),
        .cascout());
// synopsys translate_off
defparam \vcnt_rtl_10|wysi_counter|counter_cell[5] .cin_used = "true";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[5] .clock_enable_mode = "false";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[5] .lut_mask = "6ca0";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[5] .operation_mode = "clrb_cntr";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[5] .output_mode = "reg_only";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[5] .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I23
flex10ke_lcell \hcnt_rtl_11|wysi_counter|counter_cell[0] (
// Equation(s):
// q_0 = DFFEA((\hcnt~59  $ q_0) & line_start1, GLOBAL(\fclk~dataout ), , , , , )
// \hcnt_rtl_11|wysi_counter|counter_cell[0]~COUT  = CARRY(q_0)

        .dataa(\hcnt~59 ),
        .datab(line_start1),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(q_0),
        .cout(\hcnt_rtl_11|wysi_counter|counter_cell[0]~COUT ),
        .cascout());
// synopsys translate_off
defparam \hcnt_rtl_11|wysi_counter|counter_cell[0] .clock_enable_mode = "false";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[0] .lut_mask = "66aa";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[0] .operation_mode = "clrb_cntr";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[0] .output_mode = "reg_only";
defparam \hcnt_rtl_11|wysi_counter|counter_cell[0] .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_I22
flex10ke_lcell \dcnt[0]~I (
// Equation(s):
// dcnt_0 = DFFEA(!line_start & (video_next $ dcnt_0), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(line_start),
        .datac(video_next),
        .datad(dcnt_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dcnt_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dcnt[0]~I .clock_enable_mode = "false";
defparam \dcnt[0]~I .lut_mask = "0330";
defparam \dcnt[0]~I .operation_mode = "normal";
defparam \dcnt[0]~I .output_mode = "reg_only";
defparam \dcnt[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I22
flex10ke_lcell \dcnt[1]~I (
// Equation(s):
// dcnt_1 = DFFEA(!line_start & (dcnt_1 $ (video_next & dcnt_0)), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(line_start),
        .datab(video_next),
        .datac(dcnt_0),
        .datad(dcnt_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dcnt_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dcnt[1]~I .clock_enable_mode = "false";
defparam \dcnt[1]~I .lut_mask = "1540";
defparam \dcnt[1]~I .operation_mode = "normal";
defparam \dcnt[1]~I .output_mode = "reg_only";
defparam \dcnt[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_I18
flex10ke_lcell \vcnt_rtl_10|wysi_counter|counter_cell[7] (
// Equation(s):
// q_7 = DFFEA(((q_7 $ (\always1~0  & \vcnt_rtl_10|wysi_counter|counter_cell[6]~COUT ) & int_start1) # (int_start & !int_start1)) & VCC, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\always1~0 ),
        .datab(vcc),
        .datac(int_start),
        .datad(int_start1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\vcnt_rtl_10|wysi_counter|counter_cell[6]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(q_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vcnt_rtl_10|wysi_counter|counter_cell[7] .cin_used = "true";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[7] .clock_enable_mode = "false";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[7] .lut_mask = "6c6c";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[7] .operation_mode = "clrb_cntr";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[7] .output_mode = "reg_only";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[7] .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I18
flex10ke_lcell \vcnt_rtl_10|wysi_counter|counter_cell[2] (
// Equation(s):
// q_21 = DFFEA(((q_21 $ (\always1~0  & \vcnt_rtl_10|wysi_counter|counter_cell[1]~COUT ) & int_start1) # (int_start & !int_start1)) & VCC, GLOBAL(\fclk~dataout ), , , , , )
// \vcnt_rtl_10|wysi_counter|counter_cell[2]~COUT  = CARRY(q_21 & (\vcnt_rtl_10|wysi_counter|counter_cell[1]~COUT ))

        .dataa(\always1~0 ),
        .datab(vcc),
        .datac(int_start),
        .datad(int_start1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\vcnt_rtl_10|wysi_counter|counter_cell[1]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(q_21),
        .cout(\vcnt_rtl_10|wysi_counter|counter_cell[2]~COUT ),
        .cascout());
// synopsys translate_off
defparam \vcnt_rtl_10|wysi_counter|counter_cell[2] .cin_used = "true";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[2] .clock_enable_mode = "false";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[2] .lut_mask = "6ca0";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[2] .operation_mode = "clrb_cntr";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[2] .output_mode = "reg_only";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[2] .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I18
flex10ke_lcell \vcnt_rtl_10|wysi_counter|counter_cell[6] (
// Equation(s):
// q_6 = DFFEA(((q_6 $ (\always1~0  & \vcnt_rtl_10|wysi_counter|counter_cell[5]~COUT ) & int_start1) # (int_start & !int_start1)) & VCC, GLOBAL(\fclk~dataout ), , , , , )
// \vcnt_rtl_10|wysi_counter|counter_cell[6]~COUT  = CARRY(q_6 & (\vcnt_rtl_10|wysi_counter|counter_cell[5]~COUT ))

        .dataa(\always1~0 ),
        .datab(vcc),
        .datac(int_start),
        .datad(int_start1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\vcnt_rtl_10|wysi_counter|counter_cell[5]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(q_6),
        .cout(\vcnt_rtl_10|wysi_counter|counter_cell[6]~COUT ),
        .cascout());
// synopsys translate_off
defparam \vcnt_rtl_10|wysi_counter|counter_cell[6] .cin_used = "true";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[6] .clock_enable_mode = "false";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[6] .lut_mask = "6ca0";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[6] .operation_mode = "clrb_cntr";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[6] .output_mode = "reg_only";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[6] .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I18
flex10ke_lcell \vcnt_rtl_10|wysi_counter|counter_cell[1] (
// Equation(s):
// q_11 = DFFEA(((q_11 $ (\always1~0  & \vcnt_rtl_10|wysi_counter|counter_cell[0]~COUT ) & int_start1) # (int_start & !int_start1)) & VCC, GLOBAL(\fclk~dataout ), , , , , )
// \vcnt_rtl_10|wysi_counter|counter_cell[1]~COUT  = CARRY(q_11 & (\vcnt_rtl_10|wysi_counter|counter_cell[0]~COUT ))

        .dataa(\always1~0 ),
        .datab(vcc),
        .datac(int_start),
        .datad(int_start1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\vcnt_rtl_10|wysi_counter|counter_cell[0]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(q_11),
        .cout(\vcnt_rtl_10|wysi_counter|counter_cell[1]~COUT ),
        .cascout());
// synopsys translate_off
defparam \vcnt_rtl_10|wysi_counter|counter_cell[1] .cin_used = "true";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[1] .clock_enable_mode = "false";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[1] .lut_mask = "6ca0";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[1] .operation_mode = "clrb_cntr";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[1] .output_mode = "reg_only";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[1] .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I18
flex10ke_lcell \vcnt_rtl_10|wysi_counter|counter_cell[0] (
// Equation(s):
// q_01 = DFFEA(((\always1~0  $ q_01 & int_start1) # (int_start & !int_start1)) & VCC, GLOBAL(\fclk~dataout ), , , , , )
// \vcnt_rtl_10|wysi_counter|counter_cell[0]~COUT  = CARRY(q_01)

        .dataa(\always1~0 ),
        .datab(vcc),
        .datac(int_start),
        .datad(int_start1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(q_01),
        .cout(\vcnt_rtl_10|wysi_counter|counter_cell[0]~COUT ),
        .cascout());
// synopsys translate_off
defparam \vcnt_rtl_10|wysi_counter|counter_cell[0] .clock_enable_mode = "false";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[0] .lut_mask = "66aa";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[0] .operation_mode = "clrb_cntr";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[0] .output_mode = "reg_only";
defparam \vcnt_rtl_10|wysi_counter|counter_cell[0] .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H13
flex10ke_lcell \always1~0_I (
// Equation(s):
// \always1~0  = line_start & vpix

        .dataa(vcc),
        .datab(vcc),
        .datac(line_start),
        .datad(vpix),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always1~0 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always1~0_I .clock_enable_mode = "false";
defparam \always1~0_I .lut_mask = "f000";
defparam \always1~0_I .operation_mode = "normal";
defparam \always1~0_I .output_mode = "comb_only";
defparam \always1~0_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J4
flex10ke_lcell \scnt[0]~I (
// Equation(s):
// scnt[0] = DFFEA(!\Equal0~42  & !scnt[0] & !\always1~0 , GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(\Equal0~42 ),
        .datac(scnt[0]),
        .datad(\always1~0 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(scnt[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \scnt[0]~I .clock_enable_mode = "true";
defparam \scnt[0]~I .lut_mask = "0003";
defparam \scnt[0]~I .operation_mode = "normal";
defparam \scnt[0]~I .output_mode = "reg_only";
defparam \scnt[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J4
flex10ke_lcell \Equal0~42_I (
// Equation(s):
// \Equal0~42  = !scnt[0] & !scnt[1] & \Equal0~41 

        .dataa(vcc),
        .datab(scnt[0]),
        .datac(scnt[1]),
        .datad(\Equal0~41 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal0~42 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal0~42_I .clock_enable_mode = "false";
defparam \Equal0~42_I .lut_mask = "0300";
defparam \Equal0~42_I .operation_mode = "normal";
defparam \Equal0~42_I .output_mode = "comb_only";
defparam \Equal0~42_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J10
flex10ke_lcell \Add2|adder|result_node|cs_buffer[1]~I (
// Equation(s):
// \Add2|adder|result_node|cs_buffer [1] = scnt[0] $ scnt[1]
// \Add2|adder|result_node|cout [1] = CARRY(scnt[0] # scnt[1])

        .dataa(scnt[0]),
        .datab(scnt[1]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add2|adder|result_node|cs_buffer [1]),
        .regout(),
        .cout(\Add2|adder|result_node|cout [1]),
        .cascout());
// synopsys translate_off
defparam \Add2|adder|result_node|cs_buffer[1]~I .clock_enable_mode = "false";
defparam \Add2|adder|result_node|cs_buffer[1]~I .lut_mask = "66ee";
defparam \Add2|adder|result_node|cs_buffer[1]~I .operation_mode = "arithmetic";
defparam \Add2|adder|result_node|cs_buffer[1]~I .output_mode = "comb_only";
defparam \Add2|adder|result_node|cs_buffer[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_J4
flex10ke_lcell \scnt[1]~I (
// Equation(s):
// scnt[1] = DFFEA(\always1~0  # !\Equal0~42  & !\Add2|adder|result_node|cs_buffer [1], GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(\Equal0~42 ),
        .datac(\Add2|adder|result_node|cs_buffer [1]),
        .datad(\always1~0 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(scnt[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \scnt[1]~I .clock_enable_mode = "true";
defparam \scnt[1]~I .lut_mask = "ff03";
defparam \scnt[1]~I .operation_mode = "normal";
defparam \scnt[1]~I .output_mode = "reg_only";
defparam \scnt[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J10
flex10ke_lcell \Add2|adder|result_node|cs_buffer[2]~I (
// Equation(s):
// \Add2|adder|result_node|cs_buffer [2] = scnt[2] $ \Add2|adder|result_node|cout [1]
// \Add2|adder|result_node|cout [2] = CARRY(scnt[2] # \Add2|adder|result_node|cout [1])

        .dataa(vcc),
        .datab(scnt[2]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add2|adder|result_node|cout [1]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add2|adder|result_node|cs_buffer [2]),
        .regout(),
        .cout(\Add2|adder|result_node|cout [2]),
        .cascout());
// synopsys translate_off
defparam \Add2|adder|result_node|cs_buffer[2]~I .cin_used = "true";
defparam \Add2|adder|result_node|cs_buffer[2]~I .clock_enable_mode = "false";
defparam \Add2|adder|result_node|cs_buffer[2]~I .lut_mask = "3cfc";
defparam \Add2|adder|result_node|cs_buffer[2]~I .operation_mode = "arithmetic";
defparam \Add2|adder|result_node|cs_buffer[2]~I .output_mode = "comb_only";
defparam \Add2|adder|result_node|cs_buffer[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_J10
flex10ke_lcell \scnt[2]~I (
// Equation(s):
// scnt[2] = DFFEA(!\Add2|adder|result_node|cs_buffer [2] & !\Equal0~42  & !\always1~0 , GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(\Add2|adder|result_node|cs_buffer [2]),
        .datac(\Equal0~42 ),
        .datad(\always1~0 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(scnt[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \scnt[2]~I .clock_enable_mode = "true";
defparam \scnt[2]~I .lut_mask = "0003";
defparam \scnt[2]~I .operation_mode = "normal";
defparam \scnt[2]~I .output_mode = "reg_only";
defparam \scnt[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J10
flex10ke_lcell \Add2|adder|result_node|cs_buffer[3]~I (
// Equation(s):
// \Add2|adder|result_node|cs_buffer [3] = scnt[3] $ \Add2|adder|result_node|cout [2]
// \Add2|adder|result_node|cout [3] = CARRY(scnt[3] # \Add2|adder|result_node|cout [2])

        .dataa(vcc),
        .datab(scnt[3]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add2|adder|result_node|cout [2]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add2|adder|result_node|cs_buffer [3]),
        .regout(),
        .cout(\Add2|adder|result_node|cout [3]),
        .cascout());
// synopsys translate_off
defparam \Add2|adder|result_node|cs_buffer[3]~I .cin_used = "true";
defparam \Add2|adder|result_node|cs_buffer[3]~I .clock_enable_mode = "false";
defparam \Add2|adder|result_node|cs_buffer[3]~I .lut_mask = "3cfc";
defparam \Add2|adder|result_node|cs_buffer[3]~I .operation_mode = "arithmetic";
defparam \Add2|adder|result_node|cs_buffer[3]~I .output_mode = "comb_only";
defparam \Add2|adder|result_node|cs_buffer[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_J10
flex10ke_lcell \scnt[3]~I (
// Equation(s):
// scnt[3] = DFFEA(!\Add2|adder|result_node|cs_buffer [3] & !\Equal0~42  & !\always1~0 , GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(\Add2|adder|result_node|cs_buffer [3]),
        .datac(\Equal0~42 ),
        .datad(\always1~0 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(scnt[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \scnt[3]~I .clock_enable_mode = "true";
defparam \scnt[3]~I .lut_mask = "0003";
defparam \scnt[3]~I .operation_mode = "normal";
defparam \scnt[3]~I .output_mode = "reg_only";
defparam \scnt[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J10
flex10ke_lcell \Add2|adder|result_node|cs_buffer[4]~I (
// Equation(s):
// \Add2|adder|result_node|cs_buffer [4] = scnt[4] $ \Add2|adder|result_node|cout [3]
// \Add2|adder|result_node|cout [4] = CARRY(scnt[4] # \Add2|adder|result_node|cout [3])

        .dataa(vcc),
        .datab(scnt[4]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add2|adder|result_node|cout [3]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add2|adder|result_node|cs_buffer [4]),
        .regout(),
        .cout(\Add2|adder|result_node|cout [4]),
        .cascout());
// synopsys translate_off
defparam \Add2|adder|result_node|cs_buffer[4]~I .cin_used = "true";
defparam \Add2|adder|result_node|cs_buffer[4]~I .clock_enable_mode = "false";
defparam \Add2|adder|result_node|cs_buffer[4]~I .lut_mask = "3cfc";
defparam \Add2|adder|result_node|cs_buffer[4]~I .operation_mode = "arithmetic";
defparam \Add2|adder|result_node|cs_buffer[4]~I .output_mode = "comb_only";
defparam \Add2|adder|result_node|cs_buffer[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_J4
flex10ke_lcell \scnt[4]~I (
// Equation(s):
// scnt[4] = DFFEA(!\Equal0~42  & !\always1~0  & !\Add2|adder|result_node|cs_buffer [4], GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(\Equal0~42 ),
        .datac(\always1~0 ),
        .datad(\Add2|adder|result_node|cs_buffer [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(scnt[4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \scnt[4]~I .clock_enable_mode = "true";
defparam \scnt[4]~I .lut_mask = "0003";
defparam \scnt[4]~I .operation_mode = "normal";
defparam \scnt[4]~I .output_mode = "reg_only";
defparam \scnt[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J10
flex10ke_lcell \Add2|adder|unreg_res_node[5]~I (
// Equation(s):
// \Add2|adder|unreg_res_node [5] = \Add2|adder|result_node|cout [4] $ scnt[5]

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(scnt[5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add2|adder|result_node|cout [4]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add2|adder|unreg_res_node [5]),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Add2|adder|unreg_res_node[5]~I .cin_used = "true";
defparam \Add2|adder|unreg_res_node[5]~I .clock_enable_mode = "false";
defparam \Add2|adder|unreg_res_node[5]~I .lut_mask = "0ff0";
defparam \Add2|adder|unreg_res_node[5]~I .operation_mode = "normal";
defparam \Add2|adder|unreg_res_node[5]~I .output_mode = "comb_only";
defparam \Add2|adder|unreg_res_node[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J4
flex10ke_lcell \scnt[5]~I (
// Equation(s):
// scnt[5] = DFFEA(\always1~0  # !\Add2|adder|unreg_res_node [5] & !\Equal0~42 , GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(\Add2|adder|unreg_res_node [5]),
        .datac(\Equal0~42 ),
        .datad(\always1~0 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(scnt[5]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \scnt[5]~I .clock_enable_mode = "true";
defparam \scnt[5]~I .lut_mask = "ff03";
defparam \scnt[5]~I .operation_mode = "normal";
defparam \scnt[5]~I .output_mode = "reg_only";
defparam \scnt[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_J10
flex10ke_lcell \Equal0~41_I (
// Equation(s):
// \Equal0~41  = !scnt[2] & !scnt[3] & !scnt[4] & !scnt[5]

        .dataa(scnt[2]),
        .datab(scnt[3]),
        .datac(scnt[4]),
        .datad(scnt[5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal0~41 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal0~41_I .clock_enable_mode = "false";
defparam \Equal0~41_I .lut_mask = "0001";
defparam \Equal0~41_I .operation_mode = "normal";
defparam \Equal0~41_I .output_mode = "comb_only";
defparam \Equal0~41_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J4
flex10ke_lcell \wcnt_rtl_9|wysi_counter|counter_cell[3]~1_I (
// Equation(s):
// \wcnt_rtl_9|wysi_counter|counter_cell[3]~1  = scnt[1] # !cend # !\Equal0~41  # !scnt[0]

        .dataa(scnt[0]),
        .datab(\Equal0~41 ),
        .datac(cend),
        .datad(scnt[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\wcnt_rtl_9|wysi_counter|counter_cell[3]~1 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wcnt_rtl_9|wysi_counter|counter_cell[3]~1_I .clock_enable_mode = "false";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[3]~1_I .lut_mask = "ff7f";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[3]~1_I .operation_mode = "normal";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[3]~1_I .output_mode = "comb_only";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[3]~1_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I2
flex10ke_lcell \wcnt_rtl_9|wysi_counter|counter_cell[0] (
// Equation(s):
// \wcnt_rtl_9|wysi_counter|q [0] = DFFEA((cend $ \wcnt_rtl_9|wysi_counter|q [0]) & \wcnt_rtl_9|wysi_counter|counter_cell[3]~1 , GLOBAL(\fclk~dataout ), , , cend, , )
// \wcnt_rtl_9|wysi_counter|counter_cell[0]~COUT  = CARRY(\wcnt_rtl_9|wysi_counter|q [0])

        .dataa(cend),
        .datab(\wcnt_rtl_9|wysi_counter|counter_cell[3]~1 ),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\wcnt_rtl_9|wysi_counter|q [0]),
        .cout(\wcnt_rtl_9|wysi_counter|counter_cell[0]~COUT ),
        .cascout());
// synopsys translate_off
defparam \wcnt_rtl_9|wysi_counter|counter_cell[0] .clock_enable_mode = "true";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[0] .lut_mask = "66aa";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[0] .operation_mode = "clrb_cntr";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[0] .output_mode = "reg_only";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[0] .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I2
flex10ke_lcell \wcnt_rtl_9|wysi_counter|counter_cell[1] (
// Equation(s):
// \wcnt_rtl_9|wysi_counter|q [1] = DFFEA((\wcnt_rtl_9|wysi_counter|q [1] $ (cend & \wcnt_rtl_9|wysi_counter|counter_cell[0]~COUT )) & \wcnt_rtl_9|wysi_counter|counter_cell[3]~1 , GLOBAL(\fclk~dataout ), , , cend, , )
// \wcnt_rtl_9|wysi_counter|counter_cell[1]~COUT  = CARRY(\wcnt_rtl_9|wysi_counter|q [1] & (\wcnt_rtl_9|wysi_counter|counter_cell[0]~COUT ))

        .dataa(cend),
        .datab(\wcnt_rtl_9|wysi_counter|counter_cell[3]~1 ),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\wcnt_rtl_9|wysi_counter|counter_cell[0]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\wcnt_rtl_9|wysi_counter|q [1]),
        .cout(\wcnt_rtl_9|wysi_counter|counter_cell[1]~COUT ),
        .cascout());
// synopsys translate_off
defparam \wcnt_rtl_9|wysi_counter|counter_cell[1] .cin_used = "true";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[1] .clock_enable_mode = "true";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[1] .lut_mask = "6ca0";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[1] .operation_mode = "clrb_cntr";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[1] .output_mode = "reg_only";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[1] .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I2
flex10ke_lcell \wcnt_rtl_9|wysi_counter|counter_cell[2] (
// Equation(s):
// \wcnt_rtl_9|wysi_counter|q [2] = DFFEA((\wcnt_rtl_9|wysi_counter|q [2] $ (cend & \wcnt_rtl_9|wysi_counter|counter_cell[1]~COUT )) & \wcnt_rtl_9|wysi_counter|counter_cell[3]~1 , GLOBAL(\fclk~dataout ), , , cend, , )
// \wcnt_rtl_9|wysi_counter|counter_cell[2]~COUT  = CARRY(\wcnt_rtl_9|wysi_counter|q [2] & (\wcnt_rtl_9|wysi_counter|counter_cell[1]~COUT ))

        .dataa(cend),
        .datab(\wcnt_rtl_9|wysi_counter|counter_cell[3]~1 ),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\wcnt_rtl_9|wysi_counter|counter_cell[1]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\wcnt_rtl_9|wysi_counter|q [2]),
        .cout(\wcnt_rtl_9|wysi_counter|counter_cell[2]~COUT ),
        .cascout());
// synopsys translate_off
defparam \wcnt_rtl_9|wysi_counter|counter_cell[2] .cin_used = "true";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[2] .clock_enable_mode = "true";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[2] .lut_mask = "6ca0";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[2] .operation_mode = "clrb_cntr";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[2] .output_mode = "reg_only";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[2] .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I2
flex10ke_lcell \wcnt_rtl_9|wysi_counter|counter_cell[3] (
// Equation(s):
// \wcnt_rtl_9|wysi_counter|q [3] = DFFEA((\wcnt_rtl_9|wysi_counter|q [3] $ (cend & \wcnt_rtl_9|wysi_counter|counter_cell[2]~COUT )) & \wcnt_rtl_9|wysi_counter|counter_cell[3]~1 , GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(\wcnt_rtl_9|wysi_counter|counter_cell[3]~1 ),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\wcnt_rtl_9|wysi_counter|counter_cell[2]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\wcnt_rtl_9|wysi_counter|q [3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wcnt_rtl_9|wysi_counter|counter_cell[3] .cin_used = "true";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[3] .clock_enable_mode = "true";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[3] .lut_mask = "6c6c";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[3] .operation_mode = "clrb_cntr";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[3] .output_mode = "reg_only";
defparam \wcnt_rtl_9|wysi_counter|counter_cell[3] .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J4
flex10ke_lcell \go_start~I (
// Equation(s):
// go_start = scnt[1] # !\Equal0~41  # !cend # !scnt[0]

        .dataa(scnt[1]),
        .datab(scnt[0]),
        .datac(cend),
        .datad(\Equal0~41 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(go_start),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \go_start~I .clock_enable_mode = "false";
defparam \go_start~I .lut_mask = "bfff";
defparam \go_start~I .operation_mode = "normal";
defparam \go_start~I .output_mode = "comb_only";
defparam \go_start~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I14
flex10ke_lcell \fcnt_rtl_8|wysi_counter|counter_cell[0] (
// Equation(s):
// \fcnt_rtl_8|wysi_counter|counter_cell[0]~COUT  = CARRY()

        .dataa(\always4~0 ),
        .datab(go_start),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fcnt_rtl_8|wysi_counter|q [0]),
        .cout(\fcnt_rtl_8|wysi_counter|counter_cell[0]~COUT ),
        .cascout());
// synopsys translate_off
defparam \fcnt_rtl_8|wysi_counter|counter_cell[0] .clock_enable_mode = "false";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[0] .lut_mask = "66aa";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[0] .operation_mode = "clrb_cntr";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[0] .output_mode = "none";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[0] .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I14
flex10ke_lcell \fcnt_rtl_8|wysi_counter|counter_cell[1] (
// Equation(s):
// \fcnt_rtl_8|wysi_counter|counter_cell[1]~COUT  = CARRY( & (\fcnt_rtl_8|wysi_counter|counter_cell[0]~COUT ))

        .dataa(\always4~0 ),
        .datab(go_start),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\fcnt_rtl_8|wysi_counter|counter_cell[0]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fcnt_rtl_8|wysi_counter|q [1]),
        .cout(\fcnt_rtl_8|wysi_counter|counter_cell[1]~COUT ),
        .cascout());
// synopsys translate_off
defparam \fcnt_rtl_8|wysi_counter|counter_cell[1] .cin_used = "true";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[1] .clock_enable_mode = "false";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[1] .lut_mask = "6ca0";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[1] .operation_mode = "clrb_cntr";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[1] .output_mode = "none";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[1] .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I14
flex10ke_lcell \fcnt_rtl_8|wysi_counter|counter_cell[2] (
// Equation(s):
// \fcnt_rtl_8|wysi_counter|counter_cell[2]~COUT  = CARRY( & (\fcnt_rtl_8|wysi_counter|counter_cell[1]~COUT ))

        .dataa(\always4~0 ),
        .datab(go_start),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\fcnt_rtl_8|wysi_counter|counter_cell[1]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fcnt_rtl_8|wysi_counter|q [2]),
        .cout(\fcnt_rtl_8|wysi_counter|counter_cell[2]~COUT ),
        .cascout());
// synopsys translate_off
defparam \fcnt_rtl_8|wysi_counter|counter_cell[2] .cin_used = "true";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[2] .clock_enable_mode = "false";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[2] .lut_mask = "6ca0";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[2] .operation_mode = "clrb_cntr";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[2] .output_mode = "none";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[2] .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I14
flex10ke_lcell \fcnt_rtl_8|wysi_counter|counter_cell[3] (
// Equation(s):
// \fcnt_rtl_8|wysi_counter|counter_cell[3]~COUT  = CARRY( & (\fcnt_rtl_8|wysi_counter|counter_cell[2]~COUT ))

        .dataa(\always4~0 ),
        .datab(go_start),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\fcnt_rtl_8|wysi_counter|counter_cell[2]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fcnt_rtl_8|wysi_counter|q [3]),
        .cout(\fcnt_rtl_8|wysi_counter|counter_cell[3]~COUT ),
        .cascout());
// synopsys translate_off
defparam \fcnt_rtl_8|wysi_counter|counter_cell[3] .cin_used = "true";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[3] .clock_enable_mode = "false";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[3] .lut_mask = "6ca0";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[3] .operation_mode = "clrb_cntr";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[3] .output_mode = "none";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[3] .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I14
flex10ke_lcell \fcnt_rtl_8|wysi_counter|counter_cell[4] (
// Equation(s):
// \fcnt_rtl_8|wysi_counter|q [4] = DFFEA((\fcnt_rtl_8|wysi_counter|q [4] $ (\always4~0  & \fcnt_rtl_8|wysi_counter|counter_cell[3]~COUT )) & go_start, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\always4~0 ),
        .datab(go_start),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\fcnt_rtl_8|wysi_counter|counter_cell[3]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fcnt_rtl_8|wysi_counter|q [4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fcnt_rtl_8|wysi_counter|counter_cell[4] .cin_used = "true";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[4] .clock_enable_mode = "false";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[4] .lut_mask = "6c6c";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[4] .operation_mode = "clrb_cntr";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[4] .output_mode = "reg_only";
defparam \fcnt_rtl_8|wysi_counter|counter_cell[4] .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I2
flex10ke_lcell \go~68_I (
// Equation(s):
// \go~68  = !\fcnt_rtl_8|wysi_counter|q [4] # !\wcnt_rtl_9|wysi_counter|q [3] # !cend # !\wcnt_rtl_9|wysi_counter|q [0]

        .dataa(\wcnt_rtl_9|wysi_counter|q [0]),
        .datab(cend),
        .datac(\wcnt_rtl_9|wysi_counter|q [3]),
        .datad(\fcnt_rtl_8|wysi_counter|q [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\go~68 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \go~68_I .clock_enable_mode = "false";
defparam \go~68_I .lut_mask = "7fff";
defparam \go~68_I .operation_mode = "normal";
defparam \go~68_I .output_mode = "comb_only";
defparam \go~68_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I2
flex10ke_lcell \go~69_I (
// Equation(s):
// \go~69  = \go~68  # !\wcnt_rtl_9|wysi_counter|q [2] # !\wcnt_rtl_9|wysi_counter|q [1]

        .dataa(vcc),
        .datab(\wcnt_rtl_9|wysi_counter|q [1]),
        .datac(\wcnt_rtl_9|wysi_counter|q [2]),
        .datad(\go~68 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\go~69 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \go~69_I .clock_enable_mode = "false";
defparam \go~69_I .lut_mask = "ff3f";
defparam \go~69_I .operation_mode = "normal";
defparam \go~69_I .output_mode = "comb_only";
defparam \go~69_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G3
flex10ke_lcell \fbuf[3][7]~I (
// Equation(s):
// \fbuf[3][7]  = DFFEA(rddata_7, GLOBAL(\fclk~dataout ), , , \fbuf[3][14]~416 , , )

        .dataa(\fbuf[3][14]~416 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[3][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][7]~I .clock_enable_mode = "true";
defparam \fbuf[3][7]~I .lut_mask = "ff00";
defparam \fbuf[3][7]~I .operation_mode = "normal";
defparam \fbuf[3][7]~I .output_mode = "reg_only";
defparam \fbuf[3][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G3
flex10ke_lcell \shift[7][7]~I (
// Equation(s):
// \shift[7][7]  = DFFEA(\fbuf[3][7] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[3][7] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[7][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[7][7]~I .clock_enable_mode = "true";
defparam \shift[7][7]~I .lut_mask = "ff00";
defparam \shift[7][7]~I .operation_mode = "normal";
defparam \shift[7][7]~I .output_mode = "reg_only";
defparam \shift[7][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_I2
flex10ke_lcell \wordsync~31_I (
// Equation(s):
// \wordsync~31  = \wcnt_rtl_9|wysi_counter|q [0] & cend

        .dataa(vcc),
        .datab(vcc),
        .datac(\wcnt_rtl_9|wysi_counter|q [0]),
        .datad(cend),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\wordsync~31 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wordsync~31_I .clock_enable_mode = "false";
defparam \wordsync~31_I .lut_mask = "f000";
defparam \wordsync~31_I .operation_mode = "normal";
defparam \wordsync~31_I .output_mode = "comb_only";
defparam \wordsync~31_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I2
flex10ke_lcell \wordsync~I (
// Equation(s):
// wordsync = !\wcnt_rtl_9|wysi_counter|q [2] & !\wcnt_rtl_9|wysi_counter|q [3] & !\wcnt_rtl_9|wysi_counter|q [1] & \wordsync~31 

        .dataa(\wcnt_rtl_9|wysi_counter|q [2]),
        .datab(\wcnt_rtl_9|wysi_counter|q [3]),
        .datac(\wcnt_rtl_9|wysi_counter|q [1]),
        .datad(\wordsync~31 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(wordsync),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wordsync~I .clock_enable_mode = "false";
defparam \wordsync~I .lut_mask = "0100";
defparam \wordsync~I .operation_mode = "normal";
defparam \wordsync~I .output_mode = "comb_only";
defparam \wordsync~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G9
flex10ke_lcell \pixnumber_rtl_4|wysi_counter|counter_cell[3]~1_I (
// Equation(s):
// \pixnumber_rtl_4|wysi_counter|counter_cell[3]~1  = !cend # !wordsync

        .dataa(vcc),
        .datab(vcc),
        .datac(wordsync),
        .datad(cend),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\pixnumber_rtl_4|wysi_counter|counter_cell[3]~1 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[3]~1_I .clock_enable_mode = "false";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[3]~1_I .lut_mask = "0fff";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[3]~1_I .operation_mode = "normal";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[3]~1_I .output_mode = "comb_only";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[3]~1_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G9
flex10ke_lcell \pixnumber_rtl_4|wysi_counter|counter_cell[0] (
// Equation(s):
// \pixnumber_rtl_4|wysi_counter|q [0] = DFFEA((cend $ \pixnumber_rtl_4|wysi_counter|q [0]) & \pixnumber_rtl_4|wysi_counter|counter_cell[3]~1 , GLOBAL(\fclk~dataout ), , , cend, , )
// \pixnumber_rtl_4|wysi_counter|counter_cell[0]~COUT  = CARRY(\pixnumber_rtl_4|wysi_counter|q [0])

        .dataa(cend),
        .datab(\pixnumber_rtl_4|wysi_counter|counter_cell[3]~1 ),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pixnumber_rtl_4|wysi_counter|q [0]),
        .cout(\pixnumber_rtl_4|wysi_counter|counter_cell[0]~COUT ),
        .cascout());
// synopsys translate_off
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[0] .clock_enable_mode = "true";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[0] .lut_mask = "66aa";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[0] .operation_mode = "clrb_cntr";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[0] .output_mode = "reg_only";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[0] .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G9
flex10ke_lcell \pixnumber_rtl_4|wysi_counter|counter_cell[1] (
// Equation(s):
// \pixnumber_rtl_4|wysi_counter|q [1] = DFFEA((\pixnumber_rtl_4|wysi_counter|q [1] $ (cend & \pixnumber_rtl_4|wysi_counter|counter_cell[0]~COUT )) & \pixnumber_rtl_4|wysi_counter|counter_cell[3]~1 , GLOBAL(\fclk~dataout ), , , cend, , )
// \pixnumber_rtl_4|wysi_counter|counter_cell[1]~COUT  = CARRY(\pixnumber_rtl_4|wysi_counter|q [1] & (\pixnumber_rtl_4|wysi_counter|counter_cell[0]~COUT ))

        .dataa(cend),
        .datab(\pixnumber_rtl_4|wysi_counter|counter_cell[3]~1 ),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\pixnumber_rtl_4|wysi_counter|counter_cell[0]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pixnumber_rtl_4|wysi_counter|q [1]),
        .cout(\pixnumber_rtl_4|wysi_counter|counter_cell[1]~COUT ),
        .cascout());
// synopsys translate_off
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[1] .cin_used = "true";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[1] .clock_enable_mode = "true";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[1] .lut_mask = "6ca0";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[1] .operation_mode = "clrb_cntr";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[1] .output_mode = "reg_only";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[1] .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G9
flex10ke_lcell \pixnumber_rtl_4|wysi_counter|counter_cell[2] (
// Equation(s):
// \pixnumber_rtl_4|wysi_counter|q [2] = DFFEA((\pixnumber_rtl_4|wysi_counter|q [2] $ (cend & \pixnumber_rtl_4|wysi_counter|counter_cell[1]~COUT )) & \pixnumber_rtl_4|wysi_counter|counter_cell[3]~1 , GLOBAL(\fclk~dataout ), , , cend, , )
// \pixnumber_rtl_4|wysi_counter|counter_cell[2]~COUT  = CARRY(\pixnumber_rtl_4|wysi_counter|q [2] & (\pixnumber_rtl_4|wysi_counter|counter_cell[1]~COUT ))

        .dataa(cend),
        .datab(\pixnumber_rtl_4|wysi_counter|counter_cell[3]~1 ),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\pixnumber_rtl_4|wysi_counter|counter_cell[1]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pixnumber_rtl_4|wysi_counter|q [2]),
        .cout(\pixnumber_rtl_4|wysi_counter|counter_cell[2]~COUT ),
        .cascout());
// synopsys translate_off
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[2] .cin_used = "true";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[2] .clock_enable_mode = "true";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[2] .lut_mask = "6ca0";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[2] .operation_mode = "clrb_cntr";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[2] .output_mode = "reg_only";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[2] .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G3
flex10ke_lcell \fbuf[2][7]~I (
// Equation(s):
// \fbuf[2][7]  = DFFEA(rddata_7, GLOBAL(\fclk~dataout ), , , \fbuf[2][14]~413 , , )

        .dataa(\fbuf[2][14]~413 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[2][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][7]~I .clock_enable_mode = "true";
defparam \fbuf[2][7]~I .lut_mask = "ff00";
defparam \fbuf[2][7]~I .operation_mode = "normal";
defparam \fbuf[2][7]~I .output_mode = "reg_only";
defparam \fbuf[2][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G3
flex10ke_lcell \shift[5][7]~I (
// Equation(s):
// \shift[5][7]  = DFFEA(\fbuf[2][7] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[2][7] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[5][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[5][7]~I .clock_enable_mode = "true";
defparam \shift[5][7]~I .lut_mask = "ff00";
defparam \shift[5][7]~I .operation_mode = "normal";
defparam \shift[5][7]~I .output_mode = "reg_only";
defparam \shift[5][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G3
flex10ke_lcell \Mux10~28_I (
// Equation(s):
// \Mux10~28  = \pixnumber_rtl_4|wysi_counter|q [2] & (\shift[5][7]  # \pixnumber_rtl_4|wysi_counter|q [1]) # !\pixnumber_rtl_4|wysi_counter|q [2] & \shift[1][7]  & (!\pixnumber_rtl_4|wysi_counter|q [1])

        .dataa(\shift[1][7] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [2]),
        .datac(\shift[5][7] ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux10~28 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux10~28_I .clock_enable_mode = "false";
defparam \Mux10~28_I .lut_mask = "cce2";
defparam \Mux10~28_I .operation_mode = "normal";
defparam \Mux10~28_I .output_mode = "comb_only";
defparam \Mux10~28_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G3
flex10ke_lcell \fbuf[1][7]~I (
// Equation(s):
// \fbuf[1][7]  = DFFEA(rddata_7, GLOBAL(\fclk~dataout ), , , \fbuf[1][14]~414 , , )

        .dataa(\fbuf[1][14]~414 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[1][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][7]~I .clock_enable_mode = "true";
defparam \fbuf[1][7]~I .lut_mask = "ff00";
defparam \fbuf[1][7]~I .operation_mode = "normal";
defparam \fbuf[1][7]~I .output_mode = "reg_only";
defparam \fbuf[1][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G3
flex10ke_lcell \shift[3][7]~I (
// Equation(s):
// \shift[3][7]  = DFFEA(\fbuf[1][7] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[1][7] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[3][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[3][7]~I .clock_enable_mode = "true";
defparam \shift[3][7]~I .lut_mask = "ff00";
defparam \shift[3][7]~I .operation_mode = "normal";
defparam \shift[3][7]~I .output_mode = "reg_only";
defparam \shift[3][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G3
flex10ke_lcell \Mux10~29_I (
// Equation(s):
// \Mux10~29  = \Mux10~28  & (\shift[7][7]  # !\pixnumber_rtl_4|wysi_counter|q [1]) # !\Mux10~28  & (\pixnumber_rtl_4|wysi_counter|q [1] & \shift[3][7] )

        .dataa(\shift[7][7] ),
        .datab(\Mux10~28 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [1]),
        .datad(\shift[3][7] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux10~29 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux10~29_I .clock_enable_mode = "false";
defparam \Mux10~29_I .lut_mask = "bc8c";
defparam \Mux10~29_I .operation_mode = "normal";
defparam \Mux10~29_I .output_mode = "comb_only";
defparam \Mux10~29_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G14
flex10ke_lcell \fbuf[1][14]~I (
// Equation(s):
// \fbuf[1][14]  = DFFEA(rddata_14, GLOBAL(\fclk~dataout ), , , \fbuf[1][14]~414 , , )

        .dataa(\fbuf[1][14]~414 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[1][14] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][14]~I .clock_enable_mode = "true";
defparam \fbuf[1][14]~I .lut_mask = "ff00";
defparam \fbuf[1][14]~I .operation_mode = "normal";
defparam \fbuf[1][14]~I .output_mode = "reg_only";
defparam \fbuf[1][14]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G14
flex10ke_lcell \shift[2][6]~I (
// Equation(s):
// \shift[2][6]  = DFFEA(\fbuf[1][14] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[1][14] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[2][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[2][6]~I .clock_enable_mode = "true";
defparam \shift[2][6]~I .lut_mask = "ff00";
defparam \shift[2][6]~I .operation_mode = "normal";
defparam \shift[2][6]~I .output_mode = "reg_only";
defparam \shift[2][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G14
flex10ke_lcell \Mux10~25_I (
// Equation(s):
// \Mux10~25  = \pixnumber_rtl_4|wysi_counter|q [1] & (\shift[2][6]  # \pixnumber_rtl_4|wysi_counter|q [2]) # !\pixnumber_rtl_4|wysi_counter|q [1] & \shift[0][6]  & (!\pixnumber_rtl_4|wysi_counter|q [2])

        .dataa(\shift[0][6] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [1]),
        .datac(\shift[2][6] ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux10~25 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux10~25_I .clock_enable_mode = "false";
defparam \Mux10~25_I .lut_mask = "cce2";
defparam \Mux10~25_I .operation_mode = "normal";
defparam \Mux10~25_I .output_mode = "comb_only";
defparam \Mux10~25_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G15
flex10ke_lcell \fbuf[2][14]~I (
// Equation(s):
// \fbuf[2][14]  = DFFEA(rddata_14, GLOBAL(\fclk~dataout ), , , \fbuf[2][14]~413 , , )

        .dataa(\fbuf[2][14]~413 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[2][14] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][14]~I .clock_enable_mode = "true";
defparam \fbuf[2][14]~I .lut_mask = "ff00";
defparam \fbuf[2][14]~I .operation_mode = "normal";
defparam \fbuf[2][14]~I .output_mode = "reg_only";
defparam \fbuf[2][14]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G15
flex10ke_lcell \shift[4][6]~I (
// Equation(s):
// \shift[4][6]  = DFFEA(\fbuf[2][14] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[2][14] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[4][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[4][6]~I .clock_enable_mode = "true";
defparam \shift[4][6]~I .lut_mask = "ff00";
defparam \shift[4][6]~I .operation_mode = "normal";
defparam \shift[4][6]~I .output_mode = "reg_only";
defparam \shift[4][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G15
flex10ke_lcell \Mux10~26_I (
// Equation(s):
// \Mux10~26  = \Mux10~25  & (\shift[6][6]  # !\pixnumber_rtl_4|wysi_counter|q [2]) # !\Mux10~25  & (\pixnumber_rtl_4|wysi_counter|q [2] & \shift[4][6] )

        .dataa(\shift[6][6] ),
        .datab(\Mux10~25 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [2]),
        .datad(\shift[4][6] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux10~26 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux10~26_I .clock_enable_mode = "false";
defparam \Mux10~26_I .lut_mask = "bc8c";
defparam \Mux10~26_I .operation_mode = "normal";
defparam \Mux10~26_I .output_mode = "comb_only";
defparam \Mux10~26_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G9
flex10ke_lcell \pixnumber_rtl_4|wysi_counter|counter_cell[3] (
// Equation(s):
// \pixnumber_rtl_4|wysi_counter|q [3] = DFFEA((\pixnumber_rtl_4|wysi_counter|q [3] $ (cend & \pixnumber_rtl_4|wysi_counter|counter_cell[2]~COUT )) & \pixnumber_rtl_4|wysi_counter|counter_cell[3]~1 , GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(\pixnumber_rtl_4|wysi_counter|counter_cell[3]~1 ),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(\pixnumber_rtl_4|wysi_counter|counter_cell[2]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\pixnumber_rtl_4|wysi_counter|q [3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[3] .cin_used = "true";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[3] .clock_enable_mode = "true";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[3] .lut_mask = "6c6c";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[3] .operation_mode = "clrb_cntr";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[3] .output_mode = "reg_only";
defparam \pixnumber_rtl_4|wysi_counter|counter_cell[3] .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G14
flex10ke_lcell \fbuf[1][6]~I (
// Equation(s):
// \fbuf[1][6]  = DFFEA(rddata_6, GLOBAL(\fclk~dataout ), , , \fbuf[1][14]~414 , , )

        .dataa(\fbuf[1][14]~414 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[1][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][6]~I .clock_enable_mode = "true";
defparam \fbuf[1][6]~I .lut_mask = "ff00";
defparam \fbuf[1][6]~I .operation_mode = "normal";
defparam \fbuf[1][6]~I .output_mode = "reg_only";
defparam \fbuf[1][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G14
flex10ke_lcell \shift[3][6]~I (
// Equation(s):
// \shift[3][6]  = DFFEA(\fbuf[1][6] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[1][6] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[3][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[3][6]~I .clock_enable_mode = "true";
defparam \shift[3][6]~I .lut_mask = "ff00";
defparam \shift[3][6]~I .operation_mode = "normal";
defparam \shift[3][6]~I .output_mode = "reg_only";
defparam \shift[3][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G14
flex10ke_lcell \Mux10~23_I (
// Equation(s):
// \Mux10~23  = \pixnumber_rtl_4|wysi_counter|q [1] & (\shift[3][6]  # \pixnumber_rtl_4|wysi_counter|q [2]) # !\pixnumber_rtl_4|wysi_counter|q [1] & \shift[1][6]  & (!\pixnumber_rtl_4|wysi_counter|q [2])

        .dataa(\shift[1][6] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [1]),
        .datac(\shift[3][6] ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux10~23 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux10~23_I .clock_enable_mode = "false";
defparam \Mux10~23_I .lut_mask = "cce2";
defparam \Mux10~23_I .operation_mode = "normal";
defparam \Mux10~23_I .output_mode = "comb_only";
defparam \Mux10~23_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G15
flex10ke_lcell \fbuf[2][6]~I (
// Equation(s):
// \fbuf[2][6]  = DFFEA(rddata_6, GLOBAL(\fclk~dataout ), , , \fbuf[2][14]~413 , , )

        .dataa(\fbuf[2][14]~413 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[2][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][6]~I .clock_enable_mode = "true";
defparam \fbuf[2][6]~I .lut_mask = "ff00";
defparam \fbuf[2][6]~I .operation_mode = "normal";
defparam \fbuf[2][6]~I .output_mode = "reg_only";
defparam \fbuf[2][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G15
flex10ke_lcell \shift[5][6]~I (
// Equation(s):
// \shift[5][6]  = DFFEA(\fbuf[2][6] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[2][6] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[5][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[5][6]~I .clock_enable_mode = "true";
defparam \shift[5][6]~I .lut_mask = "ff00";
defparam \shift[5][6]~I .operation_mode = "normal";
defparam \shift[5][6]~I .output_mode = "reg_only";
defparam \shift[5][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G15
flex10ke_lcell \Mux10~24_I (
// Equation(s):
// \Mux10~24  = \Mux10~23  & (\shift[7][6]  # !\pixnumber_rtl_4|wysi_counter|q [2]) # !\Mux10~23  & (\pixnumber_rtl_4|wysi_counter|q [2] & \shift[5][6] )

        .dataa(\shift[7][6] ),
        .datab(\Mux10~23 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [2]),
        .datad(\shift[5][6] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux10~24 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux10~24_I .clock_enable_mode = "false";
defparam \Mux10~24_I .lut_mask = "bc8c";
defparam \Mux10~24_I .operation_mode = "normal";
defparam \Mux10~24_I .output_mode = "comb_only";
defparam \Mux10~24_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G15
flex10ke_lcell \Mux10~27_I (
// Equation(s):
// \Mux10~27  = \pixnumber_rtl_4|wysi_counter|q [3] & (\Mux10~24  # \pixnumber_rtl_4|wysi_counter|q [0]) # !\pixnumber_rtl_4|wysi_counter|q [3] & \Mux10~26  & (!\pixnumber_rtl_4|wysi_counter|q [0])

        .dataa(\Mux10~26 ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datac(\Mux10~24 ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux10~27 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux10~27_I .clock_enable_mode = "false";
defparam \Mux10~27_I .lut_mask = "cce2";
defparam \Mux10~27_I .operation_mode = "normal";
defparam \Mux10~27_I .output_mode = "comb_only";
defparam \Mux10~27_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G19
flex10ke_lcell \fbuf[3][15]~I (
// Equation(s):
// \fbuf[3][15]  = DFFEA(rddata_15, GLOBAL(\fclk~dataout ), , , \fbuf[3][14]~416 , , )

        .dataa(\fbuf[3][14]~416 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[3][15] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][15]~I .clock_enable_mode = "true";
defparam \fbuf[3][15]~I .lut_mask = "ff00";
defparam \fbuf[3][15]~I .operation_mode = "normal";
defparam \fbuf[3][15]~I .output_mode = "reg_only";
defparam \fbuf[3][15]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G19
flex10ke_lcell \shift[6][7]~I (
// Equation(s):
// \shift[6][7]  = DFFEA(\fbuf[3][15] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[3][15] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[6][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[6][7]~I .clock_enable_mode = "true";
defparam \shift[6][7]~I .lut_mask = "ff00";
defparam \shift[6][7]~I .operation_mode = "normal";
defparam \shift[6][7]~I .output_mode = "reg_only";
defparam \shift[6][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G21
flex10ke_lcell \fbuf[1][15]~I (
// Equation(s):
// \fbuf[1][15]  = DFFEA(rddata_15, GLOBAL(\fclk~dataout ), , , \fbuf[1][14]~414 , , )

        .dataa(\fbuf[1][14]~414 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[1][15] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][15]~I .clock_enable_mode = "true";
defparam \fbuf[1][15]~I .lut_mask = "ff00";
defparam \fbuf[1][15]~I .operation_mode = "normal";
defparam \fbuf[1][15]~I .output_mode = "reg_only";
defparam \fbuf[1][15]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G21
flex10ke_lcell \shift[2][7]~I (
// Equation(s):
// \shift[2][7]  = DFFEA(\fbuf[1][15] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[1][15] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[2][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[2][7]~I .clock_enable_mode = "true";
defparam \shift[2][7]~I .lut_mask = "ff00";
defparam \shift[2][7]~I .operation_mode = "normal";
defparam \shift[2][7]~I .output_mode = "reg_only";
defparam \shift[2][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G19
flex10ke_lcell \Mux10~21_I (
// Equation(s):
// \Mux10~21  = \pixnumber_rtl_4|wysi_counter|q [1] & (\shift[2][7]  # \pixnumber_rtl_4|wysi_counter|q [2]) # !\pixnumber_rtl_4|wysi_counter|q [1] & \shift[0][7]  & (!\pixnumber_rtl_4|wysi_counter|q [2])

        .dataa(\shift[0][7] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [1]),
        .datac(\shift[2][7] ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux10~21 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux10~21_I .clock_enable_mode = "false";
defparam \Mux10~21_I .lut_mask = "cce2";
defparam \Mux10~21_I .operation_mode = "normal";
defparam \Mux10~21_I .output_mode = "comb_only";
defparam \Mux10~21_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G19
flex10ke_lcell \fbuf[2][15]~I (
// Equation(s):
// \fbuf[2][15]  = DFFEA(rddata_15, GLOBAL(\fclk~dataout ), , , \fbuf[2][14]~413 , , )

        .dataa(\fbuf[2][14]~413 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[2][15] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][15]~I .clock_enable_mode = "true";
defparam \fbuf[2][15]~I .lut_mask = "ff00";
defparam \fbuf[2][15]~I .operation_mode = "normal";
defparam \fbuf[2][15]~I .output_mode = "reg_only";
defparam \fbuf[2][15]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G19
flex10ke_lcell \shift[4][7]~I (
// Equation(s):
// \shift[4][7]  = DFFEA(\fbuf[2][15] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[2][15] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[4][7] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[4][7]~I .clock_enable_mode = "true";
defparam \shift[4][7]~I .lut_mask = "ff00";
defparam \shift[4][7]~I .operation_mode = "normal";
defparam \shift[4][7]~I .output_mode = "reg_only";
defparam \shift[4][7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G19
flex10ke_lcell \Mux10~22_I (
// Equation(s):
// \Mux10~22  = \Mux10~21  & (\shift[6][7]  # !\pixnumber_rtl_4|wysi_counter|q [2]) # !\Mux10~21  & (\pixnumber_rtl_4|wysi_counter|q [2] & \shift[4][7] )

        .dataa(\shift[6][7] ),
        .datab(\Mux10~21 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [2]),
        .datad(\shift[4][7] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux10~22 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux10~22_I .clock_enable_mode = "false";
defparam \Mux10~22_I .lut_mask = "bc8c";
defparam \Mux10~22_I .operation_mode = "normal";
defparam \Mux10~22_I .output_mode = "comb_only";
defparam \Mux10~22_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G22
flex10ke_lcell \fbuf[3][4]~I (
// Equation(s):
// \fbuf[3][4]  = DFFEA(rddata_4, GLOBAL(\fclk~dataout ), , , \fbuf[3][14]~416 , , )

        .dataa(\fbuf[3][14]~416 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[3][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][4]~I .clock_enable_mode = "true";
defparam \fbuf[3][4]~I .lut_mask = "ff00";
defparam \fbuf[3][4]~I .operation_mode = "normal";
defparam \fbuf[3][4]~I .output_mode = "reg_only";
defparam \fbuf[3][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G22
flex10ke_lcell \shift[7][4]~I (
// Equation(s):
// \shift[7][4]  = DFFEA(\fbuf[3][4] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[3][4] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[7][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[7][4]~I .clock_enable_mode = "true";
defparam \shift[7][4]~I .lut_mask = "ff00";
defparam \shift[7][4]~I .operation_mode = "normal";
defparam \shift[7][4]~I .output_mode = "reg_only";
defparam \shift[7][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G22
flex10ke_lcell \fbuf[2][4]~I (
// Equation(s):
// \fbuf[2][4]  = DFFEA(rddata_4, GLOBAL(\fclk~dataout ), , , \fbuf[2][14]~413 , , )

        .dataa(\fbuf[2][14]~413 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[2][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][4]~I .clock_enable_mode = "true";
defparam \fbuf[2][4]~I .lut_mask = "ff00";
defparam \fbuf[2][4]~I .operation_mode = "normal";
defparam \fbuf[2][4]~I .output_mode = "reg_only";
defparam \fbuf[2][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G22
flex10ke_lcell \shift[5][4]~I (
// Equation(s):
// \shift[5][4]  = DFFEA(\fbuf[2][4] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[2][4] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[5][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[5][4]~I .clock_enable_mode = "true";
defparam \shift[5][4]~I .lut_mask = "ff00";
defparam \shift[5][4]~I .operation_mode = "normal";
defparam \shift[5][4]~I .output_mode = "reg_only";
defparam \shift[5][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G20
flex10ke_lcell \Mux15~28_I (
// Equation(s):
// \Mux15~28  = \pixnumber_rtl_4|wysi_counter|q [2] & (\shift[5][4]  # \pixnumber_rtl_4|wysi_counter|q [1]) # !\pixnumber_rtl_4|wysi_counter|q [2] & \shift[1][4]  & (!\pixnumber_rtl_4|wysi_counter|q [1])

        .dataa(\shift[1][4] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [2]),
        .datac(\shift[5][4] ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux15~28 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux15~28_I .clock_enable_mode = "false";
defparam \Mux15~28_I .lut_mask = "cce2";
defparam \Mux15~28_I .operation_mode = "normal";
defparam \Mux15~28_I .output_mode = "comb_only";
defparam \Mux15~28_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G22
flex10ke_lcell \fbuf[1][4]~I (
// Equation(s):
// \fbuf[1][4]  = DFFEA(rddata_4, GLOBAL(\fclk~dataout ), , , \fbuf[1][14]~414 , , )

        .dataa(\fbuf[1][14]~414 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[1][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][4]~I .clock_enable_mode = "true";
defparam \fbuf[1][4]~I .lut_mask = "ff00";
defparam \fbuf[1][4]~I .operation_mode = "normal";
defparam \fbuf[1][4]~I .output_mode = "reg_only";
defparam \fbuf[1][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G22
flex10ke_lcell \shift[3][4]~I (
// Equation(s):
// \shift[3][4]  = DFFEA(\fbuf[1][4] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[1][4] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[3][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[3][4]~I .clock_enable_mode = "true";
defparam \shift[3][4]~I .lut_mask = "ff00";
defparam \shift[3][4]~I .operation_mode = "normal";
defparam \shift[3][4]~I .output_mode = "reg_only";
defparam \shift[3][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G20
flex10ke_lcell \Mux15~29_I (
// Equation(s):
// \Mux15~29  = \Mux15~28  & (\shift[7][4]  # !\pixnumber_rtl_4|wysi_counter|q [1]) # !\Mux15~28  & (\pixnumber_rtl_4|wysi_counter|q [1] & \shift[3][4] )

        .dataa(\shift[7][4] ),
        .datab(\Mux15~28 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [1]),
        .datad(\shift[3][4] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux15~29 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux15~29_I .clock_enable_mode = "false";
defparam \Mux15~29_I .lut_mask = "bc8c";
defparam \Mux15~29_I .operation_mode = "normal";
defparam \Mux15~29_I .output_mode = "comb_only";
defparam \Mux15~29_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G1
flex10ke_lcell \fbuf[1][9]~I (
// Equation(s):
// \fbuf[1][9]  = DFFEA(rddata_9, GLOBAL(\fclk~dataout ), , , \fbuf[1][14]~414 , , )

        .dataa(\fbuf[1][14]~414 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_9),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[1][9] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][9]~I .clock_enable_mode = "true";
defparam \fbuf[1][9]~I .lut_mask = "ff00";
defparam \fbuf[1][9]~I .operation_mode = "normal";
defparam \fbuf[1][9]~I .output_mode = "reg_only";
defparam \fbuf[1][9]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G1
flex10ke_lcell \shift[2][1]~I (
// Equation(s):
// \shift[2][1]  = DFFEA(\fbuf[1][9] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[1][9] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[2][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[2][1]~I .clock_enable_mode = "true";
defparam \shift[2][1]~I .lut_mask = "ff00";
defparam \shift[2][1]~I .operation_mode = "normal";
defparam \shift[2][1]~I .output_mode = "reg_only";
defparam \shift[2][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G8
flex10ke_lcell \Mux15~25_I (
// Equation(s):
// \Mux15~25  = \pixnumber_rtl_4|wysi_counter|q [1] & (\shift[2][1]  # \pixnumber_rtl_4|wysi_counter|q [2]) # !\pixnumber_rtl_4|wysi_counter|q [1] & \shift[0][1]  & (!\pixnumber_rtl_4|wysi_counter|q [2])

        .dataa(\shift[0][1] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [1]),
        .datac(\shift[2][1] ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux15~25 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux15~25_I .clock_enable_mode = "false";
defparam \Mux15~25_I .lut_mask = "cce2";
defparam \Mux15~25_I .operation_mode = "normal";
defparam \Mux15~25_I .output_mode = "comb_only";
defparam \Mux15~25_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G8
flex10ke_lcell \fbuf[2][9]~I (
// Equation(s):
// \fbuf[2][9]  = DFFEA(rddata_9, GLOBAL(\fclk~dataout ), , , \fbuf[2][14]~413 , , )

        .dataa(\fbuf[2][14]~413 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_9),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[2][9] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][9]~I .clock_enable_mode = "true";
defparam \fbuf[2][9]~I .lut_mask = "ff00";
defparam \fbuf[2][9]~I .operation_mode = "normal";
defparam \fbuf[2][9]~I .output_mode = "reg_only";
defparam \fbuf[2][9]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G8
flex10ke_lcell \shift[4][1]~I (
// Equation(s):
// \shift[4][1]  = DFFEA(\fbuf[2][9] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[2][9] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[4][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[4][1]~I .clock_enable_mode = "true";
defparam \shift[4][1]~I .lut_mask = "ff00";
defparam \shift[4][1]~I .operation_mode = "normal";
defparam \shift[4][1]~I .output_mode = "reg_only";
defparam \shift[4][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G8
flex10ke_lcell \Mux15~26_I (
// Equation(s):
// \Mux15~26  = \Mux15~25  & (\shift[6][1]  # !\pixnumber_rtl_4|wysi_counter|q [2]) # !\Mux15~25  & (\pixnumber_rtl_4|wysi_counter|q [2] & \shift[4][1] )

        .dataa(\shift[6][1] ),
        .datab(\Mux15~25 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [2]),
        .datad(\shift[4][1] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux15~26 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux15~26_I .clock_enable_mode = "false";
defparam \Mux15~26_I .lut_mask = "bc8c";
defparam \Mux15~26_I .operation_mode = "normal";
defparam \Mux15~26_I .output_mode = "comb_only";
defparam \Mux15~26_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G23
flex10ke_lcell \fbuf[1][12]~I (
// Equation(s):
// \fbuf[1][12]  = DFFEA(rddata_12, GLOBAL(\fclk~dataout ), , , \fbuf[1][14]~414 , , )

        .dataa(\fbuf[1][14]~414 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_12),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[1][12] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][12]~I .clock_enable_mode = "true";
defparam \fbuf[1][12]~I .lut_mask = "ff00";
defparam \fbuf[1][12]~I .operation_mode = "normal";
defparam \fbuf[1][12]~I .output_mode = "reg_only";
defparam \fbuf[1][12]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G23
flex10ke_lcell \shift[2][4]~I (
// Equation(s):
// \shift[2][4]  = DFFEA(\fbuf[1][12] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[1][12] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[2][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[2][4]~I .clock_enable_mode = "true";
defparam \shift[2][4]~I .lut_mask = "ff00";
defparam \shift[2][4]~I .operation_mode = "normal";
defparam \shift[2][4]~I .output_mode = "reg_only";
defparam \shift[2][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G20
flex10ke_lcell \Mux15~23_I (
// Equation(s):
// \Mux15~23  = \pixnumber_rtl_4|wysi_counter|q [1] & (\shift[2][4]  # \pixnumber_rtl_4|wysi_counter|q [2]) # !\pixnumber_rtl_4|wysi_counter|q [1] & \shift[0][4]  & (!\pixnumber_rtl_4|wysi_counter|q [2])

        .dataa(\shift[0][4] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [1]),
        .datac(\shift[2][4] ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux15~23 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux15~23_I .clock_enable_mode = "false";
defparam \Mux15~23_I .lut_mask = "cce2";
defparam \Mux15~23_I .operation_mode = "normal";
defparam \Mux15~23_I .output_mode = "comb_only";
defparam \Mux15~23_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G23
flex10ke_lcell \fbuf[2][12]~I (
// Equation(s):
// \fbuf[2][12]  = DFFEA(rddata_12, GLOBAL(\fclk~dataout ), , , \fbuf[2][14]~413 , , )

        .dataa(\fbuf[2][14]~413 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_12),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[2][12] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][12]~I .clock_enable_mode = "true";
defparam \fbuf[2][12]~I .lut_mask = "ff00";
defparam \fbuf[2][12]~I .operation_mode = "normal";
defparam \fbuf[2][12]~I .output_mode = "reg_only";
defparam \fbuf[2][12]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G23
flex10ke_lcell \shift[4][4]~I (
// Equation(s):
// \shift[4][4]  = DFFEA(\fbuf[2][12] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[2][12] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[4][4] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[4][4]~I .clock_enable_mode = "true";
defparam \shift[4][4]~I .lut_mask = "ff00";
defparam \shift[4][4]~I .operation_mode = "normal";
defparam \shift[4][4]~I .output_mode = "reg_only";
defparam \shift[4][4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G20
flex10ke_lcell \Mux15~24_I (
// Equation(s):
// \Mux15~24  = \Mux15~23  & (\shift[6][4]  # !\pixnumber_rtl_4|wysi_counter|q [2]) # !\Mux15~23  & (\pixnumber_rtl_4|wysi_counter|q [2] & \shift[4][4] )

        .dataa(\shift[6][4] ),
        .datab(\Mux15~23 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [2]),
        .datad(\shift[4][4] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux15~24 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux15~24_I .clock_enable_mode = "false";
defparam \Mux15~24_I .lut_mask = "bc8c";
defparam \Mux15~24_I .operation_mode = "normal";
defparam \Mux15~24_I .output_mode = "comb_only";
defparam \Mux15~24_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G20
flex10ke_lcell \Mux15~27_I (
// Equation(s):
// \Mux15~27  = \pixnumber_rtl_4|wysi_counter|q [0] & (\Mux15~24  # \pixnumber_rtl_4|wysi_counter|q [3]) # !\pixnumber_rtl_4|wysi_counter|q [0] & \Mux15~26  & (!\pixnumber_rtl_4|wysi_counter|q [3])

        .dataa(\Mux15~26 ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [0]),
        .datac(\Mux15~24 ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux15~27 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux15~27_I .clock_enable_mode = "false";
defparam \Mux15~27_I .lut_mask = "cce2";
defparam \Mux15~27_I .operation_mode = "normal";
defparam \Mux15~27_I .output_mode = "comb_only";
defparam \Mux15~27_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G12
flex10ke_lcell \fbuf[3][1]~I (
// Equation(s):
// \fbuf[3][1]  = DFFEA(rddata_1, GLOBAL(\fclk~dataout ), , , \fbuf[3][14]~416 , , )

        .dataa(\fbuf[3][14]~416 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[3][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][1]~I .clock_enable_mode = "true";
defparam \fbuf[3][1]~I .lut_mask = "ff00";
defparam \fbuf[3][1]~I .operation_mode = "normal";
defparam \fbuf[3][1]~I .output_mode = "reg_only";
defparam \fbuf[3][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G12
flex10ke_lcell \shift[7][1]~I (
// Equation(s):
// \shift[7][1]  = DFFEA(\fbuf[3][1] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[3][1] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[7][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[7][1]~I .clock_enable_mode = "true";
defparam \shift[7][1]~I .lut_mask = "ff00";
defparam \shift[7][1]~I .operation_mode = "normal";
defparam \shift[7][1]~I .output_mode = "reg_only";
defparam \shift[7][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G1
flex10ke_lcell \fbuf[1][1]~I (
// Equation(s):
// \fbuf[1][1]  = DFFEA(rddata_1, GLOBAL(\fclk~dataout ), , , \fbuf[1][14]~414 , , )

        .dataa(\fbuf[1][14]~414 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[1][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][1]~I .clock_enable_mode = "true";
defparam \fbuf[1][1]~I .lut_mask = "ff00";
defparam \fbuf[1][1]~I .operation_mode = "normal";
defparam \fbuf[1][1]~I .output_mode = "reg_only";
defparam \fbuf[1][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G1
flex10ke_lcell \shift[3][1]~I (
// Equation(s):
// \shift[3][1]  = DFFEA(\fbuf[1][1] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[1][1] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[3][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[3][1]~I .clock_enable_mode = "true";
defparam \shift[3][1]~I .lut_mask = "ff00";
defparam \shift[3][1]~I .operation_mode = "normal";
defparam \shift[3][1]~I .output_mode = "reg_only";
defparam \shift[3][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G12
flex10ke_lcell \Mux15~21_I (
// Equation(s):
// \Mux15~21  = \pixnumber_rtl_4|wysi_counter|q [1] & (\shift[3][1]  # \pixnumber_rtl_4|wysi_counter|q [2]) # !\pixnumber_rtl_4|wysi_counter|q [1] & \shift[1][1]  & (!\pixnumber_rtl_4|wysi_counter|q [2])

        .dataa(\shift[1][1] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [1]),
        .datac(\shift[3][1] ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux15~21 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux15~21_I .clock_enable_mode = "false";
defparam \Mux15~21_I .lut_mask = "cce2";
defparam \Mux15~21_I .operation_mode = "normal";
defparam \Mux15~21_I .output_mode = "comb_only";
defparam \Mux15~21_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G12
flex10ke_lcell \fbuf[2][1]~I (
// Equation(s):
// \fbuf[2][1]  = DFFEA(rddata_1, GLOBAL(\fclk~dataout ), , , \fbuf[2][14]~413 , , )

        .dataa(\fbuf[2][14]~413 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[2][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][1]~I .clock_enable_mode = "true";
defparam \fbuf[2][1]~I .lut_mask = "ff00";
defparam \fbuf[2][1]~I .operation_mode = "normal";
defparam \fbuf[2][1]~I .output_mode = "reg_only";
defparam \fbuf[2][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G12
flex10ke_lcell \shift[5][1]~I (
// Equation(s):
// \shift[5][1]  = DFFEA(\fbuf[2][1] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[2][1] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[5][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[5][1]~I .clock_enable_mode = "true";
defparam \shift[5][1]~I .lut_mask = "ff00";
defparam \shift[5][1]~I .operation_mode = "normal";
defparam \shift[5][1]~I .output_mode = "reg_only";
defparam \shift[5][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G12
flex10ke_lcell \Mux15~22_I (
// Equation(s):
// \Mux15~22  = \Mux15~21  & (\shift[7][1]  # !\pixnumber_rtl_4|wysi_counter|q [2]) # !\Mux15~21  & (\pixnumber_rtl_4|wysi_counter|q [2] & \shift[5][1] )

        .dataa(\shift[7][1] ),
        .datab(\Mux15~21 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [2]),
        .datad(\shift[5][1] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux15~22 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux15~22_I .clock_enable_mode = "false";
defparam \Mux15~22_I .lut_mask = "bc8c";
defparam \Mux15~22_I .operation_mode = "normal";
defparam \Mux15~22_I .output_mode = "comb_only";
defparam \Mux15~22_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G8
flex10ke_lcell \fbuf[0][9]~I (
// Equation(s):
// \fbuf[0][9]  = DFFEA(rddata_9, GLOBAL(\fclk~dataout ), , , \fbuf[0][14]~415 , , )

        .dataa(\fbuf[0][14]~415 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_9),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[0][9] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][9]~I .clock_enable_mode = "true";
defparam \fbuf[0][9]~I .lut_mask = "ff00";
defparam \fbuf[0][9]~I .operation_mode = "normal";
defparam \fbuf[0][9]~I .output_mode = "reg_only";
defparam \fbuf[0][9]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G8
flex10ke_lcell \shift[0][1]~I (
// Equation(s):
// \shift[0][1]  = DFFEA(\fbuf[0][9] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[0][9] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[0][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[0][1]~I .clock_enable_mode = "true";
defparam \shift[0][1]~I .lut_mask = "ff00";
defparam \shift[0][1]~I .operation_mode = "normal";
defparam \shift[0][1]~I .output_mode = "reg_only";
defparam \shift[0][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G12
flex10ke_lcell \fbuf[0][1]~I (
// Equation(s):
// \fbuf[0][1]  = DFFEA(rddata_1, GLOBAL(\fclk~dataout ), , , \fbuf[0][14]~415 , , )

        .dataa(\fbuf[0][14]~415 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[0][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][1]~I .clock_enable_mode = "true";
defparam \fbuf[0][1]~I .lut_mask = "ff00";
defparam \fbuf[0][1]~I .operation_mode = "normal";
defparam \fbuf[0][1]~I .output_mode = "reg_only";
defparam \fbuf[0][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G12
flex10ke_lcell \shift[1][1]~I (
// Equation(s):
// \shift[1][1]  = DFFEA(\fbuf[0][1] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[0][1] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[1][1] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[1][1]~I .clock_enable_mode = "true";
defparam \shift[1][1]~I .lut_mask = "ff00";
defparam \shift[1][1]~I .operation_mode = "normal";
defparam \shift[1][1]~I .output_mode = "reg_only";
defparam \shift[1][1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G2
flex10ke_lcell \pixbyte~37_I (
// Equation(s):
// \pixbyte~37  = \pixnumber_rtl_4|wysi_counter|q [3] & (\shift[1][1] ) # !\pixnumber_rtl_4|wysi_counter|q [3] & \shift[0][1] 

        .dataa(vcc),
        .datab(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datac(\shift[0][1] ),
        .datad(\shift[1][1] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\pixbyte~37 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pixbyte~37_I .clock_enable_mode = "false";
defparam \pixbyte~37_I .lut_mask = "fc30";
defparam \pixbyte~37_I .operation_mode = "normal";
defparam \pixbyte~37_I .output_mode = "comb_only";
defparam \pixbyte~37_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G2
flex10ke_lcell \Mux8~13_I (
// Equation(s):
// \Mux8~13  = \pixnumber_rtl_4|wysi_counter|q [1] & (\pixbyte~37  # \pixnumber_rtl_4|wysi_counter|q [0]) # !\pixnumber_rtl_4|wysi_counter|q [1] & \pixbyte~38  & (!\pixnumber_rtl_4|wysi_counter|q [0])

        .dataa(\pixbyte~38 ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [1]),
        .datac(\pixbyte~37 ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux8~13 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux8~13_I .clock_enable_mode = "false";
defparam \Mux8~13_I .lut_mask = "cce2";
defparam \Mux8~13_I .operation_mode = "normal";
defparam \Mux8~13_I .output_mode = "comb_only";
defparam \Mux8~13_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G25
flex10ke_lcell \fbuf[0][10]~I (
// Equation(s):
// \fbuf[0][10]  = DFFEA(rddata_10, GLOBAL(\fclk~dataout ), , , \fbuf[0][14]~415 , , )

        .dataa(\fbuf[0][14]~415 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_10),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[0][10] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][10]~I .clock_enable_mode = "true";
defparam \fbuf[0][10]~I .lut_mask = "ff00";
defparam \fbuf[0][10]~I .operation_mode = "normal";
defparam \fbuf[0][10]~I .output_mode = "reg_only";
defparam \fbuf[0][10]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G7
flex10ke_lcell \shift[0][2]~I (
// Equation(s):
// \shift[0][2]  = DFFEA(\fbuf[0][10] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[0][10] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[0][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[0][2]~I .clock_enable_mode = "true";
defparam \shift[0][2]~I .lut_mask = "ff00";
defparam \shift[0][2]~I .operation_mode = "normal";
defparam \shift[0][2]~I .output_mode = "reg_only";
defparam \shift[0][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G13
flex10ke_lcell \fbuf[0][2]~I (
// Equation(s):
// \fbuf[0][2]  = DFFEA(rddata_2, GLOBAL(\fclk~dataout ), , , \fbuf[0][14]~415 , , )

        .dataa(\fbuf[0][14]~415 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[0][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][2]~I .clock_enable_mode = "true";
defparam \fbuf[0][2]~I .lut_mask = "ff00";
defparam \fbuf[0][2]~I .operation_mode = "normal";
defparam \fbuf[0][2]~I .output_mode = "reg_only";
defparam \fbuf[0][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G13
flex10ke_lcell \shift[1][2]~I (
// Equation(s):
// \shift[1][2]  = DFFEA(\fbuf[0][2] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[0][2] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[1][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[1][2]~I .clock_enable_mode = "true";
defparam \shift[1][2]~I .lut_mask = "ff00";
defparam \shift[1][2]~I .operation_mode = "normal";
defparam \shift[1][2]~I .output_mode = "reg_only";
defparam \shift[1][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G7
flex10ke_lcell \pixbyte~36_I (
// Equation(s):
// \pixbyte~36  = \pixnumber_rtl_4|wysi_counter|q [3] & (\shift[1][2] ) # !\pixnumber_rtl_4|wysi_counter|q [3] & \shift[0][2] 

        .dataa(vcc),
        .datab(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datac(\shift[0][2] ),
        .datad(\shift[1][2] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\pixbyte~36 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pixbyte~36_I .clock_enable_mode = "false";
defparam \pixbyte~36_I .lut_mask = "fc30";
defparam \pixbyte~36_I .operation_mode = "normal";
defparam \pixbyte~36_I .output_mode = "comb_only";
defparam \pixbyte~36_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G2
flex10ke_lcell \Mux8~14_I (
// Equation(s):
// \Mux8~14  = \Mux8~13  & (\pixbyte~39  # !\pixnumber_rtl_4|wysi_counter|q [0]) # !\Mux8~13  & (\pixnumber_rtl_4|wysi_counter|q [0] & \pixbyte~36 )

        .dataa(\pixbyte~39 ),
        .datab(\Mux8~13 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [0]),
        .datad(\pixbyte~36 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux8~14 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux8~14_I .clock_enable_mode = "false";
defparam \Mux8~14_I .lut_mask = "bc8c";
defparam \Mux8~14_I .operation_mode = "normal";
defparam \Mux8~14_I .output_mode = "comb_only";
defparam \Mux8~14_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G5
flex10ke_lcell \fbuf[0][13]~I (
// Equation(s):
// \fbuf[0][13]  = DFFEA(rddata_13, GLOBAL(\fclk~dataout ), , , \fbuf[0][14]~415 , , )

        .dataa(\fbuf[0][14]~415 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_13),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[0][13] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][13]~I .clock_enable_mode = "true";
defparam \fbuf[0][13]~I .lut_mask = "ff00";
defparam \fbuf[0][13]~I .operation_mode = "normal";
defparam \fbuf[0][13]~I .output_mode = "reg_only";
defparam \fbuf[0][13]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G5
flex10ke_lcell \shift[0][5]~I (
// Equation(s):
// \shift[0][5]  = DFFEA(\fbuf[0][13] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[0][13] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[0][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[0][5]~I .clock_enable_mode = "true";
defparam \shift[0][5]~I .lut_mask = "ff00";
defparam \shift[0][5]~I .operation_mode = "normal";
defparam \shift[0][5]~I .output_mode = "reg_only";
defparam \shift[0][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G13
flex10ke_lcell \fbuf[0][5]~I (
// Equation(s):
// \fbuf[0][5]  = DFFEA(rddata_5, GLOBAL(\fclk~dataout ), , , \fbuf[0][14]~415 , , )

        .dataa(\fbuf[0][14]~415 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[0][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][5]~I .clock_enable_mode = "true";
defparam \fbuf[0][5]~I .lut_mask = "ff00";
defparam \fbuf[0][5]~I .operation_mode = "normal";
defparam \fbuf[0][5]~I .output_mode = "reg_only";
defparam \fbuf[0][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G13
flex10ke_lcell \shift[1][5]~I (
// Equation(s):
// \shift[1][5]  = DFFEA(\fbuf[0][5] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[0][5] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[1][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[1][5]~I .clock_enable_mode = "true";
defparam \shift[1][5]~I .lut_mask = "ff00";
defparam \shift[1][5]~I .operation_mode = "normal";
defparam \shift[1][5]~I .output_mode = "reg_only";
defparam \shift[1][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G2
flex10ke_lcell \pixbyte~33_I (
// Equation(s):
// \pixbyte~33  = \pixnumber_rtl_4|wysi_counter|q [3] & (\shift[1][5] ) # !\pixnumber_rtl_4|wysi_counter|q [3] & \shift[0][5] 

        .dataa(vcc),
        .datab(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datac(\shift[0][5] ),
        .datad(\shift[1][5] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\pixbyte~33 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pixbyte~33_I .clock_enable_mode = "false";
defparam \pixbyte~33_I .lut_mask = "fc30";
defparam \pixbyte~33_I .operation_mode = "normal";
defparam \pixbyte~33_I .output_mode = "comb_only";
defparam \pixbyte~33_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G2
flex10ke_lcell \Mux8~11_I (
// Equation(s):
// \Mux8~11  = \pixnumber_rtl_4|wysi_counter|q [1] & (\pixbyte~33  # \pixnumber_rtl_4|wysi_counter|q [0]) # !\pixnumber_rtl_4|wysi_counter|q [1] & \pixbyte~34  & (!\pixnumber_rtl_4|wysi_counter|q [0])

        .dataa(\pixbyte~34 ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [1]),
        .datac(\pixbyte~33 ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux8~11 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux8~11_I .clock_enable_mode = "false";
defparam \Mux8~11_I .lut_mask = "cce2";
defparam \Mux8~11_I .operation_mode = "normal";
defparam \Mux8~11_I .output_mode = "comb_only";
defparam \Mux8~11_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G10
flex10ke_lcell \fbuf[0][14]~I (
// Equation(s):
// \fbuf[0][14]  = DFFEA(rddata_14, GLOBAL(\fclk~dataout ), , , \fbuf[0][14]~415 , , )

        .dataa(\fbuf[0][14]~415 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[0][14] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][14]~I .clock_enable_mode = "true";
defparam \fbuf[0][14]~I .lut_mask = "ff00";
defparam \fbuf[0][14]~I .operation_mode = "normal";
defparam \fbuf[0][14]~I .output_mode = "reg_only";
defparam \fbuf[0][14]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G10
flex10ke_lcell \shift[0][6]~I (
// Equation(s):
// \shift[0][6]  = DFFEA(\fbuf[0][14] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[0][14] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[0][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[0][6]~I .clock_enable_mode = "true";
defparam \shift[0][6]~I .lut_mask = "ff00";
defparam \shift[0][6]~I .operation_mode = "normal";
defparam \shift[0][6]~I .output_mode = "reg_only";
defparam \shift[0][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G10
flex10ke_lcell \fbuf[0][6]~I (
// Equation(s):
// \fbuf[0][6]  = DFFEA(rddata_6, GLOBAL(\fclk~dataout ), , , \fbuf[0][14]~415 , , )

        .dataa(\fbuf[0][14]~415 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[0][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][6]~I .clock_enable_mode = "true";
defparam \fbuf[0][6]~I .lut_mask = "ff00";
defparam \fbuf[0][6]~I .operation_mode = "normal";
defparam \fbuf[0][6]~I .output_mode = "reg_only";
defparam \fbuf[0][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G10
flex10ke_lcell \shift[1][6]~I (
// Equation(s):
// \shift[1][6]  = DFFEA(\fbuf[0][6] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[0][6] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[1][6] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[1][6]~I .clock_enable_mode = "true";
defparam \shift[1][6]~I .lut_mask = "ff00";
defparam \shift[1][6]~I .operation_mode = "normal";
defparam \shift[1][6]~I .output_mode = "reg_only";
defparam \shift[1][6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G14
flex10ke_lcell \pixbyte~32_I (
// Equation(s):
// \pixbyte~32  = \pixnumber_rtl_4|wysi_counter|q [3] & (\shift[1][6] ) # !\pixnumber_rtl_4|wysi_counter|q [3] & \shift[0][6] 

        .dataa(vcc),
        .datab(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datac(\shift[0][6] ),
        .datad(\shift[1][6] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\pixbyte~32 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pixbyte~32_I .clock_enable_mode = "false";
defparam \pixbyte~32_I .lut_mask = "fc30";
defparam \pixbyte~32_I .operation_mode = "normal";
defparam \pixbyte~32_I .output_mode = "comb_only";
defparam \pixbyte~32_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G2
flex10ke_lcell \Mux8~12_I (
// Equation(s):
// \Mux8~12  = \Mux8~11  & (\pixbyte~35  # !\pixnumber_rtl_4|wysi_counter|q [0]) # !\Mux8~11  & (\pixnumber_rtl_4|wysi_counter|q [0] & \pixbyte~32 )

        .dataa(\pixbyte~35 ),
        .datab(\Mux8~11 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [0]),
        .datad(\pixbyte~32 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux8~12 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux8~12_I .clock_enable_mode = "false";
defparam \Mux8~12_I .lut_mask = "bc8c";
defparam \Mux8~12_I .operation_mode = "normal";
defparam \Mux8~12_I .output_mode = "comb_only";
defparam \Mux8~12_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G2
flex10ke_lcell \zxcolor~1_I (
// Equation(s):
// \zxcolor~1  = \zxcolor~197  $ (\pixnumber_rtl_4|wysi_counter|q [2] & \Mux8~14  # !\pixnumber_rtl_4|wysi_counter|q [2] & (\Mux8~12 ))

        .dataa(\zxcolor~197 ),
        .datab(\Mux8~14 ),
        .datac(\Mux8~12 ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\zxcolor~1 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zxcolor~1_I .clock_enable_mode = "false";
defparam \zxcolor~1_I .lut_mask = "665a";
defparam \zxcolor~1_I .operation_mode = "normal";
defparam \zxcolor~1_I .output_mode = "comb_only";
defparam \zxcolor~1_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G1
flex10ke_lcell \zxcolor~198_I (
// Equation(s):
// \zxcolor~198  = \pixnumber_rtl_4|wysi_counter|q [3] & (\shift[3][4]  # \zxcolor~1 ) # !\pixnumber_rtl_4|wysi_counter|q [3] & \shift[2][4]  & (!\zxcolor~1 )

        .dataa(\shift[2][4] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datac(\shift[3][4] ),
        .datad(\zxcolor~1 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\zxcolor~198 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zxcolor~198_I .clock_enable_mode = "false";
defparam \zxcolor~198_I .lut_mask = "cce2";
defparam \zxcolor~198_I .operation_mode = "normal";
defparam \zxcolor~198_I .output_mode = "comb_only";
defparam \zxcolor~198_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G26
flex10ke_lcell \fbuf[3][5]~I (
// Equation(s):
// \fbuf[3][5]  = DFFEA(rddata_5, GLOBAL(\fclk~dataout ), , , \fbuf[3][14]~416 , , )

        .dataa(\fbuf[3][14]~416 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[3][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][5]~I .clock_enable_mode = "true";
defparam \fbuf[3][5]~I .lut_mask = "ff00";
defparam \fbuf[3][5]~I .operation_mode = "normal";
defparam \fbuf[3][5]~I .output_mode = "reg_only";
defparam \fbuf[3][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G26
flex10ke_lcell \shift[7][5]~I (
// Equation(s):
// \shift[7][5]  = DFFEA(\fbuf[3][5] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[3][5] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[7][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[7][5]~I .clock_enable_mode = "true";
defparam \shift[7][5]~I .lut_mask = "ff00";
defparam \shift[7][5]~I .operation_mode = "normal";
defparam \shift[7][5]~I .output_mode = "reg_only";
defparam \shift[7][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G28
flex10ke_lcell \fbuf[3][2]~I (
// Equation(s):
// \fbuf[3][2]  = DFFEA(rddata_2, GLOBAL(\fclk~dataout ), , , \fbuf[3][14]~416 , , )

        .dataa(\fbuf[3][14]~416 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[3][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][2]~I .clock_enable_mode = "true";
defparam \fbuf[3][2]~I .lut_mask = "ff00";
defparam \fbuf[3][2]~I .operation_mode = "normal";
defparam \fbuf[3][2]~I .output_mode = "reg_only";
defparam \fbuf[3][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G28
flex10ke_lcell \shift[7][2]~I (
// Equation(s):
// \shift[7][2]  = DFFEA(\fbuf[3][2] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[3][2] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[7][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[7][2]~I .clock_enable_mode = "true";
defparam \shift[7][2]~I .lut_mask = "ff00";
defparam \shift[7][2]~I .operation_mode = "normal";
defparam \shift[7][2]~I .output_mode = "reg_only";
defparam \shift[7][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G26
flex10ke_lcell \Mux14~28_I (
// Equation(s):
// \Mux14~28  = \pixnumber_rtl_4|wysi_counter|q [1] & (\shift[7][2]  # \pixnumber_rtl_4|wysi_counter|q [0]) # !\pixnumber_rtl_4|wysi_counter|q [1] & \shift[5][2]  & (!\pixnumber_rtl_4|wysi_counter|q [0])

        .dataa(\shift[5][2] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [1]),
        .datac(\shift[7][2] ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux14~28 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux14~28_I .clock_enable_mode = "false";
defparam \Mux14~28_I .lut_mask = "cce2";
defparam \Mux14~28_I .operation_mode = "normal";
defparam \Mux14~28_I .output_mode = "comb_only";
defparam \Mux14~28_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G26
flex10ke_lcell \fbuf[2][5]~I (
// Equation(s):
// \fbuf[2][5]  = DFFEA(rddata_5, GLOBAL(\fclk~dataout ), , , \fbuf[2][14]~413 , , )

        .dataa(\fbuf[2][14]~413 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[2][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][5]~I .clock_enable_mode = "true";
defparam \fbuf[2][5]~I .lut_mask = "ff00";
defparam \fbuf[2][5]~I .operation_mode = "normal";
defparam \fbuf[2][5]~I .output_mode = "reg_only";
defparam \fbuf[2][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G26
flex10ke_lcell \shift[5][5]~I (
// Equation(s):
// \shift[5][5]  = DFFEA(\fbuf[2][5] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[2][5] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[5][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[5][5]~I .clock_enable_mode = "true";
defparam \shift[5][5]~I .lut_mask = "ff00";
defparam \shift[5][5]~I .operation_mode = "normal";
defparam \shift[5][5]~I .output_mode = "reg_only";
defparam \shift[5][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G26
flex10ke_lcell \Mux14~29_I (
// Equation(s):
// \Mux14~29  = \Mux14~28  & (\shift[7][5]  # !\pixnumber_rtl_4|wysi_counter|q [0]) # !\Mux14~28  & (\pixnumber_rtl_4|wysi_counter|q [0] & \shift[5][5] )

        .dataa(\shift[7][5] ),
        .datab(\Mux14~28 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [0]),
        .datad(\shift[5][5] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux14~29 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux14~29_I .clock_enable_mode = "false";
defparam \Mux14~29_I .lut_mask = "bc8c";
defparam \Mux14~29_I .operation_mode = "normal";
defparam \Mux14~29_I .output_mode = "comb_only";
defparam \Mux14~29_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G7
flex10ke_lcell \Mux14~25_I (
// Equation(s):
// \Mux14~25  = \pixnumber_rtl_4|wysi_counter|q [0] & (\shift[0][5]  # \pixnumber_rtl_4|wysi_counter|q [1]) # !\pixnumber_rtl_4|wysi_counter|q [0] & \shift[0][2]  & (!\pixnumber_rtl_4|wysi_counter|q [1])

        .dataa(\shift[0][2] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [0]),
        .datac(\shift[0][5] ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux14~25 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux14~25_I .clock_enable_mode = "false";
defparam \Mux14~25_I .lut_mask = "cce2";
defparam \Mux14~25_I .operation_mode = "normal";
defparam \Mux14~25_I .output_mode = "comb_only";
defparam \Mux14~25_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G25
flex10ke_lcell \fbuf[1][10]~I (
// Equation(s):
// \fbuf[1][10]  = DFFEA(rddata_10, GLOBAL(\fclk~dataout ), , , \fbuf[1][14]~414 , , )

        .dataa(\fbuf[1][14]~414 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_10),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[1][10] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][10]~I .clock_enable_mode = "true";
defparam \fbuf[1][10]~I .lut_mask = "ff00";
defparam \fbuf[1][10]~I .operation_mode = "normal";
defparam \fbuf[1][10]~I .output_mode = "reg_only";
defparam \fbuf[1][10]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G25
flex10ke_lcell \shift[2][2]~I (
// Equation(s):
// \shift[2][2]  = DFFEA(\fbuf[1][10] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[1][10] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[2][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[2][2]~I .clock_enable_mode = "true";
defparam \shift[2][2]~I .lut_mask = "ff00";
defparam \shift[2][2]~I .operation_mode = "normal";
defparam \shift[2][2]~I .output_mode = "reg_only";
defparam \shift[2][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G7
flex10ke_lcell \Mux14~26_I (
// Equation(s):
// \Mux14~26  = \Mux14~25  & (\shift[2][5]  # !\pixnumber_rtl_4|wysi_counter|q [1]) # !\Mux14~25  & (\pixnumber_rtl_4|wysi_counter|q [1] & \shift[2][2] )

        .dataa(\shift[2][5] ),
        .datab(\Mux14~25 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [1]),
        .datad(\shift[2][2] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux14~26 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux14~26_I .clock_enable_mode = "false";
defparam \Mux14~26_I .lut_mask = "bc8c";
defparam \Mux14~26_I .operation_mode = "normal";
defparam \Mux14~26_I .output_mode = "comb_only";
defparam \Mux14~26_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G18
flex10ke_lcell \fbuf[2][13]~I (
// Equation(s):
// \fbuf[2][13]  = DFFEA(rddata_13, GLOBAL(\fclk~dataout ), , , \fbuf[2][14]~413 , , )

        .dataa(\fbuf[2][14]~413 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_13),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[2][13] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][13]~I .clock_enable_mode = "true";
defparam \fbuf[2][13]~I .lut_mask = "ff00";
defparam \fbuf[2][13]~I .operation_mode = "normal";
defparam \fbuf[2][13]~I .output_mode = "reg_only";
defparam \fbuf[2][13]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G18
flex10ke_lcell \shift[4][5]~I (
// Equation(s):
// \shift[4][5]  = DFFEA(\fbuf[2][13] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[2][13] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[4][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[4][5]~I .clock_enable_mode = "true";
defparam \shift[4][5]~I .lut_mask = "ff00";
defparam \shift[4][5]~I .operation_mode = "normal";
defparam \shift[4][5]~I .output_mode = "reg_only";
defparam \shift[4][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G18
flex10ke_lcell \Mux14~23_I (
// Equation(s):
// \Mux14~23  = \pixnumber_rtl_4|wysi_counter|q [0] & (\shift[4][5]  # \pixnumber_rtl_4|wysi_counter|q [1]) # !\pixnumber_rtl_4|wysi_counter|q [0] & \shift[4][2]  & (!\pixnumber_rtl_4|wysi_counter|q [1])

        .dataa(\shift[4][2] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [0]),
        .datac(\shift[4][5] ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux14~23 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux14~23_I .clock_enable_mode = "false";
defparam \Mux14~23_I .lut_mask = "cce2";
defparam \Mux14~23_I .operation_mode = "normal";
defparam \Mux14~23_I .output_mode = "comb_only";
defparam \Mux14~23_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G18
flex10ke_lcell \fbuf[3][10]~I (
// Equation(s):
// \fbuf[3][10]  = DFFEA(rddata_10, GLOBAL(\fclk~dataout ), , , \fbuf[3][14]~416 , , )

        .dataa(\fbuf[3][14]~416 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_10),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[3][10] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][10]~I .clock_enable_mode = "true";
defparam \fbuf[3][10]~I .lut_mask = "ff00";
defparam \fbuf[3][10]~I .operation_mode = "normal";
defparam \fbuf[3][10]~I .output_mode = "reg_only";
defparam \fbuf[3][10]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G18
flex10ke_lcell \shift[6][2]~I (
// Equation(s):
// \shift[6][2]  = DFFEA(\fbuf[3][10] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[3][10] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[6][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[6][2]~I .clock_enable_mode = "true";
defparam \shift[6][2]~I .lut_mask = "ff00";
defparam \shift[6][2]~I .operation_mode = "normal";
defparam \shift[6][2]~I .output_mode = "reg_only";
defparam \shift[6][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G18
flex10ke_lcell \Mux14~24_I (
// Equation(s):
// \Mux14~24  = \Mux14~23  & (\shift[6][5]  # !\pixnumber_rtl_4|wysi_counter|q [1]) # !\Mux14~23  & (\pixnumber_rtl_4|wysi_counter|q [1] & \shift[6][2] )

        .dataa(\shift[6][5] ),
        .datab(\Mux14~23 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [1]),
        .datad(\shift[6][2] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux14~24 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux14~24_I .clock_enable_mode = "false";
defparam \Mux14~24_I .lut_mask = "bc8c";
defparam \Mux14~24_I .operation_mode = "normal";
defparam \Mux14~24_I .output_mode = "comb_only";
defparam \Mux14~24_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G7
flex10ke_lcell \Mux14~27_I (
// Equation(s):
// \Mux14~27  = \pixnumber_rtl_4|wysi_counter|q [2] & (\Mux14~24  # \pixnumber_rtl_4|wysi_counter|q [3]) # !\pixnumber_rtl_4|wysi_counter|q [2] & \Mux14~26  & (!\pixnumber_rtl_4|wysi_counter|q [3])

        .dataa(\Mux14~26 ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [2]),
        .datac(\Mux14~24 ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux14~27 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux14~27_I .clock_enable_mode = "false";
defparam \Mux14~27_I .lut_mask = "cce2";
defparam \Mux14~27_I .operation_mode = "normal";
defparam \Mux14~27_I .output_mode = "comb_only";
defparam \Mux14~27_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G13
flex10ke_lcell \fbuf[1][5]~I (
// Equation(s):
// \fbuf[1][5]  = DFFEA(rddata_5, GLOBAL(\fclk~dataout ), , , \fbuf[1][14]~414 , , )

        .dataa(\fbuf[1][14]~414 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[1][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][5]~I .clock_enable_mode = "true";
defparam \fbuf[1][5]~I .lut_mask = "ff00";
defparam \fbuf[1][5]~I .operation_mode = "normal";
defparam \fbuf[1][5]~I .output_mode = "reg_only";
defparam \fbuf[1][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G13
flex10ke_lcell \shift[3][5]~I (
// Equation(s):
// \shift[3][5]  = DFFEA(\fbuf[1][5] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[1][5] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[3][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[3][5]~I .clock_enable_mode = "true";
defparam \shift[3][5]~I .lut_mask = "ff00";
defparam \shift[3][5]~I .operation_mode = "normal";
defparam \shift[3][5]~I .output_mode = "reg_only";
defparam \shift[3][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G7
flex10ke_lcell \Mux14~21_I (
// Equation(s):
// \Mux14~21  = \pixnumber_rtl_4|wysi_counter|q [0] & (\shift[1][5]  # \pixnumber_rtl_4|wysi_counter|q [1]) # !\pixnumber_rtl_4|wysi_counter|q [0] & \shift[1][2]  & (!\pixnumber_rtl_4|wysi_counter|q [1])

        .dataa(\shift[1][2] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [0]),
        .datac(\shift[1][5] ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux14~21 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux14~21_I .clock_enable_mode = "false";
defparam \Mux14~21_I .lut_mask = "cce2";
defparam \Mux14~21_I .operation_mode = "normal";
defparam \Mux14~21_I .output_mode = "comb_only";
defparam \Mux14~21_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G13
flex10ke_lcell \fbuf[1][2]~I (
// Equation(s):
// \fbuf[1][2]  = DFFEA(rddata_2, GLOBAL(\fclk~dataout ), , , \fbuf[1][14]~414 , , )

        .dataa(\fbuf[1][14]~414 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[1][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][2]~I .clock_enable_mode = "true";
defparam \fbuf[1][2]~I .lut_mask = "ff00";
defparam \fbuf[1][2]~I .operation_mode = "normal";
defparam \fbuf[1][2]~I .output_mode = "reg_only";
defparam \fbuf[1][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G13
flex10ke_lcell \shift[3][2]~I (
// Equation(s):
// \shift[3][2]  = DFFEA(\fbuf[1][2] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[1][2] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[3][2] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[3][2]~I .clock_enable_mode = "true";
defparam \shift[3][2]~I .lut_mask = "ff00";
defparam \shift[3][2]~I .operation_mode = "normal";
defparam \shift[3][2]~I .output_mode = "reg_only";
defparam \shift[3][2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G7
flex10ke_lcell \Mux14~22_I (
// Equation(s):
// \Mux14~22  = \Mux14~21  & (\shift[3][5]  # !\pixnumber_rtl_4|wysi_counter|q [1]) # !\Mux14~21  & (\pixnumber_rtl_4|wysi_counter|q [1] & \shift[3][2] )

        .dataa(\shift[3][5] ),
        .datab(\Mux14~21 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [1]),
        .datad(\shift[3][2] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux14~22 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux14~22_I .clock_enable_mode = "false";
defparam \Mux14~22_I .lut_mask = "bc8c";
defparam \Mux14~22_I .operation_mode = "normal";
defparam \Mux14~22_I .output_mode = "comb_only";
defparam \Mux14~22_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G5
flex10ke_lcell \fbuf[1][13]~I (
// Equation(s):
// \fbuf[1][13]  = DFFEA(rddata_13, GLOBAL(\fclk~dataout ), , , \fbuf[1][14]~414 , , )

        .dataa(\fbuf[1][14]~414 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_13),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[1][13] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][13]~I .clock_enable_mode = "true";
defparam \fbuf[1][13]~I .lut_mask = "ff00";
defparam \fbuf[1][13]~I .operation_mode = "normal";
defparam \fbuf[1][13]~I .output_mode = "reg_only";
defparam \fbuf[1][13]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G5
flex10ke_lcell \shift[2][5]~I (
// Equation(s):
// \shift[2][5]  = DFFEA(\fbuf[1][13] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[1][13] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[2][5] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[2][5]~I .clock_enable_mode = "true";
defparam \shift[2][5]~I .lut_mask = "ff00";
defparam \shift[2][5]~I .operation_mode = "normal";
defparam \shift[2][5]~I .output_mode = "reg_only";
defparam \shift[2][5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_F4
flex10ke_lcell \zxcolor~201_I (
// Equation(s):
// \zxcolor~201  = \pixnumber_rtl_4|wysi_counter|q [3] & (\shift[3][5]  # \zxcolor~1 ) # !\pixnumber_rtl_4|wysi_counter|q [3] & \shift[2][5]  & (!\zxcolor~1 )

        .dataa(\shift[2][5] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datac(\shift[3][5] ),
        .datad(\zxcolor~1 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\zxcolor~201 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zxcolor~201_I .clock_enable_mode = "false";
defparam \zxcolor~201_I .lut_mask = "cce2";
defparam \zxcolor~201_I .operation_mode = "normal";
defparam \zxcolor~201_I .output_mode = "comb_only";
defparam \zxcolor~201_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_F17
flex10ke_lcell \fbuf[3][3]~I (
// Equation(s):
// \fbuf[3][3]  = DFFEA(rddata_3, GLOBAL(\fclk~dataout ), , , \fbuf[3][14]~416 , , )

        .dataa(\fbuf[3][14]~416 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[3][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][3]~I .clock_enable_mode = "true";
defparam \fbuf[3][3]~I .lut_mask = "ff00";
defparam \fbuf[3][3]~I .operation_mode = "normal";
defparam \fbuf[3][3]~I .output_mode = "reg_only";
defparam \fbuf[3][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_F17
flex10ke_lcell \shift[7][3]~I (
// Equation(s):
// \shift[7][3]  = DFFEA(\fbuf[3][3] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[3][3] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[7][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[7][3]~I .clock_enable_mode = "true";
defparam \shift[7][3]~I .lut_mask = "ff00";
defparam \shift[7][3]~I .operation_mode = "normal";
defparam \shift[7][3]~I .output_mode = "reg_only";
defparam \shift[7][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_F17
flex10ke_lcell \fbuf[1][3]~I (
// Equation(s):
// \fbuf[1][3]  = DFFEA(rddata_3, GLOBAL(\fclk~dataout ), , , \fbuf[1][14]~414 , , )

        .dataa(\fbuf[1][14]~414 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[1][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][3]~I .clock_enable_mode = "true";
defparam \fbuf[1][3]~I .lut_mask = "ff00";
defparam \fbuf[1][3]~I .operation_mode = "normal";
defparam \fbuf[1][3]~I .output_mode = "reg_only";
defparam \fbuf[1][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_F17
flex10ke_lcell \shift[3][3]~I (
// Equation(s):
// \shift[3][3]  = DFFEA(\fbuf[1][3] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[1][3] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[3][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[3][3]~I .clock_enable_mode = "true";
defparam \shift[3][3]~I .lut_mask = "ff00";
defparam \shift[3][3]~I .operation_mode = "normal";
defparam \shift[3][3]~I .output_mode = "reg_only";
defparam \shift[3][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F17
flex10ke_lcell \Mux16~28_I (
// Equation(s):
// \Mux16~28  = \pixnumber_rtl_4|wysi_counter|q [0] & (\shift[3][3]  # \pixnumber_rtl_4|wysi_counter|q [2]) # !\pixnumber_rtl_4|wysi_counter|q [0] & \shift[3][0]  & (!\pixnumber_rtl_4|wysi_counter|q [2])

        .dataa(\shift[3][0] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [0]),
        .datac(\shift[3][3] ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux16~28 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux16~28_I .clock_enable_mode = "false";
defparam \Mux16~28_I .lut_mask = "cce2";
defparam \Mux16~28_I .operation_mode = "normal";
defparam \Mux16~28_I .output_mode = "comb_only";
defparam \Mux16~28_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_F17
flex10ke_lcell \fbuf[3][0]~I (
// Equation(s):
// \fbuf[3][0]  = DFFEA(rddata_0, GLOBAL(\fclk~dataout ), , , \fbuf[3][14]~416 , , )

        .dataa(\fbuf[3][14]~416 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[3][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][0]~I .clock_enable_mode = "true";
defparam \fbuf[3][0]~I .lut_mask = "ff00";
defparam \fbuf[3][0]~I .operation_mode = "normal";
defparam \fbuf[3][0]~I .output_mode = "reg_only";
defparam \fbuf[3][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F17
flex10ke_lcell \shift[7][0]~I (
// Equation(s):
// \shift[7][0]  = DFFEA(\fbuf[3][0] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[3][0] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[7][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[7][0]~I .clock_enable_mode = "true";
defparam \shift[7][0]~I .lut_mask = "ff00";
defparam \shift[7][0]~I .operation_mode = "normal";
defparam \shift[7][0]~I .output_mode = "reg_only";
defparam \shift[7][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F17
flex10ke_lcell \Mux16~29_I (
// Equation(s):
// \Mux16~29  = \Mux16~28  & (\shift[7][3]  # !\pixnumber_rtl_4|wysi_counter|q [2]) # !\Mux16~28  & (\pixnumber_rtl_4|wysi_counter|q [2] & \shift[7][0] )

        .dataa(\shift[7][3] ),
        .datab(\Mux16~28 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [2]),
        .datad(\shift[7][0] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux16~29 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux16~29_I .clock_enable_mode = "false";
defparam \Mux16~29_I .lut_mask = "bc8c";
defparam \Mux16~29_I .operation_mode = "normal";
defparam \Mux16~29_I .output_mode = "comb_only";
defparam \Mux16~29_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G6
flex10ke_lcell \fbuf[2][8]~I (
// Equation(s):
// \fbuf[2][8]  = DFFEA(rddata_8, GLOBAL(\fclk~dataout ), , , \fbuf[2][14]~413 , , )

        .dataa(\fbuf[2][14]~413 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_8),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[2][8] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][8]~I .clock_enable_mode = "true";
defparam \fbuf[2][8]~I .lut_mask = "ff00";
defparam \fbuf[2][8]~I .operation_mode = "normal";
defparam \fbuf[2][8]~I .output_mode = "reg_only";
defparam \fbuf[2][8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G6
flex10ke_lcell \shift[4][0]~I (
// Equation(s):
// \shift[4][0]  = DFFEA(\fbuf[2][8] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[2][8] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[4][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[4][0]~I .clock_enable_mode = "true";
defparam \shift[4][0]~I .lut_mask = "ff00";
defparam \shift[4][0]~I .operation_mode = "normal";
defparam \shift[4][0]~I .output_mode = "reg_only";
defparam \shift[4][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_G6
flex10ke_lcell \Mux16~25_I (
// Equation(s):
// \Mux16~25  = \pixnumber_rtl_4|wysi_counter|q [2] & (\shift[4][0]  # \pixnumber_rtl_4|wysi_counter|q [0]) # !\pixnumber_rtl_4|wysi_counter|q [2] & \shift[0][0]  & (!\pixnumber_rtl_4|wysi_counter|q [0])

        .dataa(\shift[0][0] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [2]),
        .datac(\shift[4][0] ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux16~25 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux16~25_I .clock_enable_mode = "false";
defparam \Mux16~25_I .lut_mask = "cce2";
defparam \Mux16~25_I .operation_mode = "normal";
defparam \Mux16~25_I .output_mode = "comb_only";
defparam \Mux16~25_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G11
flex10ke_lcell \fbuf[0][11]~I (
// Equation(s):
// \fbuf[0][11]  = DFFEA(rddata_11, GLOBAL(\fclk~dataout ), , , \fbuf[0][14]~415 , , )

        .dataa(\fbuf[0][14]~415 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[0][11] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][11]~I .clock_enable_mode = "true";
defparam \fbuf[0][11]~I .lut_mask = "ff00";
defparam \fbuf[0][11]~I .operation_mode = "normal";
defparam \fbuf[0][11]~I .output_mode = "reg_only";
defparam \fbuf[0][11]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G11
flex10ke_lcell \shift[0][3]~I (
// Equation(s):
// \shift[0][3]  = DFFEA(\fbuf[0][11] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[0][11] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[0][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[0][3]~I .clock_enable_mode = "true";
defparam \shift[0][3]~I .lut_mask = "ff00";
defparam \shift[0][3]~I .operation_mode = "normal";
defparam \shift[0][3]~I .output_mode = "reg_only";
defparam \shift[0][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G11
flex10ke_lcell \Mux16~26_I (
// Equation(s):
// \Mux16~26  = \Mux16~25  & (\shift[4][3]  # !\pixnumber_rtl_4|wysi_counter|q [0]) # !\Mux16~25  & (\pixnumber_rtl_4|wysi_counter|q [0] & \shift[0][3] )

        .dataa(\shift[4][3] ),
        .datab(\Mux16~25 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [0]),
        .datad(\shift[0][3] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux16~26 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux16~26_I .clock_enable_mode = "false";
defparam \Mux16~26_I .lut_mask = "bc8c";
defparam \Mux16~26_I .operation_mode = "normal";
defparam \Mux16~26_I .output_mode = "comb_only";
defparam \Mux16~26_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_F11
flex10ke_lcell \fbuf[3][8]~I (
// Equation(s):
// \fbuf[3][8]  = DFFEA(rddata_8, GLOBAL(\fclk~dataout ), , , \fbuf[3][14]~416 , , )

        .dataa(\fbuf[3][14]~416 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_8),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[3][8] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[3][8]~I .clock_enable_mode = "true";
defparam \fbuf[3][8]~I .lut_mask = "ff00";
defparam \fbuf[3][8]~I .operation_mode = "normal";
defparam \fbuf[3][8]~I .output_mode = "reg_only";
defparam \fbuf[3][8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_F11
flex10ke_lcell \shift[6][0]~I (
// Equation(s):
// \shift[6][0]  = DFFEA(\fbuf[3][8] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[3][8] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[6][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[6][0]~I .clock_enable_mode = "true";
defparam \shift[6][0]~I .lut_mask = "ff00";
defparam \shift[6][0]~I .operation_mode = "normal";
defparam \shift[6][0]~I .output_mode = "reg_only";
defparam \shift[6][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F11
flex10ke_lcell \Mux16~23_I (
// Equation(s):
// \Mux16~23  = \pixnumber_rtl_4|wysi_counter|q [2] & (\shift[6][0]  # \pixnumber_rtl_4|wysi_counter|q [0]) # !\pixnumber_rtl_4|wysi_counter|q [2] & \shift[2][0]  & (!\pixnumber_rtl_4|wysi_counter|q [0])

        .dataa(\shift[2][0] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [2]),
        .datac(\shift[6][0] ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux16~23 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux16~23_I .clock_enable_mode = "false";
defparam \Mux16~23_I .lut_mask = "cce2";
defparam \Mux16~23_I .operation_mode = "normal";
defparam \Mux16~23_I .output_mode = "comb_only";
defparam \Mux16~23_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_F11
flex10ke_lcell \fbuf[1][11]~I (
// Equation(s):
// \fbuf[1][11]  = DFFEA(rddata_11, GLOBAL(\fclk~dataout ), , , \fbuf[1][14]~414 , , )

        .dataa(\fbuf[1][14]~414 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[1][11] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][11]~I .clock_enable_mode = "true";
defparam \fbuf[1][11]~I .lut_mask = "ff00";
defparam \fbuf[1][11]~I .operation_mode = "normal";
defparam \fbuf[1][11]~I .output_mode = "reg_only";
defparam \fbuf[1][11]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F11
flex10ke_lcell \shift[2][3]~I (
// Equation(s):
// \shift[2][3]  = DFFEA(\fbuf[1][11] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[1][11] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[2][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[2][3]~I .clock_enable_mode = "true";
defparam \shift[2][3]~I .lut_mask = "ff00";
defparam \shift[2][3]~I .operation_mode = "normal";
defparam \shift[2][3]~I .output_mode = "reg_only";
defparam \shift[2][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F11
flex10ke_lcell \Mux16~24_I (
// Equation(s):
// \Mux16~24  = \Mux16~23  & (\shift[6][3]  # !\pixnumber_rtl_4|wysi_counter|q [0]) # !\Mux16~23  & (\pixnumber_rtl_4|wysi_counter|q [0] & \shift[2][3] )

        .dataa(\shift[6][3] ),
        .datab(\Mux16~23 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [0]),
        .datad(\shift[2][3] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux16~24 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux16~24_I .clock_enable_mode = "false";
defparam \Mux16~24_I .lut_mask = "bc8c";
defparam \Mux16~24_I .operation_mode = "normal";
defparam \Mux16~24_I .output_mode = "comb_only";
defparam \Mux16~24_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G11
flex10ke_lcell \Mux16~27_I (
// Equation(s):
// \Mux16~27  = \pixnumber_rtl_4|wysi_counter|q [1] & (\Mux16~24  # \pixnumber_rtl_4|wysi_counter|q [3]) # !\pixnumber_rtl_4|wysi_counter|q [1] & \Mux16~26  & (!\pixnumber_rtl_4|wysi_counter|q [3])

        .dataa(\Mux16~26 ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [1]),
        .datac(\Mux16~24 ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux16~27 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux16~27_I .clock_enable_mode = "false";
defparam \Mux16~27_I .lut_mask = "cce2";
defparam \Mux16~27_I .operation_mode = "normal";
defparam \Mux16~27_I .output_mode = "comb_only";
defparam \Mux16~27_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_G4
flex10ke_lcell \fbuf[2][3]~I (
// Equation(s):
// \fbuf[2][3]  = DFFEA(rddata_3, GLOBAL(\fclk~dataout ), , , \fbuf[2][14]~413 , , )

        .dataa(\fbuf[2][14]~413 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[2][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][3]~I .clock_enable_mode = "true";
defparam \fbuf[2][3]~I .lut_mask = "ff00";
defparam \fbuf[2][3]~I .operation_mode = "normal";
defparam \fbuf[2][3]~I .output_mode = "reg_only";
defparam \fbuf[2][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G4
flex10ke_lcell \shift[5][3]~I (
// Equation(s):
// \shift[5][3]  = DFFEA(\fbuf[2][3] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[2][3] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[5][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[5][3]~I .clock_enable_mode = "true";
defparam \shift[5][3]~I .lut_mask = "ff00";
defparam \shift[5][3]~I .operation_mode = "normal";
defparam \shift[5][3]~I .output_mode = "reg_only";
defparam \shift[5][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G17
flex10ke_lcell \fbuf[2][0]~I (
// Equation(s):
// \fbuf[2][0]  = DFFEA(rddata_0, GLOBAL(\fclk~dataout ), , , \fbuf[2][14]~413 , , )

        .dataa(\fbuf[2][14]~413 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[2][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[2][0]~I .clock_enable_mode = "true";
defparam \fbuf[2][0]~I .lut_mask = "ff00";
defparam \fbuf[2][0]~I .operation_mode = "normal";
defparam \fbuf[2][0]~I .output_mode = "reg_only";
defparam \fbuf[2][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G17
flex10ke_lcell \shift[5][0]~I (
// Equation(s):
// \shift[5][0]  = DFFEA(\fbuf[2][0] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[2][0] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[5][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[5][0]~I .clock_enable_mode = "true";
defparam \shift[5][0]~I .lut_mask = "ff00";
defparam \shift[5][0]~I .operation_mode = "normal";
defparam \shift[5][0]~I .output_mode = "reg_only";
defparam \shift[5][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_G6
flex10ke_lcell \Mux16~21_I (
// Equation(s):
// \Mux16~21  = \pixnumber_rtl_4|wysi_counter|q [2] & (\shift[5][0]  # \pixnumber_rtl_4|wysi_counter|q [0]) # !\pixnumber_rtl_4|wysi_counter|q [2] & \shift[1][0]  & (!\pixnumber_rtl_4|wysi_counter|q [0])

        .dataa(\shift[1][0] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [2]),
        .datac(\shift[5][0] ),
        .datad(\pixnumber_rtl_4|wysi_counter|q [0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux16~21 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux16~21_I .clock_enable_mode = "false";
defparam \Mux16~21_I .lut_mask = "cce2";
defparam \Mux16~21_I .operation_mode = "normal";
defparam \Mux16~21_I .output_mode = "comb_only";
defparam \Mux16~21_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_G4
flex10ke_lcell \fbuf[0][3]~I (
// Equation(s):
// \fbuf[0][3]  = DFFEA(rddata_3, GLOBAL(\fclk~dataout ), , , \fbuf[0][14]~415 , , )

        .dataa(\fbuf[0][14]~415 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[0][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[0][3]~I .clock_enable_mode = "true";
defparam \fbuf[0][3]~I .lut_mask = "ff00";
defparam \fbuf[0][3]~I .operation_mode = "normal";
defparam \fbuf[0][3]~I .output_mode = "reg_only";
defparam \fbuf[0][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G4
flex10ke_lcell \shift[1][3]~I (
// Equation(s):
// \shift[1][3]  = DFFEA(\fbuf[0][3] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[0][3] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[1][3] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[1][3]~I .clock_enable_mode = "true";
defparam \shift[1][3]~I .lut_mask = "ff00";
defparam \shift[1][3]~I .operation_mode = "normal";
defparam \shift[1][3]~I .output_mode = "reg_only";
defparam \shift[1][3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G4
flex10ke_lcell \Mux16~22_I (
// Equation(s):
// \Mux16~22  = \Mux16~21  & (\shift[5][3]  # !\pixnumber_rtl_4|wysi_counter|q [0]) # !\Mux16~21  & (\pixnumber_rtl_4|wysi_counter|q [0] & \shift[1][3] )

        .dataa(\shift[5][3] ),
        .datab(\Mux16~21 ),
        .datac(\pixnumber_rtl_4|wysi_counter|q [0]),
        .datad(\shift[1][3] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux16~22 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux16~22_I .clock_enable_mode = "false";
defparam \Mux16~22_I .lut_mask = "bc8c";
defparam \Mux16~22_I .operation_mode = "normal";
defparam \Mux16~22_I .output_mode = "comb_only";
defparam \Mux16~22_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G17
flex10ke_lcell \fbuf[1][0]~I (
// Equation(s):
// \fbuf[1][0]  = DFFEA(rddata_0, GLOBAL(\fclk~dataout ), , , \fbuf[1][14]~414 , , )

        .dataa(\fbuf[1][14]~414 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[1][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][0]~I .clock_enable_mode = "true";
defparam \fbuf[1][0]~I .lut_mask = "ff00";
defparam \fbuf[1][0]~I .operation_mode = "normal";
defparam \fbuf[1][0]~I .output_mode = "reg_only";
defparam \fbuf[1][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G17
flex10ke_lcell \shift[3][0]~I (
// Equation(s):
// \shift[3][0]  = DFFEA(\fbuf[1][0] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[1][0] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[3][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[3][0]~I .clock_enable_mode = "true";
defparam \shift[3][0]~I .lut_mask = "ff00";
defparam \shift[3][0]~I .operation_mode = "normal";
defparam \shift[3][0]~I .output_mode = "reg_only";
defparam \shift[3][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_F1
flex10ke_lcell \zxcolor~204_I (
// Equation(s):
// \zxcolor~204  = \pixnumber_rtl_4|wysi_counter|q [3] & (\shift[3][3]  # \zxcolor~1 ) # !\pixnumber_rtl_4|wysi_counter|q [3] & \shift[2][3]  & (!\zxcolor~1 )

        .dataa(\shift[2][3] ),
        .datab(\pixnumber_rtl_4|wysi_counter|q [3]),
        .datac(\shift[3][3] ),
        .datad(\zxcolor~1 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\zxcolor~204 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zxcolor~204_I .clock_enable_mode = "false";
defparam \zxcolor~204_I .lut_mask = "cce2";
defparam \zxcolor~204_I .operation_mode = "normal";
defparam \zxcolor~204_I .output_mode = "comb_only";
defparam \zxcolor~204_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F16
flex10ke_lcell \fbuf[1][8]~I (
// Equation(s):
// \fbuf[1][8]  = DFFEA(rddata_8, GLOBAL(\fclk~dataout ), , , \fbuf[1][14]~414 , , )

        .dataa(\fbuf[1][14]~414 ),
        .datab(vcc),
        .datac(vcc),
        .datad(rddata_8),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\fbuf[1][8] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \fbuf[1][8]~I .clock_enable_mode = "true";
defparam \fbuf[1][8]~I .lut_mask = "ff00";
defparam \fbuf[1][8]~I .operation_mode = "normal";
defparam \fbuf[1][8]~I .output_mode = "reg_only";
defparam \fbuf[1][8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F16
flex10ke_lcell \shift[2][0]~I (
// Equation(s):
// \shift[2][0]  = DFFEA(\fbuf[1][8] , GLOBAL(\fclk~dataout ), , , wordsync, , )

        .dataa(wordsync),
        .datab(vcc),
        .datac(vcc),
        .datad(\fbuf[1][8] ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\shift[2][0] ),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift[2][0]~I .clock_enable_mode = "true";
defparam \shift[2][0]~I .lut_mask = "ff00";
defparam \shift[2][0]~I .operation_mode = "normal";
defparam \shift[2][0]~I .output_mode = "reg_only";
defparam \shift[2][0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I22
flex10ke_lcell \hcnt~59_I (
// Equation(s):
// \hcnt~59  = video_next & dcnt_0 & (dcnt_1 # !peff7_int_0)

        .dataa(peff7_int_0),
        .datab(dcnt_1),
        .datac(video_next),
        .datad(dcnt_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\hcnt~59 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcnt~59_I .clock_enable_mode = "false";
defparam \hcnt~59_I .lut_mask = "d000";
defparam \hcnt~59_I .operation_mode = "normal";
defparam \hcnt~59_I .output_mode = "comb_only";
defparam \hcnt~59_I .packed_mode = "false";
// synopsys translate_on

endmodule

module resetter (
        rst_out_n,
        rst_in_n,
        clk,
        rst_out_n1,
        devpor,
        devclrn,
        devoe);
output  rst_out_n;
input   rst_in_n;
input   clk;
output  rst_out_n1;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire rst1_n;
wire rst2_n;
wire \rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0 ;
wire \rst_cnt_rtl_3|wysi_counter|counter_cell[0]~COUT ;
wire \rst_cnt_rtl_3|wysi_counter|counter_cell[1]~COUT ;
wire \rst_cnt_rtl_3|wysi_counter|counter_cell[2]~COUT ;
wire \rst_cnt_rtl_3|wysi_counter|counter_cell[3]~COUT ;
wire \rst_cnt_rtl_3|wysi_counter|counter_cell[4]~COUT ;
wire \rst_cnt_rtl_3|wysi_counter|counter_cell[5]~COUT ;
wire [6:0] \rst_cnt_rtl_3|wysi_counter|q ;


// atom is at LC8_J6
flex10ke_lcell \rst_out_n~I (
// Equation(s):
// rst_out_n = DFFEA(VCC, GLOBAL(\fclk~dataout ), !genrst, , \rst_cnt_rtl_3|wysi_counter|q [6], , )

        .dataa(\rst_cnt_rtl_3|wysi_counter|q [6]),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(rst_in_n),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rst_out_n),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rst_out_n~I .clock_enable_mode = "true";
defparam \rst_out_n~I .lut_mask = "ffff";
defparam \rst_out_n~I .operation_mode = "normal";
defparam \rst_out_n~I .output_mode = "reg_only";
defparam \rst_out_n~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_J3
flex10ke_lcell \rst_out_n~9_I (
// Equation(s):
// rst_out_n1 = DFFEA(VCC, GLOBAL(\fclk~dataout ), !genrst, , \rst_cnt_rtl_3|wysi_counter|q [6], , )

        .dataa(\rst_cnt_rtl_3|wysi_counter|q [6]),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(rst_in_n),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rst_out_n1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rst_out_n~9_I .clock_enable_mode = "true";
defparam \rst_out_n~9_I .lut_mask = "ffff";
defparam \rst_out_n~9_I .operation_mode = "normal";
defparam \rst_out_n~9_I .output_mode = "reg_only";
defparam \rst_out_n~9_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J6
flex10ke_lcell \rst1_n~I (
// Equation(s):
// rst1_n = DFFEA(VCC, GLOBAL(\fclk~dataout ), !genrst, , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(rst_in_n),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rst1_n),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rst1_n~I .clock_enable_mode = "false";
defparam \rst1_n~I .lut_mask = "ffff";
defparam \rst1_n~I .operation_mode = "normal";
defparam \rst1_n~I .output_mode = "reg_only";
defparam \rst1_n~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J6
flex10ke_lcell \rst2_n~I (
// Equation(s):
// rst2_n = DFFEA(rst1_n, GLOBAL(\fclk~dataout ), !genrst, , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(rst1_n),
        .aclr(rst_in_n),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rst2_n),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rst2_n~I .clock_enable_mode = "false";
defparam \rst2_n~I .lut_mask = "ff00";
defparam \rst2_n~I .operation_mode = "normal";
defparam \rst2_n~I .output_mode = "reg_only";
defparam \rst2_n~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J6
flex10ke_lcell \rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0_I (
// Equation(s):
// \rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0  = !\rst_cnt_rtl_3|wysi_counter|q [6] & rst2_n

        .dataa(vcc),
        .datab(vcc),
        .datac(\rst_cnt_rtl_3|wysi_counter|q [6]),
        .datad(rst2_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0_I .clock_enable_mode = "false";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0_I .lut_mask = "0f00";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0_I .operation_mode = "normal";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0_I .output_mode = "comb_only";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J3
flex10ke_lcell \rst_cnt_rtl_3|wysi_counter|counter_cell[0] (
// Equation(s):
// \rst_cnt_rtl_3|wysi_counter|counter_cell[0]~COUT  = CARRY()

        .dataa(\rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0 ),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(rst_in_n),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\rst_cnt_rtl_3|wysi_counter|q [0]),
        .cout(\rst_cnt_rtl_3|wysi_counter|counter_cell[0]~COUT ),
        .cascout());
// synopsys translate_off
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[0] .clock_enable_mode = "false";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[0] .lut_mask = "66aa";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[0] .operation_mode = "clrb_cntr";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[0] .output_mode = "none";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[0] .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J3
flex10ke_lcell \rst_cnt_rtl_3|wysi_counter|counter_cell[1] (
// Equation(s):
// \rst_cnt_rtl_3|wysi_counter|counter_cell[1]~COUT  = CARRY( & (\rst_cnt_rtl_3|wysi_counter|counter_cell[0]~COUT ))

        .dataa(\rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0 ),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(rst_in_n),
        .aload(gnd),
        .clk(clk),
        .cin(\rst_cnt_rtl_3|wysi_counter|counter_cell[0]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\rst_cnt_rtl_3|wysi_counter|q [1]),
        .cout(\rst_cnt_rtl_3|wysi_counter|counter_cell[1]~COUT ),
        .cascout());
// synopsys translate_off
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[1] .cin_used = "true";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[1] .clock_enable_mode = "false";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[1] .lut_mask = "6ca0";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[1] .operation_mode = "clrb_cntr";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[1] .output_mode = "none";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[1] .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J3
flex10ke_lcell \rst_cnt_rtl_3|wysi_counter|counter_cell[2] (
// Equation(s):
// \rst_cnt_rtl_3|wysi_counter|counter_cell[2]~COUT  = CARRY( & (\rst_cnt_rtl_3|wysi_counter|counter_cell[1]~COUT ))

        .dataa(\rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0 ),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(rst_in_n),
        .aload(gnd),
        .clk(clk),
        .cin(\rst_cnt_rtl_3|wysi_counter|counter_cell[1]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\rst_cnt_rtl_3|wysi_counter|q [2]),
        .cout(\rst_cnt_rtl_3|wysi_counter|counter_cell[2]~COUT ),
        .cascout());
// synopsys translate_off
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[2] .cin_used = "true";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[2] .clock_enable_mode = "false";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[2] .lut_mask = "6ca0";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[2] .operation_mode = "clrb_cntr";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[2] .output_mode = "none";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[2] .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J3
flex10ke_lcell \rst_cnt_rtl_3|wysi_counter|counter_cell[3] (
// Equation(s):
// \rst_cnt_rtl_3|wysi_counter|counter_cell[3]~COUT  = CARRY( & (\rst_cnt_rtl_3|wysi_counter|counter_cell[2]~COUT ))

        .dataa(\rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0 ),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(rst_in_n),
        .aload(gnd),
        .clk(clk),
        .cin(\rst_cnt_rtl_3|wysi_counter|counter_cell[2]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\rst_cnt_rtl_3|wysi_counter|q [3]),
        .cout(\rst_cnt_rtl_3|wysi_counter|counter_cell[3]~COUT ),
        .cascout());
// synopsys translate_off
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[3] .cin_used = "true";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[3] .clock_enable_mode = "false";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[3] .lut_mask = "6ca0";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[3] .operation_mode = "clrb_cntr";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[3] .output_mode = "none";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[3] .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J3
flex10ke_lcell \rst_cnt_rtl_3|wysi_counter|counter_cell[4] (
// Equation(s):
// \rst_cnt_rtl_3|wysi_counter|counter_cell[4]~COUT  = CARRY( & (\rst_cnt_rtl_3|wysi_counter|counter_cell[3]~COUT ))

        .dataa(\rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0 ),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(rst_in_n),
        .aload(gnd),
        .clk(clk),
        .cin(\rst_cnt_rtl_3|wysi_counter|counter_cell[3]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\rst_cnt_rtl_3|wysi_counter|q [4]),
        .cout(\rst_cnt_rtl_3|wysi_counter|counter_cell[4]~COUT ),
        .cascout());
// synopsys translate_off
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[4] .cin_used = "true";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[4] .clock_enable_mode = "false";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[4] .lut_mask = "6ca0";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[4] .operation_mode = "clrb_cntr";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[4] .output_mode = "none";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[4] .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_J3
flex10ke_lcell \rst_cnt_rtl_3|wysi_counter|counter_cell[5] (
// Equation(s):
// \rst_cnt_rtl_3|wysi_counter|counter_cell[5]~COUT  = CARRY( & (\rst_cnt_rtl_3|wysi_counter|counter_cell[4]~COUT ))

        .dataa(\rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0 ),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(rst_in_n),
        .aload(gnd),
        .clk(clk),
        .cin(\rst_cnt_rtl_3|wysi_counter|counter_cell[4]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\rst_cnt_rtl_3|wysi_counter|q [5]),
        .cout(\rst_cnt_rtl_3|wysi_counter|counter_cell[5]~COUT ),
        .cascout());
// synopsys translate_off
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[5] .cin_used = "true";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[5] .clock_enable_mode = "false";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[5] .lut_mask = "6ca0";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[5] .operation_mode = "clrb_cntr";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[5] .output_mode = "none";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[5] .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_J3
flex10ke_lcell \rst_cnt_rtl_3|wysi_counter|counter_cell[6] (
// Equation(s):
// \rst_cnt_rtl_3|wysi_counter|q [6] = DFFEA((\rst_cnt_rtl_3|wysi_counter|q [6] $ (\rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0  & \rst_cnt_rtl_3|wysi_counter|counter_cell[5]~COUT )) & VCC, GLOBAL(\fclk~dataout ), !genrst, , , , )

        .dataa(\rst_cnt_rtl_3|wysi_counter|counter_cell[6]~0 ),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(rst_in_n),
        .aload(gnd),
        .clk(clk),
        .cin(\rst_cnt_rtl_3|wysi_counter|counter_cell[5]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\rst_cnt_rtl_3|wysi_counter|q [6]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[6] .cin_used = "true";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[6] .clock_enable_mode = "false";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[6] .lut_mask = "6c6c";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[6] .operation_mode = "clrb_cntr";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[6] .output_mode = "reg_only";
defparam \rst_cnt_rtl_3|wysi_counter|counter_cell[6] .packed_mode = "false";
// synopsys translate_on

endmodule

module slavespi (
        shift_out_0,
        waits_1,
        waits_0,
        cfg0_reg_out_1,
        spics_n_sync_1,
        spics_n_sync_2,
        genrst,
        cfg0_reg_out_0,
        wait_write_0,
        gluclock_addr_0,
        comport_addr_0,
        sel_waitreg,
        wait_write_1,
        gluclock_addr_1,
        comport_addr_1,
        cfg0_reg_out_2,
        wait_write_2,
        gluclock_addr_2,
        comport_addr_2,
        mouse_buf_5,
        mus_ystb,
        mus_xstb,
        mus_btnstb,
        mouse_buf_6,
        mouse_buf_7,
        wait_write_3,
        gluclock_addr_3,
        wait_reg_0,
        wait_reg_1,
        wait_reg_2,
        wait_reg_3,
        wait_reg_4,
        wait_reg_5,
        wait_reg_6,
        wait_reg_7,
        wait_write_4,
        gluclock_addr_4,
        mouse_buf_0,
        kj_stb,
        mouse_buf_1,
        mouse_buf_2,
        mouse_buf_3,
        mouse_buf_4,
        wait_write_5,
        gluclock_addr_5,
        wait_write_6,
        gluclock_addr_6,
        kbd_reg_34,
        kbd_stb,
        kbd_reg_39,
        kbd_reg_33,
        kbd_reg_38,
        kbd_reg_37,
        kbd_reg_32,
        kbd_reg_35,
        kbd_reg_36,
        kbd_reg_26,
        kbd_reg_31,
        kbd_reg_25,
        kbd_reg_30,
        kbd_reg_29,
        kbd_reg_24,
        kbd_reg_27,
        kbd_reg_28,
        kbd_reg_18,
        kbd_reg_23,
        kbd_reg_17,
        kbd_reg_22,
        kbd_reg_21,
        kbd_reg_16,
        kbd_reg_19,
        kbd_reg_20,
        kbd_reg_10,
        kbd_reg_15,
        kbd_reg_9,
        kbd_reg_14,
        kbd_reg_13,
        kbd_reg_8,
        kbd_reg_11,
        kbd_reg_12,
        kbd_reg_2,
        kbd_reg_7,
        kbd_reg_1,
        kbd_reg_6,
        kbd_reg_5,
        kbd_reg_0,
        kbd_reg_3,
        kbd_reg_4,
        wait_write_7,
        gluclock_addr_7,
        wait_rnw,
        fclk,
        spics_n,
        spick,
        spido,
        devpor,
        devclrn,
        devoe);
output  shift_out_0;
input   waits_1;
input   waits_0;
output  cfg0_reg_out_1;
output  spics_n_sync_1;
output  spics_n_sync_2;
output  genrst;
output  cfg0_reg_out_0;
input   wait_write_0;
input   gluclock_addr_0;
input   comport_addr_0;
output  sel_waitreg;
input   wait_write_1;
input   gluclock_addr_1;
input   comport_addr_1;
output  cfg0_reg_out_2;
input   wait_write_2;
input   gluclock_addr_2;
input   comport_addr_2;
output  mouse_buf_5;
output  mus_ystb;
output  mus_xstb;
output  mus_btnstb;
output  mouse_buf_6;
output  mouse_buf_7;
input   wait_write_3;
input   gluclock_addr_3;
output  wait_reg_0;
output  wait_reg_1;
output  wait_reg_2;
output  wait_reg_3;
output  wait_reg_4;
output  wait_reg_5;
output  wait_reg_6;
output  wait_reg_7;
input   wait_write_4;
input   gluclock_addr_4;
output  mouse_buf_0;
output  kj_stb;
output  mouse_buf_1;
output  mouse_buf_2;
output  mouse_buf_3;
output  mouse_buf_4;
input   wait_write_5;
input   gluclock_addr_5;
input   wait_write_6;
input   gluclock_addr_6;
output  kbd_reg_34;
output  kbd_stb;
output  kbd_reg_39;
output  kbd_reg_33;
output  kbd_reg_38;
output  kbd_reg_37;
output  kbd_reg_32;
output  kbd_reg_35;
output  kbd_reg_36;
output  kbd_reg_26;
output  kbd_reg_31;
output  kbd_reg_25;
output  kbd_reg_30;
output  kbd_reg_29;
output  kbd_reg_24;
output  kbd_reg_27;
output  kbd_reg_28;
output  kbd_reg_18;
output  kbd_reg_23;
output  kbd_reg_17;
output  kbd_reg_22;
output  kbd_reg_21;
output  kbd_reg_16;
output  kbd_reg_19;
output  kbd_reg_20;
output  kbd_reg_10;
output  kbd_reg_15;
output  kbd_reg_9;
output  kbd_reg_14;
output  kbd_reg_13;
output  kbd_reg_8;
output  kbd_reg_11;
output  kbd_reg_12;
output  kbd_reg_2;
output  kbd_reg_7;
output  kbd_reg_1;
output  kbd_reg_6;
output  kbd_reg_5;
output  kbd_reg_0;
output  kbd_reg_3;
output  kbd_reg_4;
input   wait_write_7;
input   gluclock_addr_7;
input   wait_rnw;
input   fclk;
input   spics_n;
input   spick;
input   spido;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \regnum[7]~561 ;
wire \shift_out[7]~4987 ;
wire \shift_out~4963 ;
wire \sel_comadr~29 ;
wire \shift_out~4962 ;
wire \shift_out~4964 ;
wire \shift_out~4967 ;
wire \shift_out~4968 ;
wire \shift_out~4971 ;
wire \shift_out~4972 ;
wire \shift_out~4975 ;
wire \shift_out~4976 ;
wire \shift_out~4979 ;
wire \shift_out~4980 ;
wire \shift_out[7]~4984 ;
wire \shift_out[7]~4985 ;
wire \shift_out[7]~4986 ;
wire \shift_out~4978 ;
wire \shift_out~4974 ;
wire \shift_out~4970 ;
wire \shift_out~4966 ;
wire \shift_out~4961 ;
wire \shift_out~4959 ;
wire \shift_out~4956 ;
wire \shift_out~4955 ;
wire \shift_out~4957 ;
wire \shift_out~4958 ;
wire \shift_out~4953 ;
wire \shift_out~4950 ;
wire \shift_out~4949 ;
wire \shift_out~4951 ;
wire \shift_out~4952 ;
wire \genrst~13 ;
wire \always4~102 ;
wire \always4~103 ;
wire \always4~104 ;
wire \always4~105 ;
wire \sel_musycr~14 ;
wire \always4~106 ;
wire scs_n_01;
wire \always4~10 ;
wire \always4~107 ;
wire [7:0] cfg0_reg_in;
wire [7:0] regnum;
wire [7:0] shift_out;
wire [2:0] spick_sync;
wire [2:0] spics_n_sync;
wire [1:0] spido_sync;


// atom is at LC6_D36
flex10ke_lcell \regnum[7]~561_I (
// Equation(s):
// \regnum[7]~561  = spics_n_sync_1 & (!spick_sync[2] & spick_sync[1] # !spics_n_sync_2)

        .dataa(spics_n_sync_2),
        .datab(spick_sync[2]),
        .datac(spick_sync[1]),
        .datad(spics_n_sync_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\regnum[7]~561 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \regnum[7]~561_I .clock_enable_mode = "false";
defparam \regnum[7]~561_I .lut_mask = "7500";
defparam \regnum[7]~561_I .operation_mode = "normal";
defparam \regnum[7]~561_I .output_mode = "comb_only";
defparam \regnum[7]~561_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D2
flex10ke_lcell \shift_out[7]~4987_I (
// Equation(s):
// \shift_out[7]~4987  = spick_sync[2] & (spics_n_sync_2 $ spics_n_sync_1) # !spick_sync[2] & (spick_sync[1] # spics_n_sync_2 $ spics_n_sync_1)

        .dataa(spics_n_sync_2),
        .datab(spics_n_sync_1),
        .datac(spick_sync[2]),
        .datad(spick_sync[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out[7]~4987 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out[7]~4987_I .clock_enable_mode = "false";
defparam \shift_out[7]~4987_I .lut_mask = "6f66";
defparam \shift_out[7]~4987_I .operation_mode = "normal";
defparam \shift_out[7]~4987_I .output_mode = "comb_only";
defparam \shift_out[7]~4987_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D2
flex10ke_lcell \shift_out[0]~I (
// Equation(s):
// shift_out_0 = DFFEA(\shift_out~4952  # \shift_out~4953  & (spics_n_sync_2 $ !spics_n_sync_1), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(spics_n_sync_2),
        .datab(spics_n_sync_1),
        .datac(\shift_out~4953 ),
        .datad(\shift_out~4952 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shift_out_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out[0]~I .clock_enable_mode = "false";
defparam \shift_out[0]~I .lut_mask = "ff90";
defparam \shift_out[0]~I .operation_mode = "normal";
defparam \shift_out[0]~I .output_mode = "reg_only";
defparam \shift_out[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_A34
flex10ke_lcell \cfg0_reg_out[1]~I (
// Equation(s):
// cfg0_reg_out_1 = DFFEA(cfg0_reg_in[1], GLOBAL(\fclk~dataout ), , , \always4~102 , , )

        .dataa(\always4~102 ),
        .datab(vcc),
        .datac(vcc),
        .datad(cfg0_reg_in[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(cfg0_reg_out_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \cfg0_reg_out[1]~I .clock_enable_mode = "true";
defparam \cfg0_reg_out[1]~I .lut_mask = "ff00";
defparam \cfg0_reg_out[1]~I .operation_mode = "normal";
defparam \cfg0_reg_out[1]~I .output_mode = "reg_only";
defparam \cfg0_reg_out[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D35
flex10ke_lcell \spics_n_sync[1]~I (
// Equation(s):
// spics_n_sync_1 = DFFEA(spics_n_sync[0], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(spics_n_sync[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(spics_n_sync_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \spics_n_sync[1]~I .clock_enable_mode = "false";
defparam \spics_n_sync[1]~I .lut_mask = "ff00";
defparam \spics_n_sync[1]~I .operation_mode = "normal";
defparam \spics_n_sync[1]~I .output_mode = "reg_only";
defparam \spics_n_sync[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D2
flex10ke_lcell \spics_n_sync[2]~I (
// Equation(s):
// spics_n_sync_2 = DFFEA(spics_n_sync_1, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(spics_n_sync_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(spics_n_sync_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \spics_n_sync[2]~I .clock_enable_mode = "false";
defparam \spics_n_sync[2]~I .lut_mask = "ff00";
defparam \spics_n_sync[2]~I .operation_mode = "normal";
defparam \spics_n_sync[2]~I .output_mode = "reg_only";
defparam \spics_n_sync[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D34
flex10ke_lcell \genrst~I (
// Equation(s):
// genrst = !regnum[6] & regnum[5] & \genrst~13 

        .dataa(vcc),
        .datab(regnum[6]),
        .datac(regnum[5]),
        .datad(\genrst~13 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(genrst),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \genrst~I .clock_enable_mode = "false";
defparam \genrst~I .lut_mask = "3000";
defparam \genrst~I .operation_mode = "normal";
defparam \genrst~I .output_mode = "comb_only";
defparam \genrst~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A34
flex10ke_lcell \cfg0_reg_out[0]~I (
// Equation(s):
// cfg0_reg_out_0 = DFFEA(cfg0_reg_in[0], GLOBAL(\fclk~dataout ), , , \always4~102 , , )

        .dataa(\always4~102 ),
        .datab(vcc),
        .datac(vcc),
        .datad(cfg0_reg_in[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(cfg0_reg_out_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \cfg0_reg_out[0]~I .clock_enable_mode = "true";
defparam \cfg0_reg_out[0]~I .lut_mask = "ff00";
defparam \cfg0_reg_out[0]~I .operation_mode = "normal";
defparam \cfg0_reg_out[0]~I .output_mode = "reg_only";
defparam \cfg0_reg_out[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D1
flex10ke_lcell \sel_waitreg~8_I (
// Equation(s):
// sel_waitreg = !regnum[1] & !regnum[0] & \sel_comadr~29 

        .dataa(vcc),
        .datab(regnum[1]),
        .datac(regnum[0]),
        .datad(\sel_comadr~29 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(sel_waitreg),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sel_waitreg~8_I .clock_enable_mode = "false";
defparam \sel_waitreg~8_I .lut_mask = "0300";
defparam \sel_waitreg~8_I .operation_mode = "normal";
defparam \sel_waitreg~8_I .output_mode = "comb_only";
defparam \sel_waitreg~8_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_E25
flex10ke_lcell \cfg0_reg_out[2]~I (
// Equation(s):
// cfg0_reg_out_2 = DFFEA(cfg0_reg_in[2], GLOBAL(\fclk~dataout ), , , \always4~102 , , )

        .dataa(\always4~102 ),
        .datab(vcc),
        .datac(vcc),
        .datad(cfg0_reg_in[2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(cfg0_reg_out_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \cfg0_reg_out[2]~I .clock_enable_mode = "true";
defparam \cfg0_reg_out[2]~I .lut_mask = "ff00";
defparam \cfg0_reg_out[2]~I .operation_mode = "normal";
defparam \cfg0_reg_out[2]~I .output_mode = "reg_only";
defparam \cfg0_reg_out[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_E30
flex10ke_lcell \mouse_buf[5]~I (
// Equation(s):
// mouse_buf_5 = DFFEA(mouse_buf_6, GLOBAL(\fclk~dataout ), , , \always4~106 , , )

        .dataa(\always4~106 ),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(mouse_buf_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \mouse_buf[5]~I .clock_enable_mode = "true";
defparam \mouse_buf[5]~I .lut_mask = "ff00";
defparam \mouse_buf[5]~I .operation_mode = "normal";
defparam \mouse_buf[5]~I .output_mode = "reg_only";
defparam \mouse_buf[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D33
flex10ke_lcell \mus_ystb~I (
// Equation(s):
// mus_ystb = !regnum[1] & \sel_musycr~14  & regnum[0] & scs_n_01

        .dataa(regnum[1]),
        .datab(\sel_musycr~14 ),
        .datac(regnum[0]),
        .datad(scs_n_01),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(mus_ystb),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \mus_ystb~I .clock_enable_mode = "false";
defparam \mus_ystb~I .lut_mask = "4000";
defparam \mus_ystb~I .operation_mode = "normal";
defparam \mus_ystb~I .output_mode = "comb_only";
defparam \mus_ystb~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D33
flex10ke_lcell \mus_xstb~I (
// Equation(s):
// mus_xstb = !regnum[0] & !regnum[1] & scs_n_01 & \sel_musycr~14 

        .dataa(regnum[0]),
        .datab(regnum[1]),
        .datac(scs_n_01),
        .datad(\sel_musycr~14 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(mus_xstb),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \mus_xstb~I .clock_enable_mode = "false";
defparam \mus_xstb~I .lut_mask = "1000";
defparam \mus_xstb~I .operation_mode = "normal";
defparam \mus_xstb~I .output_mode = "comb_only";
defparam \mus_xstb~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D33
flex10ke_lcell \mus_btnstb~12_I (
// Equation(s):
// mus_btnstb = !regnum[0] & \sel_musycr~14  & regnum[1] & scs_n_01

        .dataa(regnum[0]),
        .datab(\sel_musycr~14 ),
        .datac(regnum[1]),
        .datad(scs_n_01),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(mus_btnstb),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \mus_btnstb~12_I .clock_enable_mode = "false";
defparam \mus_btnstb~12_I .lut_mask = "4000";
defparam \mus_btnstb~12_I .operation_mode = "normal";
defparam \mus_btnstb~12_I .output_mode = "comb_only";
defparam \mus_btnstb~12_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_E30
flex10ke_lcell \mouse_buf[6]~I (
// Equation(s):
// mouse_buf_6 = DFFEA(mouse_buf_7, GLOBAL(\fclk~dataout ), , , \always4~106 , , )

        .dataa(\always4~106 ),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(mouse_buf_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \mouse_buf[6]~I .clock_enable_mode = "true";
defparam \mouse_buf[6]~I .lut_mask = "ff00";
defparam \mouse_buf[6]~I .operation_mode = "normal";
defparam \mouse_buf[6]~I .output_mode = "reg_only";
defparam \mouse_buf[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_E30
flex10ke_lcell \mouse_buf[7]~I (
// Equation(s):
// mouse_buf_7 = DFFEA(spido_sync[1], GLOBAL(\fclk~dataout ), , , \always4~106 , , )

        .dataa(\always4~106 ),
        .datab(vcc),
        .datac(vcc),
        .datad(spido_sync[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(mouse_buf_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \mouse_buf[7]~I .clock_enable_mode = "true";
defparam \mouse_buf[7]~I .lut_mask = "ff00";
defparam \mouse_buf[7]~I .operation_mode = "normal";
defparam \mouse_buf[7]~I .output_mode = "reg_only";
defparam \mouse_buf[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H12
flex10ke_lcell \wait_reg[0]~I (
// Equation(s):
// wait_reg_0 = DFFEA(wait_reg_1, GLOBAL(\fclk~dataout ), , , \always4~10 , , )

        .dataa(\always4~10 ),
        .datab(vcc),
        .datac(vcc),
        .datad(wait_reg_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_reg_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_reg[0]~I .clock_enable_mode = "true";
defparam \wait_reg[0]~I .lut_mask = "ff00";
defparam \wait_reg[0]~I .operation_mode = "normal";
defparam \wait_reg[0]~I .output_mode = "reg_only";
defparam \wait_reg[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H12
flex10ke_lcell \wait_reg[1]~I (
// Equation(s):
// wait_reg_1 = DFFEA(wait_reg_2, GLOBAL(\fclk~dataout ), , , \always4~10 , , )

        .dataa(\always4~10 ),
        .datab(vcc),
        .datac(vcc),
        .datad(wait_reg_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_reg_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_reg[1]~I .clock_enable_mode = "true";
defparam \wait_reg[1]~I .lut_mask = "ff00";
defparam \wait_reg[1]~I .operation_mode = "normal";
defparam \wait_reg[1]~I .output_mode = "reg_only";
defparam \wait_reg[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H12
flex10ke_lcell \wait_reg[2]~I (
// Equation(s):
// wait_reg_2 = DFFEA(wait_reg_3, GLOBAL(\fclk~dataout ), , , \always4~10 , , )

        .dataa(\always4~10 ),
        .datab(vcc),
        .datac(vcc),
        .datad(wait_reg_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_reg_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_reg[2]~I .clock_enable_mode = "true";
defparam \wait_reg[2]~I .lut_mask = "ff00";
defparam \wait_reg[2]~I .operation_mode = "normal";
defparam \wait_reg[2]~I .output_mode = "reg_only";
defparam \wait_reg[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H12
flex10ke_lcell \wait_reg[3]~I (
// Equation(s):
// wait_reg_3 = DFFEA(wait_reg_4, GLOBAL(\fclk~dataout ), , , \always4~10 , , )

        .dataa(\always4~10 ),
        .datab(vcc),
        .datac(vcc),
        .datad(wait_reg_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_reg_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_reg[3]~I .clock_enable_mode = "true";
defparam \wait_reg[3]~I .lut_mask = "ff00";
defparam \wait_reg[3]~I .operation_mode = "normal";
defparam \wait_reg[3]~I .output_mode = "reg_only";
defparam \wait_reg[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H12
flex10ke_lcell \wait_reg[4]~I (
// Equation(s):
// wait_reg_4 = DFFEA(wait_reg_5, GLOBAL(\fclk~dataout ), , , \always4~10 , , )

        .dataa(\always4~10 ),
        .datab(vcc),
        .datac(vcc),
        .datad(wait_reg_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_reg_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_reg[4]~I .clock_enable_mode = "true";
defparam \wait_reg[4]~I .lut_mask = "ff00";
defparam \wait_reg[4]~I .operation_mode = "normal";
defparam \wait_reg[4]~I .output_mode = "reg_only";
defparam \wait_reg[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H12
flex10ke_lcell \wait_reg[5]~I (
// Equation(s):
// wait_reg_5 = DFFEA(wait_reg_6, GLOBAL(\fclk~dataout ), , , \always4~10 , , )

        .dataa(\always4~10 ),
        .datab(vcc),
        .datac(vcc),
        .datad(wait_reg_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_reg_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_reg[5]~I .clock_enable_mode = "true";
defparam \wait_reg[5]~I .lut_mask = "ff00";
defparam \wait_reg[5]~I .operation_mode = "normal";
defparam \wait_reg[5]~I .output_mode = "reg_only";
defparam \wait_reg[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H36
flex10ke_lcell \wait_reg[6]~I (
// Equation(s):
// wait_reg_6 = DFFEA(wait_reg_7, GLOBAL(\fclk~dataout ), , , \always4~10 , , )

        .dataa(\always4~10 ),
        .datab(vcc),
        .datac(vcc),
        .datad(wait_reg_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_reg_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_reg[6]~I .clock_enable_mode = "true";
defparam \wait_reg[6]~I .lut_mask = "ff00";
defparam \wait_reg[6]~I .operation_mode = "normal";
defparam \wait_reg[6]~I .output_mode = "reg_only";
defparam \wait_reg[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H26
flex10ke_lcell \wait_reg[7]~I (
// Equation(s):
// wait_reg_7 = DFFEA(spido_sync[1], GLOBAL(\fclk~dataout ), , , \always4~10 , , )

        .dataa(\always4~10 ),
        .datab(vcc),
        .datac(vcc),
        .datad(spido_sync[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_reg_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_reg[7]~I .clock_enable_mode = "true";
defparam \wait_reg[7]~I .lut_mask = "ff00";
defparam \wait_reg[7]~I .operation_mode = "normal";
defparam \wait_reg[7]~I .output_mode = "reg_only";
defparam \wait_reg[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_E30
flex10ke_lcell \mouse_buf[0]~I (
// Equation(s):
// mouse_buf_0 = DFFEA(mouse_buf_1, GLOBAL(\fclk~dataout ), , , \always4~106 , , )

        .dataa(\always4~106 ),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(mouse_buf_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \mouse_buf[0]~I .clock_enable_mode = "true";
defparam \mouse_buf[0]~I .lut_mask = "ff00";
defparam \mouse_buf[0]~I .operation_mode = "normal";
defparam \mouse_buf[0]~I .output_mode = "reg_only";
defparam \mouse_buf[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D33
flex10ke_lcell \kj_stb~12_I (
// Equation(s):
// kj_stb = \sel_musycr~14  & regnum[1] & regnum[0] & scs_n_01

        .dataa(\sel_musycr~14 ),
        .datab(regnum[1]),
        .datac(regnum[0]),
        .datad(scs_n_01),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(kj_stb),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kj_stb~12_I .clock_enable_mode = "false";
defparam \kj_stb~12_I .lut_mask = "8000";
defparam \kj_stb~12_I .operation_mode = "normal";
defparam \kj_stb~12_I .output_mode = "comb_only";
defparam \kj_stb~12_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_E30
flex10ke_lcell \mouse_buf[1]~I (
// Equation(s):
// mouse_buf_1 = DFFEA(mouse_buf_2, GLOBAL(\fclk~dataout ), , , \always4~106 , , )

        .dataa(\always4~106 ),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(mouse_buf_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \mouse_buf[1]~I .clock_enable_mode = "true";
defparam \mouse_buf[1]~I .lut_mask = "ff00";
defparam \mouse_buf[1]~I .operation_mode = "normal";
defparam \mouse_buf[1]~I .output_mode = "reg_only";
defparam \mouse_buf[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_E30
flex10ke_lcell \mouse_buf[2]~I (
// Equation(s):
// mouse_buf_2 = DFFEA(mouse_buf_3, GLOBAL(\fclk~dataout ), , , \always4~106 , , )

        .dataa(\always4~106 ),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(mouse_buf_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \mouse_buf[2]~I .clock_enable_mode = "true";
defparam \mouse_buf[2]~I .lut_mask = "ff00";
defparam \mouse_buf[2]~I .operation_mode = "normal";
defparam \mouse_buf[2]~I .output_mode = "reg_only";
defparam \mouse_buf[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_E30
flex10ke_lcell \mouse_buf[3]~I (
// Equation(s):
// mouse_buf_3 = DFFEA(mouse_buf_4, GLOBAL(\fclk~dataout ), , , \always4~106 , , )

        .dataa(\always4~106 ),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(mouse_buf_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \mouse_buf[3]~I .clock_enable_mode = "true";
defparam \mouse_buf[3]~I .lut_mask = "ff00";
defparam \mouse_buf[3]~I .operation_mode = "normal";
defparam \mouse_buf[3]~I .output_mode = "reg_only";
defparam \mouse_buf[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_E30
flex10ke_lcell \mouse_buf[4]~I (
// Equation(s):
// mouse_buf_4 = DFFEA(mouse_buf_5, GLOBAL(\fclk~dataout ), , , \always4~106 , , )

        .dataa(\always4~106 ),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(mouse_buf_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \mouse_buf[4]~I .clock_enable_mode = "true";
defparam \mouse_buf[4]~I .lut_mask = "ff00";
defparam \mouse_buf[4]~I .operation_mode = "normal";
defparam \mouse_buf[4]~I .output_mode = "reg_only";
defparam \mouse_buf[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I25
flex10ke_lcell \kbd_reg[34]~I (
// Equation(s):
// kbd_reg_34 = DFFEA(kbd_reg_35, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_35),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_34),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[34]~I .clock_enable_mode = "true";
defparam \kbd_reg[34]~I .lut_mask = "ff00";
defparam \kbd_reg[34]~I .operation_mode = "normal";
defparam \kbd_reg[34]~I .output_mode = "reg_only";
defparam \kbd_reg[34]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D34
flex10ke_lcell \kbd_stb~30_I (
// Equation(s):
// kbd_stb = !regnum[5] & !regnum[6] & regnum[0] & \genrst~13 

        .dataa(regnum[5]),
        .datab(regnum[6]),
        .datac(regnum[0]),
        .datad(\genrst~13 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(kbd_stb),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_stb~30_I .clock_enable_mode = "false";
defparam \kbd_stb~30_I .lut_mask = "1000";
defparam \kbd_stb~30_I .operation_mode = "normal";
defparam \kbd_stb~30_I .output_mode = "comb_only";
defparam \kbd_stb~30_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I30
flex10ke_lcell \kbd_reg[39]~I (
// Equation(s):
// kbd_reg_39 = DFFEA(spido_sync[1], GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(spido_sync[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_39),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[39]~I .clock_enable_mode = "true";
defparam \kbd_reg[39]~I .lut_mask = "ff00";
defparam \kbd_reg[39]~I .operation_mode = "normal";
defparam \kbd_reg[39]~I .output_mode = "reg_only";
defparam \kbd_reg[39]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_I25
flex10ke_lcell \kbd_reg[33]~I (
// Equation(s):
// kbd_reg_33 = DFFEA(kbd_reg_34, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_34),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_33),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[33]~I .clock_enable_mode = "true";
defparam \kbd_reg[33]~I .lut_mask = "ff00";
defparam \kbd_reg[33]~I .operation_mode = "normal";
defparam \kbd_reg[33]~I .output_mode = "reg_only";
defparam \kbd_reg[33]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_I30
flex10ke_lcell \kbd_reg[38]~I (
// Equation(s):
// kbd_reg_38 = DFFEA(kbd_reg_39, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_39),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_38),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[38]~I .clock_enable_mode = "true";
defparam \kbd_reg[38]~I .lut_mask = "ff00";
defparam \kbd_reg[38]~I .operation_mode = "normal";
defparam \kbd_reg[38]~I .output_mode = "reg_only";
defparam \kbd_reg[38]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I30
flex10ke_lcell \kbd_reg[37]~I (
// Equation(s):
// kbd_reg_37 = DFFEA(kbd_reg_38, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_38),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_37),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[37]~I .clock_enable_mode = "true";
defparam \kbd_reg[37]~I .lut_mask = "ff00";
defparam \kbd_reg[37]~I .operation_mode = "normal";
defparam \kbd_reg[37]~I .output_mode = "reg_only";
defparam \kbd_reg[37]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I25
flex10ke_lcell \kbd_reg[32]~I (
// Equation(s):
// kbd_reg_32 = DFFEA(kbd_reg_33, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_33),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_32),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[32]~I .clock_enable_mode = "true";
defparam \kbd_reg[32]~I .lut_mask = "ff00";
defparam \kbd_reg[32]~I .operation_mode = "normal";
defparam \kbd_reg[32]~I .output_mode = "reg_only";
defparam \kbd_reg[32]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I25
flex10ke_lcell \kbd_reg[35]~I (
// Equation(s):
// kbd_reg_35 = DFFEA(kbd_reg_36, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_36),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_35),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[35]~I .clock_enable_mode = "true";
defparam \kbd_reg[35]~I .lut_mask = "ff00";
defparam \kbd_reg[35]~I .operation_mode = "normal";
defparam \kbd_reg[35]~I .output_mode = "reg_only";
defparam \kbd_reg[35]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I25
flex10ke_lcell \kbd_reg[36]~I (
// Equation(s):
// kbd_reg_36 = DFFEA(kbd_reg_37, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_37),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_36),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[36]~I .clock_enable_mode = "true";
defparam \kbd_reg[36]~I .lut_mask = "ff00";
defparam \kbd_reg[36]~I .operation_mode = "normal";
defparam \kbd_reg[36]~I .output_mode = "reg_only";
defparam \kbd_reg[36]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I35
flex10ke_lcell \kbd_reg[26]~I (
// Equation(s):
// kbd_reg_26 = DFFEA(kbd_reg_27, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_27),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_26),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[26]~I .clock_enable_mode = "true";
defparam \kbd_reg[26]~I .lut_mask = "ff00";
defparam \kbd_reg[26]~I .operation_mode = "normal";
defparam \kbd_reg[26]~I .output_mode = "reg_only";
defparam \kbd_reg[26]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I36
flex10ke_lcell \kbd_reg[31]~I (
// Equation(s):
// kbd_reg_31 = DFFEA(kbd_reg_32, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_32),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_31),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[31]~I .clock_enable_mode = "true";
defparam \kbd_reg[31]~I .lut_mask = "ff00";
defparam \kbd_reg[31]~I .operation_mode = "normal";
defparam \kbd_reg[31]~I .output_mode = "reg_only";
defparam \kbd_reg[31]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I34
flex10ke_lcell \kbd_reg[25]~I (
// Equation(s):
// kbd_reg_25 = DFFEA(kbd_reg_26, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_26),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_25),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[25]~I .clock_enable_mode = "true";
defparam \kbd_reg[25]~I .lut_mask = "ff00";
defparam \kbd_reg[25]~I .operation_mode = "normal";
defparam \kbd_reg[25]~I .output_mode = "reg_only";
defparam \kbd_reg[25]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_I36
flex10ke_lcell \kbd_reg[30]~I (
// Equation(s):
// kbd_reg_30 = DFFEA(kbd_reg_31, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_31),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_30),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[30]~I .clock_enable_mode = "true";
defparam \kbd_reg[30]~I .lut_mask = "ff00";
defparam \kbd_reg[30]~I .operation_mode = "normal";
defparam \kbd_reg[30]~I .output_mode = "reg_only";
defparam \kbd_reg[30]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I36
flex10ke_lcell \kbd_reg[29]~I (
// Equation(s):
// kbd_reg_29 = DFFEA(kbd_reg_30, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_30),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_29),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[29]~I .clock_enable_mode = "true";
defparam \kbd_reg[29]~I .lut_mask = "ff00";
defparam \kbd_reg[29]~I .operation_mode = "normal";
defparam \kbd_reg[29]~I .output_mode = "reg_only";
defparam \kbd_reg[29]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I34
flex10ke_lcell \kbd_reg[24]~I (
// Equation(s):
// kbd_reg_24 = DFFEA(kbd_reg_25, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_25),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_24),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[24]~I .clock_enable_mode = "true";
defparam \kbd_reg[24]~I .lut_mask = "ff00";
defparam \kbd_reg[24]~I .operation_mode = "normal";
defparam \kbd_reg[24]~I .output_mode = "reg_only";
defparam \kbd_reg[24]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I35
flex10ke_lcell \kbd_reg[27]~I (
// Equation(s):
// kbd_reg_27 = DFFEA(kbd_reg_28, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_28),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_27),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[27]~I .clock_enable_mode = "true";
defparam \kbd_reg[27]~I .lut_mask = "ff00";
defparam \kbd_reg[27]~I .operation_mode = "normal";
defparam \kbd_reg[27]~I .output_mode = "reg_only";
defparam \kbd_reg[27]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_I35
flex10ke_lcell \kbd_reg[28]~I (
// Equation(s):
// kbd_reg_28 = DFFEA(kbd_reg_29, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_29),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_28),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[28]~I .clock_enable_mode = "true";
defparam \kbd_reg[28]~I .lut_mask = "ff00";
defparam \kbd_reg[28]~I .operation_mode = "normal";
defparam \kbd_reg[28]~I .output_mode = "reg_only";
defparam \kbd_reg[28]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B22
flex10ke_lcell \kbd_reg[18]~I (
// Equation(s):
// kbd_reg_18 = DFFEA(kbd_reg_19, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_19),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_18),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[18]~I .clock_enable_mode = "true";
defparam \kbd_reg[18]~I .lut_mask = "ff00";
defparam \kbd_reg[18]~I .operation_mode = "normal";
defparam \kbd_reg[18]~I .output_mode = "reg_only";
defparam \kbd_reg[18]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B31
flex10ke_lcell \kbd_reg[23]~I (
// Equation(s):
// kbd_reg_23 = DFFEA(kbd_reg_24, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_24),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_23),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[23]~I .clock_enable_mode = "true";
defparam \kbd_reg[23]~I .lut_mask = "ff00";
defparam \kbd_reg[23]~I .operation_mode = "normal";
defparam \kbd_reg[23]~I .output_mode = "reg_only";
defparam \kbd_reg[23]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_B22
flex10ke_lcell \kbd_reg[17]~I (
// Equation(s):
// kbd_reg_17 = DFFEA(kbd_reg_18, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_18),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_17),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[17]~I .clock_enable_mode = "true";
defparam \kbd_reg[17]~I .lut_mask = "ff00";
defparam \kbd_reg[17]~I .operation_mode = "normal";
defparam \kbd_reg[17]~I .output_mode = "reg_only";
defparam \kbd_reg[17]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_B31
flex10ke_lcell \kbd_reg[22]~I (
// Equation(s):
// kbd_reg_22 = DFFEA(kbd_reg_23, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_23),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_22),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[22]~I .clock_enable_mode = "true";
defparam \kbd_reg[22]~I .lut_mask = "ff00";
defparam \kbd_reg[22]~I .operation_mode = "normal";
defparam \kbd_reg[22]~I .output_mode = "reg_only";
defparam \kbd_reg[22]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_B31
flex10ke_lcell \kbd_reg[21]~I (
// Equation(s):
// kbd_reg_21 = DFFEA(kbd_reg_22, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_22),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_21),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[21]~I .clock_enable_mode = "true";
defparam \kbd_reg[21]~I .lut_mask = "ff00";
defparam \kbd_reg[21]~I .operation_mode = "normal";
defparam \kbd_reg[21]~I .output_mode = "reg_only";
defparam \kbd_reg[21]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B22
flex10ke_lcell \kbd_reg[16]~I (
// Equation(s):
// kbd_reg_16 = DFFEA(kbd_reg_17, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_17),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_16),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[16]~I .clock_enable_mode = "true";
defparam \kbd_reg[16]~I .lut_mask = "ff00";
defparam \kbd_reg[16]~I .operation_mode = "normal";
defparam \kbd_reg[16]~I .output_mode = "reg_only";
defparam \kbd_reg[16]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B27
flex10ke_lcell \kbd_reg[19]~I (
// Equation(s):
// kbd_reg_19 = DFFEA(kbd_reg_20, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_20),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_19),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[19]~I .clock_enable_mode = "true";
defparam \kbd_reg[19]~I .lut_mask = "ff00";
defparam \kbd_reg[19]~I .operation_mode = "normal";
defparam \kbd_reg[19]~I .output_mode = "reg_only";
defparam \kbd_reg[19]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B31
flex10ke_lcell \kbd_reg[20]~I (
// Equation(s):
// kbd_reg_20 = DFFEA(kbd_reg_21, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_21),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_20),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[20]~I .clock_enable_mode = "true";
defparam \kbd_reg[20]~I .lut_mask = "ff00";
defparam \kbd_reg[20]~I .operation_mode = "normal";
defparam \kbd_reg[20]~I .output_mode = "reg_only";
defparam \kbd_reg[20]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B24
flex10ke_lcell \kbd_reg[10]~I (
// Equation(s):
// kbd_reg_10 = DFFEA(kbd_reg_11, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_10),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[10]~I .clock_enable_mode = "true";
defparam \kbd_reg[10]~I .lut_mask = "ff00";
defparam \kbd_reg[10]~I .operation_mode = "normal";
defparam \kbd_reg[10]~I .output_mode = "reg_only";
defparam \kbd_reg[10]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B25
flex10ke_lcell \kbd_reg[15]~I (
// Equation(s):
// kbd_reg_15 = DFFEA(kbd_reg_16, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_16),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_15),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[15]~I .clock_enable_mode = "true";
defparam \kbd_reg[15]~I .lut_mask = "ff00";
defparam \kbd_reg[15]~I .operation_mode = "normal";
defparam \kbd_reg[15]~I .output_mode = "reg_only";
defparam \kbd_reg[15]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_B24
flex10ke_lcell \kbd_reg[9]~I (
// Equation(s):
// kbd_reg_9 = DFFEA(kbd_reg_10, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_10),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_9),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[9]~I .clock_enable_mode = "true";
defparam \kbd_reg[9]~I .lut_mask = "ff00";
defparam \kbd_reg[9]~I .operation_mode = "normal";
defparam \kbd_reg[9]~I .output_mode = "reg_only";
defparam \kbd_reg[9]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B25
flex10ke_lcell \kbd_reg[14]~I (
// Equation(s):
// kbd_reg_14 = DFFEA(kbd_reg_15, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_14),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[14]~I .clock_enable_mode = "true";
defparam \kbd_reg[14]~I .lut_mask = "ff00";
defparam \kbd_reg[14]~I .operation_mode = "normal";
defparam \kbd_reg[14]~I .output_mode = "reg_only";
defparam \kbd_reg[14]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B25
flex10ke_lcell \kbd_reg[13]~I (
// Equation(s):
// kbd_reg_13 = DFFEA(kbd_reg_14, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_13),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[13]~I .clock_enable_mode = "true";
defparam \kbd_reg[13]~I .lut_mask = "ff00";
defparam \kbd_reg[13]~I .operation_mode = "normal";
defparam \kbd_reg[13]~I .output_mode = "reg_only";
defparam \kbd_reg[13]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B24
flex10ke_lcell \kbd_reg[8]~I (
// Equation(s):
// kbd_reg_8 = DFFEA(kbd_reg_9, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_9),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_8),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[8]~I .clock_enable_mode = "true";
defparam \kbd_reg[8]~I .lut_mask = "ff00";
defparam \kbd_reg[8]~I .operation_mode = "normal";
defparam \kbd_reg[8]~I .output_mode = "reg_only";
defparam \kbd_reg[8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_B29
flex10ke_lcell \kbd_reg[11]~I (
// Equation(s):
// kbd_reg_11 = DFFEA(kbd_reg_12, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_12),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_11),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[11]~I .clock_enable_mode = "true";
defparam \kbd_reg[11]~I .lut_mask = "ff00";
defparam \kbd_reg[11]~I .operation_mode = "normal";
defparam \kbd_reg[11]~I .output_mode = "reg_only";
defparam \kbd_reg[11]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_B29
flex10ke_lcell \kbd_reg[12]~I (
// Equation(s):
// kbd_reg_12 = DFFEA(kbd_reg_13, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_13),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_12),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[12]~I .clock_enable_mode = "true";
defparam \kbd_reg[12]~I .lut_mask = "ff00";
defparam \kbd_reg[12]~I .operation_mode = "normal";
defparam \kbd_reg[12]~I .output_mode = "reg_only";
defparam \kbd_reg[12]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A33
flex10ke_lcell \kbd_reg[2]~I (
// Equation(s):
// kbd_reg_2 = DFFEA(kbd_reg_3, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[2]~I .clock_enable_mode = "true";
defparam \kbd_reg[2]~I .lut_mask = "ff00";
defparam \kbd_reg[2]~I .operation_mode = "normal";
defparam \kbd_reg[2]~I .output_mode = "reg_only";
defparam \kbd_reg[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B26
flex10ke_lcell \kbd_reg[7]~I (
// Equation(s):
// kbd_reg_7 = DFFEA(kbd_reg_8, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_8),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[7]~I .clock_enable_mode = "true";
defparam \kbd_reg[7]~I .lut_mask = "ff00";
defparam \kbd_reg[7]~I .operation_mode = "normal";
defparam \kbd_reg[7]~I .output_mode = "reg_only";
defparam \kbd_reg[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A33
flex10ke_lcell \kbd_reg[1]~I (
// Equation(s):
// kbd_reg_1 = DFFEA(kbd_reg_2, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[1]~I .clock_enable_mode = "true";
defparam \kbd_reg[1]~I .lut_mask = "ff00";
defparam \kbd_reg[1]~I .operation_mode = "normal";
defparam \kbd_reg[1]~I .output_mode = "reg_only";
defparam \kbd_reg[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_A32
flex10ke_lcell \kbd_reg[6]~I (
// Equation(s):
// kbd_reg_6 = DFFEA(kbd_reg_7, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[6]~I .clock_enable_mode = "true";
defparam \kbd_reg[6]~I .lut_mask = "ff00";
defparam \kbd_reg[6]~I .operation_mode = "normal";
defparam \kbd_reg[6]~I .output_mode = "reg_only";
defparam \kbd_reg[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_A32
flex10ke_lcell \kbd_reg[5]~I (
// Equation(s):
// kbd_reg_5 = DFFEA(kbd_reg_6, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[5]~I .clock_enable_mode = "true";
defparam \kbd_reg[5]~I .lut_mask = "ff00";
defparam \kbd_reg[5]~I .operation_mode = "normal";
defparam \kbd_reg[5]~I .output_mode = "reg_only";
defparam \kbd_reg[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A33
flex10ke_lcell \kbd_reg[0]~I (
// Equation(s):
// kbd_reg_0 = DFFEA(kbd_reg_1, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[0]~I .clock_enable_mode = "true";
defparam \kbd_reg[0]~I .lut_mask = "ff00";
defparam \kbd_reg[0]~I .operation_mode = "normal";
defparam \kbd_reg[0]~I .output_mode = "reg_only";
defparam \kbd_reg[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_A33
flex10ke_lcell \kbd_reg[3]~I (
// Equation(s):
// kbd_reg_3 = DFFEA(kbd_reg_4, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[3]~I .clock_enable_mode = "true";
defparam \kbd_reg[3]~I .lut_mask = "ff00";
defparam \kbd_reg[3]~I .operation_mode = "normal";
defparam \kbd_reg[3]~I .output_mode = "reg_only";
defparam \kbd_reg[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A32
flex10ke_lcell \kbd_reg[4]~I (
// Equation(s):
// kbd_reg_4 = DFFEA(kbd_reg_5, GLOBAL(\fclk~dataout ), , , \always4~107 , , )

        .dataa(\always4~107 ),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_reg_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd_reg[4]~I .clock_enable_mode = "true";
defparam \kbd_reg[4]~I .lut_mask = "ff00";
defparam \kbd_reg[4]~I .operation_mode = "normal";
defparam \kbd_reg[4]~I .output_mode = "reg_only";
defparam \kbd_reg[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D32
flex10ke_lcell \spick_sync[0]~I (
// Equation(s):
// spick_sync[0] = DFFEA(\spick~dataout , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(spick),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(spick_sync[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \spick_sync[0]~I .clock_enable_mode = "false";
defparam \spick_sync[0]~I .lut_mask = "ff00";
defparam \spick_sync[0]~I .operation_mode = "normal";
defparam \spick_sync[0]~I .output_mode = "reg_only";
defparam \spick_sync[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D32
flex10ke_lcell \spick_sync[1]~I (
// Equation(s):
// spick_sync[1] = DFFEA(spick_sync[0], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(spick_sync[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(spick_sync[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \spick_sync[1]~I .clock_enable_mode = "false";
defparam \spick_sync[1]~I .lut_mask = "ff00";
defparam \spick_sync[1]~I .operation_mode = "normal";
defparam \spick_sync[1]~I .output_mode = "reg_only";
defparam \spick_sync[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D36
flex10ke_lcell \spick_sync[2]~I (
// Equation(s):
// spick_sync[2] = DFFEA(spick_sync[1], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(spick_sync[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(spick_sync[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \spick_sync[2]~I .clock_enable_mode = "false";
defparam \spick_sync[2]~I .lut_mask = "ff00";
defparam \spick_sync[2]~I .operation_mode = "normal";
defparam \spick_sync[2]~I .output_mode = "reg_only";
defparam \spick_sync[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J23
flex10ke_lcell \spido_sync[0]~I (
// Equation(s):
// spido_sync[0] = DFFEA(\spido~dataout , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(spido),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(spido_sync[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \spido_sync[0]~I .clock_enable_mode = "false";
defparam \spido_sync[0]~I .lut_mask = "ff00";
defparam \spido_sync[0]~I .operation_mode = "normal";
defparam \spido_sync[0]~I .output_mode = "reg_only";
defparam \spido_sync[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J23
flex10ke_lcell \spido_sync[1]~I (
// Equation(s):
// spido_sync[1] = DFFEA(spido_sync[0], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(spido_sync[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(spido_sync[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \spido_sync[1]~I .clock_enable_mode = "false";
defparam \spido_sync[1]~I .lut_mask = "ff00";
defparam \spido_sync[1]~I .operation_mode = "normal";
defparam \spido_sync[1]~I .output_mode = "reg_only";
defparam \spido_sync[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D29
flex10ke_lcell \regnum[7]~I (
// Equation(s):
// regnum[7] = DFFEA(spido_sync[1] & (spics_n_sync_2 # !spics_n_sync_1), GLOBAL(\fclk~dataout ), , , \regnum[7]~561 , , )

        .dataa(\regnum[7]~561 ),
        .datab(spics_n_sync_1),
        .datac(spido_sync[1]),
        .datad(spics_n_sync_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(regnum[7]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \regnum[7]~I .clock_enable_mode = "true";
defparam \regnum[7]~I .lut_mask = "f030";
defparam \regnum[7]~I .operation_mode = "normal";
defparam \regnum[7]~I .output_mode = "reg_only";
defparam \regnum[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D29
flex10ke_lcell \regnum[6]~I (
// Equation(s):
// regnum[6] = DFFEA(regnum[7] & (spics_n_sync_2 # !spics_n_sync_1), GLOBAL(\fclk~dataout ), , , \regnum[7]~561 , , )

        .dataa(\regnum[7]~561 ),
        .datab(spics_n_sync_1),
        .datac(regnum[7]),
        .datad(spics_n_sync_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(regnum[6]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \regnum[6]~I .clock_enable_mode = "true";
defparam \regnum[6]~I .lut_mask = "f030";
defparam \regnum[6]~I .operation_mode = "normal";
defparam \regnum[6]~I .output_mode = "reg_only";
defparam \regnum[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D34
flex10ke_lcell \regnum[5]~I (
// Equation(s):
// regnum[5] = DFFEA(regnum[6] & (spics_n_sync_2 # !spics_n_sync_1), GLOBAL(\fclk~dataout ), , , \regnum[7]~561 , , )

        .dataa(\regnum[7]~561 ),
        .datab(spics_n_sync_1),
        .datac(regnum[6]),
        .datad(spics_n_sync_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(regnum[5]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \regnum[5]~I .clock_enable_mode = "true";
defparam \regnum[5]~I .lut_mask = "f030";
defparam \regnum[5]~I .operation_mode = "normal";
defparam \regnum[5]~I .output_mode = "reg_only";
defparam \regnum[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D29
flex10ke_lcell \regnum[4]~I (
// Equation(s):
// regnum[4] = DFFEA(regnum[5] & (spics_n_sync_2 # !spics_n_sync_1), GLOBAL(\fclk~dataout ), , , \regnum[7]~561 , , )

        .dataa(\regnum[7]~561 ),
        .datab(spics_n_sync_1),
        .datac(regnum[5]),
        .datad(spics_n_sync_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(regnum[4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \regnum[4]~I .clock_enable_mode = "true";
defparam \regnum[4]~I .lut_mask = "f030";
defparam \regnum[4]~I .operation_mode = "normal";
defparam \regnum[4]~I .output_mode = "reg_only";
defparam \regnum[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D29
flex10ke_lcell \regnum[3]~I (
// Equation(s):
// regnum[3] = DFFEA(regnum[4] & (spics_n_sync_2 # !spics_n_sync_1), GLOBAL(\fclk~dataout ), , , \regnum[7]~561 , , )

        .dataa(\regnum[7]~561 ),
        .datab(spics_n_sync_1),
        .datac(regnum[4]),
        .datad(spics_n_sync_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(regnum[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \regnum[3]~I .clock_enable_mode = "true";
defparam \regnum[3]~I .lut_mask = "f030";
defparam \regnum[3]~I .operation_mode = "normal";
defparam \regnum[3]~I .output_mode = "reg_only";
defparam \regnum[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D33
flex10ke_lcell \regnum[2]~I (
// Equation(s):
// regnum[2] = DFFEA(regnum[3] & (spics_n_sync_2 # !spics_n_sync_1), GLOBAL(\fclk~dataout ), , , \regnum[7]~561 , , )

        .dataa(\regnum[7]~561 ),
        .datab(spics_n_sync_1),
        .datac(regnum[3]),
        .datad(spics_n_sync_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(regnum[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \regnum[2]~I .clock_enable_mode = "true";
defparam \regnum[2]~I .lut_mask = "f030";
defparam \regnum[2]~I .operation_mode = "normal";
defparam \regnum[2]~I .output_mode = "reg_only";
defparam \regnum[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D33
flex10ke_lcell \regnum[1]~I (
// Equation(s):
// regnum[1] = DFFEA(regnum[2] & (spics_n_sync_2 # !spics_n_sync_1), GLOBAL(\fclk~dataout ), , , \regnum[7]~561 , , )

        .dataa(\regnum[7]~561 ),
        .datab(spics_n_sync_1),
        .datac(regnum[2]),
        .datad(spics_n_sync_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(regnum[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \regnum[1]~I .clock_enable_mode = "true";
defparam \regnum[1]~I .lut_mask = "f030";
defparam \regnum[1]~I .operation_mode = "normal";
defparam \regnum[1]~I .output_mode = "reg_only";
defparam \regnum[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D33
flex10ke_lcell \regnum[0]~I (
// Equation(s):
// regnum[0] = DFFEA(regnum[1] & (spics_n_sync_2 # !spics_n_sync_1), GLOBAL(\fclk~dataout ), , , \regnum[7]~561 , , )

        .dataa(\regnum[7]~561 ),
        .datab(spics_n_sync_1),
        .datac(regnum[1]),
        .datad(spics_n_sync_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(regnum[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \regnum[0]~I .clock_enable_mode = "true";
defparam \regnum[0]~I .lut_mask = "f030";
defparam \regnum[0]~I .operation_mode = "normal";
defparam \regnum[0]~I .output_mode = "reg_only";
defparam \regnum[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D6
flex10ke_lcell \shift_out~4963_I (
// Equation(s):
// \shift_out~4963  = regnum[0] & (regnum[1]) # !regnum[0] & (comport_addr_2 # !regnum[1]) # !\sel_comadr~29 

        .dataa(\sel_comadr~29 ),
        .datab(regnum[0]),
        .datac(comport_addr_2),
        .datad(regnum[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4963 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4963_I .clock_enable_mode = "false";
defparam \shift_out~4963_I .lut_mask = "fd77";
defparam \shift_out~4963_I .operation_mode = "normal";
defparam \shift_out~4963_I .output_mode = "comb_only";
defparam \shift_out~4963_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D29
flex10ke_lcell \sel_comadr~29_I (
// Equation(s):
// \sel_comadr~29  = !regnum[4] & !regnum[7] & !regnum[5] & regnum[6]

        .dataa(regnum[4]),
        .datab(regnum[7]),
        .datac(regnum[5]),
        .datad(regnum[6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\sel_comadr~29 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sel_comadr~29_I .clock_enable_mode = "false";
defparam \sel_comadr~29_I .lut_mask = "0100";
defparam \sel_comadr~29_I .operation_mode = "normal";
defparam \sel_comadr~29_I .output_mode = "comb_only";
defparam \sel_comadr~29_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D25
flex10ke_lcell \shift_out~4962_I (
// Equation(s):
// \shift_out~4962  = !regnum[1] & gluclock_addr_2 & \sel_comadr~29  & regnum[0]

        .dataa(regnum[1]),
        .datab(gluclock_addr_2),
        .datac(\sel_comadr~29 ),
        .datad(regnum[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4962 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4962_I .clock_enable_mode = "false";
defparam \shift_out~4962_I .lut_mask = "4000";
defparam \shift_out~4962_I .operation_mode = "normal";
defparam \shift_out~4962_I .output_mode = "comb_only";
defparam \shift_out~4962_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D28
flex10ke_lcell \shift_out~4964_I (
// Equation(s):
// \shift_out~4964  = sel_waitreg & (wait_write_2) # !sel_waitreg & (\shift_out~4963  # \shift_out~4962 )

        .dataa(sel_waitreg),
        .datab(\shift_out~4963 ),
        .datac(\shift_out~4962 ),
        .datad(wait_write_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4964 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4964_I .clock_enable_mode = "false";
defparam \shift_out~4964_I .lut_mask = "fe54";
defparam \shift_out~4964_I .operation_mode = "normal";
defparam \shift_out~4964_I .output_mode = "comb_only";
defparam \shift_out~4964_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D25
flex10ke_lcell \shift_out~4967_I (
// Equation(s):
// \shift_out~4967  = regnum[1] & (regnum[0]) # !regnum[1] & (gluclock_addr_3 # !regnum[0]) # !\sel_comadr~29 

        .dataa(\sel_comadr~29 ),
        .datab(regnum[1]),
        .datac(gluclock_addr_3),
        .datad(regnum[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4967 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4967_I .clock_enable_mode = "false";
defparam \shift_out~4967_I .lut_mask = "fd77";
defparam \shift_out~4967_I .operation_mode = "normal";
defparam \shift_out~4967_I .output_mode = "comb_only";
defparam \shift_out~4967_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D28
flex10ke_lcell \shift_out~4968_I (
// Equation(s):
// \shift_out~4968  = sel_waitreg & (wait_write_3) # !sel_waitreg & \shift_out~4967 

        .dataa(vcc),
        .datab(sel_waitreg),
        .datac(\shift_out~4967 ),
        .datad(wait_write_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4968 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4968_I .clock_enable_mode = "false";
defparam \shift_out~4968_I .lut_mask = "fc30";
defparam \shift_out~4968_I .operation_mode = "normal";
defparam \shift_out~4968_I .output_mode = "comb_only";
defparam \shift_out~4968_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D30
flex10ke_lcell \shift_out~4971_I (
// Equation(s):
// \shift_out~4971  = regnum[1] & (regnum[0]) # !regnum[1] & (gluclock_addr_4 # !regnum[0]) # !\sel_comadr~29 

        .dataa(\sel_comadr~29 ),
        .datab(regnum[1]),
        .datac(gluclock_addr_4),
        .datad(regnum[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4971 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4971_I .clock_enable_mode = "false";
defparam \shift_out~4971_I .lut_mask = "fd77";
defparam \shift_out~4971_I .operation_mode = "normal";
defparam \shift_out~4971_I .output_mode = "comb_only";
defparam \shift_out~4971_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D30
flex10ke_lcell \shift_out~4972_I (
// Equation(s):
// \shift_out~4972  = sel_waitreg & (wait_write_4) # !sel_waitreg & \shift_out~4971 

        .dataa(vcc),
        .datab(sel_waitreg),
        .datac(\shift_out~4971 ),
        .datad(wait_write_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4972 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4972_I .clock_enable_mode = "false";
defparam \shift_out~4972_I .lut_mask = "fc30";
defparam \shift_out~4972_I .operation_mode = "normal";
defparam \shift_out~4972_I .output_mode = "comb_only";
defparam \shift_out~4972_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D30
flex10ke_lcell \shift_out~4975_I (
// Equation(s):
// \shift_out~4975  = regnum[1] & (regnum[0]) # !regnum[1] & (gluclock_addr_5 # !regnum[0]) # !\sel_comadr~29 

        .dataa(\sel_comadr~29 ),
        .datab(regnum[1]),
        .datac(gluclock_addr_5),
        .datad(regnum[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4975 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4975_I .clock_enable_mode = "false";
defparam \shift_out~4975_I .lut_mask = "fd77";
defparam \shift_out~4975_I .operation_mode = "normal";
defparam \shift_out~4975_I .output_mode = "comb_only";
defparam \shift_out~4975_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D30
flex10ke_lcell \shift_out~4976_I (
// Equation(s):
// \shift_out~4976  = sel_waitreg & (wait_write_5) # !sel_waitreg & \shift_out~4975 

        .dataa(vcc),
        .datab(sel_waitreg),
        .datac(\shift_out~4975 ),
        .datad(wait_write_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4976 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4976_I .clock_enable_mode = "false";
defparam \shift_out~4976_I .lut_mask = "fc30";
defparam \shift_out~4976_I .operation_mode = "normal";
defparam \shift_out~4976_I .output_mode = "comb_only";
defparam \shift_out~4976_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D25
flex10ke_lcell \shift_out~4979_I (
// Equation(s):
// \shift_out~4979  = regnum[1] & (regnum[0]) # !regnum[1] & (gluclock_addr_6 # !regnum[0]) # !\sel_comadr~29 

        .dataa(\sel_comadr~29 ),
        .datab(regnum[1]),
        .datac(gluclock_addr_6),
        .datad(regnum[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4979 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4979_I .clock_enable_mode = "false";
defparam \shift_out~4979_I .lut_mask = "fd77";
defparam \shift_out~4979_I .operation_mode = "normal";
defparam \shift_out~4979_I .output_mode = "comb_only";
defparam \shift_out~4979_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D14
flex10ke_lcell \shift_out~4980_I (
// Equation(s):
// \shift_out~4980  = sel_waitreg & (wait_write_6) # !sel_waitreg & \shift_out~4979 

        .dataa(vcc),
        .datab(sel_waitreg),
        .datac(\shift_out~4979 ),
        .datad(wait_write_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4980 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4980_I .clock_enable_mode = "false";
defparam \shift_out~4980_I .lut_mask = "fc30";
defparam \shift_out~4980_I .operation_mode = "normal";
defparam \shift_out~4980_I .output_mode = "comb_only";
defparam \shift_out~4980_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D1
flex10ke_lcell \shift_out[7]~4984_I (
// Equation(s):
// \shift_out[7]~4984  = regnum[1] & (regnum[0]) # !regnum[1] & (gluclock_addr_7 # !regnum[0]) # !\sel_comadr~29 

        .dataa(\sel_comadr~29 ),
        .datab(regnum[1]),
        .datac(gluclock_addr_7),
        .datad(regnum[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out[7]~4984 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out[7]~4984_I .clock_enable_mode = "false";
defparam \shift_out[7]~4984_I .lut_mask = "fd77";
defparam \shift_out[7]~4984_I .operation_mode = "normal";
defparam \shift_out[7]~4984_I .output_mode = "comb_only";
defparam \shift_out[7]~4984_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D14
flex10ke_lcell \shift_out[7]~4985_I (
// Equation(s):
// \shift_out[7]~4985  = sel_waitreg & (wait_write_7) # !sel_waitreg & \shift_out[7]~4984 

        .dataa(vcc),
        .datab(sel_waitreg),
        .datac(\shift_out[7]~4984 ),
        .datad(wait_write_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out[7]~4985 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out[7]~4985_I .clock_enable_mode = "false";
defparam \shift_out[7]~4985_I .lut_mask = "fc30";
defparam \shift_out[7]~4985_I .operation_mode = "normal";
defparam \shift_out[7]~4985_I .output_mode = "comb_only";
defparam \shift_out[7]~4985_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D14
flex10ke_lcell \shift_out[7]~4986_I (
// Equation(s):
// \shift_out[7]~4986  = spics_n_sync_2 & !spics_n_sync_1 & (\shift_out[7]~4985 ) # !spics_n_sync_2 & spics_n_sync_1 & wait_rnw

        .dataa(spics_n_sync_2),
        .datab(spics_n_sync_1),
        .datac(wait_rnw),
        .datad(\shift_out[7]~4985 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out[7]~4986 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out[7]~4986_I .clock_enable_mode = "false";
defparam \shift_out[7]~4986_I .lut_mask = "6240";
defparam \shift_out[7]~4986_I .operation_mode = "normal";
defparam \shift_out[7]~4986_I .output_mode = "comb_only";
defparam \shift_out[7]~4986_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D14
flex10ke_lcell \shift_out[7]~I (
// Equation(s):
// shift_out[7] = DFFEA(\shift_out[7]~4986 , GLOBAL(\fclk~dataout ), , , \shift_out[7]~4987 , , )

        .dataa(\shift_out[7]~4987 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\shift_out[7]~4986 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shift_out[7]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out[7]~I .clock_enable_mode = "true";
defparam \shift_out[7]~I .lut_mask = "ff00";
defparam \shift_out[7]~I .operation_mode = "normal";
defparam \shift_out[7]~I .output_mode = "reg_only";
defparam \shift_out[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D14
flex10ke_lcell \shift_out~4978_I (
// Equation(s):
// \shift_out~4978  = spick_sync[2] & (shift_out[6]) # !spick_sync[2] & (spick_sync[1] & shift_out[7] # !spick_sync[1] & (shift_out[6]))

        .dataa(spick_sync[2]),
        .datab(spick_sync[1]),
        .datac(shift_out[7]),
        .datad(shift_out[6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4978 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4978_I .clock_enable_mode = "false";
defparam \shift_out~4978_I .lut_mask = "fb40";
defparam \shift_out~4978_I .operation_mode = "normal";
defparam \shift_out~4978_I .output_mode = "comb_only";
defparam \shift_out~4978_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D14
flex10ke_lcell \shift_out[6]~I (
// Equation(s):
// shift_out[6] = DFFEA(spics_n_sync_1 & (spics_n_sync_2 & \shift_out~4978 ) # !spics_n_sync_1 & (spics_n_sync_2 & \shift_out~4980  # !spics_n_sync_2 & (\shift_out~4978 )), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(spics_n_sync_1),
        .datab(\shift_out~4980 ),
        .datac(spics_n_sync_2),
        .datad(\shift_out~4978 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shift_out[6]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out[6]~I .clock_enable_mode = "false";
defparam \shift_out[6]~I .lut_mask = "e540";
defparam \shift_out[6]~I .operation_mode = "normal";
defparam \shift_out[6]~I .output_mode = "reg_only";
defparam \shift_out[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D36
flex10ke_lcell \shift_out~4974_I (
// Equation(s):
// \shift_out~4974  = spick_sync[2] & (shift_out[5]) # !spick_sync[2] & (spick_sync[1] & shift_out[6] # !spick_sync[1] & (shift_out[5]))

        .dataa(spick_sync[2]),
        .datab(spick_sync[1]),
        .datac(shift_out[6]),
        .datad(shift_out[5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4974 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4974_I .clock_enable_mode = "false";
defparam \shift_out~4974_I .lut_mask = "fb40";
defparam \shift_out~4974_I .operation_mode = "normal";
defparam \shift_out~4974_I .output_mode = "comb_only";
defparam \shift_out~4974_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D36
flex10ke_lcell \shift_out[5]~I (
// Equation(s):
// shift_out[5] = DFFEA(spics_n_sync_1 & (spics_n_sync_2 & \shift_out~4974 ) # !spics_n_sync_1 & (spics_n_sync_2 & \shift_out~4976  # !spics_n_sync_2 & (\shift_out~4974 )), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(spics_n_sync_1),
        .datab(\shift_out~4976 ),
        .datac(spics_n_sync_2),
        .datad(\shift_out~4974 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shift_out[5]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out[5]~I .clock_enable_mode = "false";
defparam \shift_out[5]~I .lut_mask = "e540";
defparam \shift_out[5]~I .operation_mode = "normal";
defparam \shift_out[5]~I .output_mode = "reg_only";
defparam \shift_out[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D36
flex10ke_lcell \shift_out~4970_I (
// Equation(s):
// \shift_out~4970  = spick_sync[2] & (shift_out[4]) # !spick_sync[2] & (spick_sync[1] & shift_out[5] # !spick_sync[1] & (shift_out[4]))

        .dataa(spick_sync[2]),
        .datab(spick_sync[1]),
        .datac(shift_out[5]),
        .datad(shift_out[4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4970 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4970_I .clock_enable_mode = "false";
defparam \shift_out~4970_I .lut_mask = "fb40";
defparam \shift_out~4970_I .operation_mode = "normal";
defparam \shift_out~4970_I .output_mode = "comb_only";
defparam \shift_out~4970_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D36
flex10ke_lcell \shift_out[4]~I (
// Equation(s):
// shift_out[4] = DFFEA(spics_n_sync_1 & (spics_n_sync_2 & \shift_out~4970 ) # !spics_n_sync_1 & (spics_n_sync_2 & \shift_out~4972  # !spics_n_sync_2 & (\shift_out~4970 )), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(spics_n_sync_1),
        .datab(\shift_out~4972 ),
        .datac(spics_n_sync_2),
        .datad(\shift_out~4970 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shift_out[4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out[4]~I .clock_enable_mode = "false";
defparam \shift_out[4]~I .lut_mask = "e540";
defparam \shift_out[4]~I .operation_mode = "normal";
defparam \shift_out[4]~I .output_mode = "reg_only";
defparam \shift_out[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D28
flex10ke_lcell \shift_out~4966_I (
// Equation(s):
// \shift_out~4966  = spick_sync[2] & (shift_out[3]) # !spick_sync[2] & (spick_sync[1] & shift_out[4] # !spick_sync[1] & (shift_out[3]))

        .dataa(spick_sync[2]),
        .datab(spick_sync[1]),
        .datac(shift_out[4]),
        .datad(shift_out[3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4966 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4966_I .clock_enable_mode = "false";
defparam \shift_out~4966_I .lut_mask = "fb40";
defparam \shift_out~4966_I .operation_mode = "normal";
defparam \shift_out~4966_I .output_mode = "comb_only";
defparam \shift_out~4966_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D28
flex10ke_lcell \shift_out[3]~I (
// Equation(s):
// shift_out[3] = DFFEA(spics_n_sync_1 & (spics_n_sync_2 & \shift_out~4966 ) # !spics_n_sync_1 & (spics_n_sync_2 & \shift_out~4968  # !spics_n_sync_2 & (\shift_out~4966 )), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(spics_n_sync_1),
        .datab(\shift_out~4968 ),
        .datac(spics_n_sync_2),
        .datad(\shift_out~4966 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shift_out[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out[3]~I .clock_enable_mode = "false";
defparam \shift_out[3]~I .lut_mask = "e540";
defparam \shift_out[3]~I .operation_mode = "normal";
defparam \shift_out[3]~I .output_mode = "reg_only";
defparam \shift_out[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D28
flex10ke_lcell \shift_out~4961_I (
// Equation(s):
// \shift_out~4961  = spick_sync[2] & (shift_out[2]) # !spick_sync[2] & (spick_sync[1] & shift_out[3] # !spick_sync[1] & (shift_out[2]))

        .dataa(spick_sync[2]),
        .datab(spick_sync[1]),
        .datac(shift_out[3]),
        .datad(shift_out[2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4961 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4961_I .clock_enable_mode = "false";
defparam \shift_out~4961_I .lut_mask = "fb40";
defparam \shift_out~4961_I .operation_mode = "normal";
defparam \shift_out~4961_I .output_mode = "comb_only";
defparam \shift_out~4961_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D28
flex10ke_lcell \shift_out[2]~I (
// Equation(s):
// shift_out[2] = DFFEA(spics_n_sync_1 & (spics_n_sync_2 & \shift_out~4961 ) # !spics_n_sync_1 & (spics_n_sync_2 & \shift_out~4964  # !spics_n_sync_2 & (\shift_out~4961 )), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(spics_n_sync_1),
        .datab(\shift_out~4964 ),
        .datac(spics_n_sync_2),
        .datad(\shift_out~4961 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shift_out[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out[2]~I .clock_enable_mode = "false";
defparam \shift_out[2]~I .lut_mask = "e540";
defparam \shift_out[2]~I .operation_mode = "normal";
defparam \shift_out[2]~I .output_mode = "reg_only";
defparam \shift_out[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D2
flex10ke_lcell \shift_out~4959_I (
// Equation(s):
// \shift_out~4959  = spick_sync[2] & (shift_out[1]) # !spick_sync[2] & (spick_sync[1] & shift_out[2] # !spick_sync[1] & (shift_out[1]))

        .dataa(spick_sync[2]),
        .datab(spick_sync[1]),
        .datac(shift_out[2]),
        .datad(shift_out[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4959 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4959_I .clock_enable_mode = "false";
defparam \shift_out~4959_I .lut_mask = "fb40";
defparam \shift_out~4959_I .operation_mode = "normal";
defparam \shift_out~4959_I .output_mode = "comb_only";
defparam \shift_out~4959_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D6
flex10ke_lcell \shift_out~4956_I (
// Equation(s):
// \shift_out~4956  = regnum[0] & (regnum[1]) # !regnum[0] & (comport_addr_1 # !regnum[1]) # !\sel_comadr~29 

        .dataa(\sel_comadr~29 ),
        .datab(regnum[0]),
        .datac(comport_addr_1),
        .datad(regnum[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4956 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4956_I .clock_enable_mode = "false";
defparam \shift_out~4956_I .lut_mask = "fd77";
defparam \shift_out~4956_I .operation_mode = "normal";
defparam \shift_out~4956_I .output_mode = "comb_only";
defparam \shift_out~4956_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D6
flex10ke_lcell \shift_out~4955_I (
// Equation(s):
// \shift_out~4955  = !regnum[1] & gluclock_addr_1 & \sel_comadr~29  & regnum[0]

        .dataa(regnum[1]),
        .datab(gluclock_addr_1),
        .datac(\sel_comadr~29 ),
        .datad(regnum[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4955 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4955_I .clock_enable_mode = "false";
defparam \shift_out~4955_I .lut_mask = "4000";
defparam \shift_out~4955_I .operation_mode = "normal";
defparam \shift_out~4955_I .output_mode = "comb_only";
defparam \shift_out~4955_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D6
flex10ke_lcell \shift_out~4957_I (
// Equation(s):
// \shift_out~4957  = sel_waitreg & (wait_write_1) # !sel_waitreg & (\shift_out~4956  # \shift_out~4955 )

        .dataa(sel_waitreg),
        .datab(\shift_out~4956 ),
        .datac(\shift_out~4955 ),
        .datad(wait_write_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4957 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4957_I .clock_enable_mode = "false";
defparam \shift_out~4957_I .lut_mask = "fe54";
defparam \shift_out~4957_I .operation_mode = "normal";
defparam \shift_out~4957_I .output_mode = "comb_only";
defparam \shift_out~4957_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D2
flex10ke_lcell \shift_out~4958_I (
// Equation(s):
// \shift_out~4958  = spics_n_sync_2 & !spics_n_sync_1 & (\shift_out~4957 ) # !spics_n_sync_2 & spics_n_sync_1 & waits_1

        .dataa(spics_n_sync_2),
        .datab(spics_n_sync_1),
        .datac(waits_1),
        .datad(\shift_out~4957 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4958 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4958_I .clock_enable_mode = "false";
defparam \shift_out~4958_I .lut_mask = "6240";
defparam \shift_out~4958_I .operation_mode = "normal";
defparam \shift_out~4958_I .output_mode = "comb_only";
defparam \shift_out~4958_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D2
flex10ke_lcell \shift_out[1]~I (
// Equation(s):
// shift_out[1] = DFFEA(\shift_out~4958  # \shift_out~4959  & (spics_n_sync_2 $ !spics_n_sync_1), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(spics_n_sync_2),
        .datab(spics_n_sync_1),
        .datac(\shift_out~4959 ),
        .datad(\shift_out~4958 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shift_out[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out[1]~I .clock_enable_mode = "false";
defparam \shift_out[1]~I .lut_mask = "ff90";
defparam \shift_out[1]~I .operation_mode = "normal";
defparam \shift_out[1]~I .output_mode = "reg_only";
defparam \shift_out[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D2
flex10ke_lcell \shift_out~4953_I (
// Equation(s):
// \shift_out~4953  = spick_sync[2] & (shift_out_0) # !spick_sync[2] & (spick_sync[1] & shift_out[1] # !spick_sync[1] & (shift_out_0))

        .dataa(spick_sync[2]),
        .datab(spick_sync[1]),
        .datac(shift_out[1]),
        .datad(shift_out_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4953 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4953_I .clock_enable_mode = "false";
defparam \shift_out~4953_I .lut_mask = "fb40";
defparam \shift_out~4953_I .operation_mode = "normal";
defparam \shift_out~4953_I .output_mode = "comb_only";
defparam \shift_out~4953_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D13
flex10ke_lcell \shift_out~4950_I (
// Equation(s):
// \shift_out~4950  = regnum[0] & (regnum[1]) # !regnum[0] & (comport_addr_0 # !regnum[1]) # !\sel_comadr~29 

        .dataa(\sel_comadr~29 ),
        .datab(regnum[0]),
        .datac(comport_addr_0),
        .datad(regnum[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4950 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4950_I .clock_enable_mode = "false";
defparam \shift_out~4950_I .lut_mask = "fd77";
defparam \shift_out~4950_I .operation_mode = "normal";
defparam \shift_out~4950_I .output_mode = "comb_only";
defparam \shift_out~4950_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D1
flex10ke_lcell \shift_out~4949_I (
// Equation(s):
// \shift_out~4949  = !regnum[1] & \sel_comadr~29  & regnum[0] & gluclock_addr_0

        .dataa(regnum[1]),
        .datab(\sel_comadr~29 ),
        .datac(regnum[0]),
        .datad(gluclock_addr_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4949 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4949_I .clock_enable_mode = "false";
defparam \shift_out~4949_I .lut_mask = "4000";
defparam \shift_out~4949_I .operation_mode = "normal";
defparam \shift_out~4949_I .output_mode = "comb_only";
defparam \shift_out~4949_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D1
flex10ke_lcell \shift_out~4951_I (
// Equation(s):
// \shift_out~4951  = sel_waitreg & (wait_write_0) # !sel_waitreg & (\shift_out~4950  # \shift_out~4949 )

        .dataa(sel_waitreg),
        .datab(\shift_out~4950 ),
        .datac(\shift_out~4949 ),
        .datad(wait_write_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4951 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4951_I .clock_enable_mode = "false";
defparam \shift_out~4951_I .lut_mask = "fe54";
defparam \shift_out~4951_I .operation_mode = "normal";
defparam \shift_out~4951_I .output_mode = "comb_only";
defparam \shift_out~4951_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D2
flex10ke_lcell \shift_out~4952_I (
// Equation(s):
// \shift_out~4952  = spics_n_sync_2 & !spics_n_sync_1 & (\shift_out~4951 ) # !spics_n_sync_2 & spics_n_sync_1 & waits_0

        .dataa(spics_n_sync_2),
        .datab(spics_n_sync_1),
        .datac(waits_0),
        .datad(\shift_out~4951 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shift_out~4952 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shift_out~4952_I .clock_enable_mode = "false";
defparam \shift_out~4952_I .lut_mask = "6240";
defparam \shift_out~4952_I .operation_mode = "normal";
defparam \shift_out~4952_I .output_mode = "comb_only";
defparam \shift_out~4952_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D29
flex10ke_lcell \genrst~13_I (
// Equation(s):
// \genrst~13  = !spics_n_sync_2 & !regnum[7] & spics_n_sync_1 & regnum[4]

        .dataa(spics_n_sync_2),
        .datab(regnum[7]),
        .datac(spics_n_sync_1),
        .datad(regnum[4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\genrst~13 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \genrst~13_I .clock_enable_mode = "false";
defparam \genrst~13_I .lut_mask = "1000";
defparam \genrst~13_I .operation_mode = "normal";
defparam \genrst~13_I .output_mode = "comb_only";
defparam \genrst~13_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D34
flex10ke_lcell \always4~102_I (
// Equation(s):
// \always4~102  = !regnum[5] & regnum[6] & \genrst~13 

        .dataa(vcc),
        .datab(regnum[5]),
        .datac(regnum[6]),
        .datad(\genrst~13 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always4~102 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always4~102_I .clock_enable_mode = "false";
defparam \always4~102_I .lut_mask = "3000";
defparam \always4~102_I .operation_mode = "normal";
defparam \always4~102_I .output_mode = "comb_only";
defparam \always4~102_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D36
flex10ke_lcell \always4~103_I (
// Equation(s):
// \always4~103  = !spick_sync[2] & !spics_n_sync_1 & spick_sync[1]

        .dataa(vcc),
        .datab(spick_sync[2]),
        .datac(spics_n_sync_1),
        .datad(spick_sync[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always4~103 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always4~103_I .clock_enable_mode = "false";
defparam \always4~103_I .lut_mask = "0300";
defparam \always4~103_I .operation_mode = "normal";
defparam \always4~103_I .output_mode = "comb_only";
defparam \always4~103_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D29
flex10ke_lcell \always4~104_I (
// Equation(s):
// \always4~104  = !regnum[5] & !regnum[7] & \always4~103  & regnum[4]

        .dataa(regnum[5]),
        .datab(regnum[7]),
        .datac(\always4~103 ),
        .datad(regnum[4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always4~104 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always4~104_I .clock_enable_mode = "false";
defparam \always4~104_I .lut_mask = "1000";
defparam \always4~104_I .operation_mode = "normal";
defparam \always4~104_I .output_mode = "comb_only";
defparam \always4~104_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D34
flex10ke_lcell \always4~105_I (
// Equation(s):
// \always4~105  = \always4~104  & regnum[6]

        .dataa(vcc),
        .datab(vcc),
        .datac(\always4~104 ),
        .datad(regnum[6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always4~105 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always4~105_I .clock_enable_mode = "false";
defparam \always4~105_I .lut_mask = "f000";
defparam \always4~105_I .operation_mode = "normal";
defparam \always4~105_I .output_mode = "comb_only";
defparam \always4~105_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_E25
flex10ke_lcell \cfg0_reg_in[7]~I (
// Equation(s):
// cfg0_reg_in[7] = DFFEA(spido_sync[1], GLOBAL(\fclk~dataout ), , , \always4~105 , , )

        .dataa(\always4~105 ),
        .datab(vcc),
        .datac(vcc),
        .datad(spido_sync[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(cfg0_reg_in[7]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \cfg0_reg_in[7]~I .clock_enable_mode = "true";
defparam \cfg0_reg_in[7]~I .lut_mask = "ff00";
defparam \cfg0_reg_in[7]~I .operation_mode = "normal";
defparam \cfg0_reg_in[7]~I .output_mode = "reg_only";
defparam \cfg0_reg_in[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_E25
flex10ke_lcell \cfg0_reg_in[6]~I (
// Equation(s):
// cfg0_reg_in[6] = DFFEA(cfg0_reg_in[7], GLOBAL(\fclk~dataout ), , , \always4~105 , , )

        .dataa(\always4~105 ),
        .datab(vcc),
        .datac(vcc),
        .datad(cfg0_reg_in[7]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(cfg0_reg_in[6]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \cfg0_reg_in[6]~I .clock_enable_mode = "true";
defparam \cfg0_reg_in[6]~I .lut_mask = "ff00";
defparam \cfg0_reg_in[6]~I .operation_mode = "normal";
defparam \cfg0_reg_in[6]~I .output_mode = "reg_only";
defparam \cfg0_reg_in[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_E25
flex10ke_lcell \cfg0_reg_in[5]~I (
// Equation(s):
// cfg0_reg_in[5] = DFFEA(cfg0_reg_in[6], GLOBAL(\fclk~dataout ), , , \always4~105 , , )

        .dataa(\always4~105 ),
        .datab(vcc),
        .datac(vcc),
        .datad(cfg0_reg_in[6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(cfg0_reg_in[5]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \cfg0_reg_in[5]~I .clock_enable_mode = "true";
defparam \cfg0_reg_in[5]~I .lut_mask = "ff00";
defparam \cfg0_reg_in[5]~I .operation_mode = "normal";
defparam \cfg0_reg_in[5]~I .output_mode = "reg_only";
defparam \cfg0_reg_in[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_E25
flex10ke_lcell \cfg0_reg_in[4]~I (
// Equation(s):
// cfg0_reg_in[4] = DFFEA(cfg0_reg_in[5], GLOBAL(\fclk~dataout ), , , \always4~105 , , )

        .dataa(\always4~105 ),
        .datab(vcc),
        .datac(vcc),
        .datad(cfg0_reg_in[5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(cfg0_reg_in[4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \cfg0_reg_in[4]~I .clock_enable_mode = "true";
defparam \cfg0_reg_in[4]~I .lut_mask = "ff00";
defparam \cfg0_reg_in[4]~I .operation_mode = "normal";
defparam \cfg0_reg_in[4]~I .output_mode = "reg_only";
defparam \cfg0_reg_in[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_E25
flex10ke_lcell \cfg0_reg_in[3]~I (
// Equation(s):
// cfg0_reg_in[3] = DFFEA(cfg0_reg_in[4], GLOBAL(\fclk~dataout ), , , \always4~105 , , )

        .dataa(\always4~105 ),
        .datab(vcc),
        .datac(vcc),
        .datad(cfg0_reg_in[4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(cfg0_reg_in[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \cfg0_reg_in[3]~I .clock_enable_mode = "true";
defparam \cfg0_reg_in[3]~I .lut_mask = "ff00";
defparam \cfg0_reg_in[3]~I .operation_mode = "normal";
defparam \cfg0_reg_in[3]~I .output_mode = "reg_only";
defparam \cfg0_reg_in[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_E25
flex10ke_lcell \cfg0_reg_in[2]~I (
// Equation(s):
// cfg0_reg_in[2] = DFFEA(cfg0_reg_in[3], GLOBAL(\fclk~dataout ), , , \always4~105 , , )

        .dataa(\always4~105 ),
        .datab(vcc),
        .datac(vcc),
        .datad(cfg0_reg_in[3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(cfg0_reg_in[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \cfg0_reg_in[2]~I .clock_enable_mode = "true";
defparam \cfg0_reg_in[2]~I .lut_mask = "ff00";
defparam \cfg0_reg_in[2]~I .operation_mode = "normal";
defparam \cfg0_reg_in[2]~I .output_mode = "reg_only";
defparam \cfg0_reg_in[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_E25
flex10ke_lcell \cfg0_reg_in[1]~I (
// Equation(s):
// cfg0_reg_in[1] = DFFEA(cfg0_reg_in[2], GLOBAL(\fclk~dataout ), , , \always4~105 , , )

        .dataa(\always4~105 ),
        .datab(vcc),
        .datac(vcc),
        .datad(cfg0_reg_in[2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(cfg0_reg_in[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \cfg0_reg_in[1]~I .clock_enable_mode = "true";
defparam \cfg0_reg_in[1]~I .lut_mask = "ff00";
defparam \cfg0_reg_in[1]~I .operation_mode = "normal";
defparam \cfg0_reg_in[1]~I .output_mode = "reg_only";
defparam \cfg0_reg_in[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D35
flex10ke_lcell \spics_n_sync[0]~I (
// Equation(s):
// spics_n_sync[0] = DFFEA(\spics_n~dataout , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(spics_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(spics_n_sync[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \spics_n_sync[0]~I .clock_enable_mode = "false";
defparam \spics_n_sync[0]~I .lut_mask = "ff00";
defparam \spics_n_sync[0]~I .operation_mode = "normal";
defparam \spics_n_sync[0]~I .output_mode = "reg_only";
defparam \spics_n_sync[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A34
flex10ke_lcell \cfg0_reg_in[0]~I (
// Equation(s):
// cfg0_reg_in[0] = DFFEA(cfg0_reg_in[1], GLOBAL(\fclk~dataout ), , , \always4~105 , , )

        .dataa(\always4~105 ),
        .datab(vcc),
        .datac(vcc),
        .datad(cfg0_reg_in[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(cfg0_reg_in[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \cfg0_reg_in[0]~I .clock_enable_mode = "true";
defparam \cfg0_reg_in[0]~I .lut_mask = "ff00";
defparam \cfg0_reg_in[0]~I .operation_mode = "normal";
defparam \cfg0_reg_in[0]~I .output_mode = "reg_only";
defparam \cfg0_reg_in[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D29
flex10ke_lcell \sel_musycr~14_I (
// Equation(s):
// \sel_musycr~14  = !regnum[4] & !regnum[7] & !regnum[6] & regnum[5]

        .dataa(regnum[4]),
        .datab(regnum[7]),
        .datac(regnum[6]),
        .datad(regnum[5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\sel_musycr~14 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sel_musycr~14_I .clock_enable_mode = "false";
defparam \sel_musycr~14_I .lut_mask = "0100";
defparam \sel_musycr~14_I .operation_mode = "normal";
defparam \sel_musycr~14_I .output_mode = "comb_only";
defparam \sel_musycr~14_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D36
flex10ke_lcell \always4~106_I (
// Equation(s):
// \always4~106  = !spick_sync[2] & !spics_n_sync_1 & spick_sync[1] & \sel_musycr~14 

        .dataa(spick_sync[2]),
        .datab(spics_n_sync_1),
        .datac(spick_sync[1]),
        .datad(\sel_musycr~14 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always4~106 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always4~106_I .clock_enable_mode = "false";
defparam \always4~106_I .lut_mask = "1000";
defparam \always4~106_I .operation_mode = "normal";
defparam \always4~106_I .output_mode = "comb_only";
defparam \always4~106_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D33
flex10ke_lcell \scs_n_01~I (
// Equation(s):
// scs_n_01 = !spics_n_sync_2 & spics_n_sync_1

        .dataa(vcc),
        .datab(vcc),
        .datac(spics_n_sync_2),
        .datad(spics_n_sync_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(scs_n_01),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \scs_n_01~I .clock_enable_mode = "false";
defparam \scs_n_01~I .lut_mask = "0f00";
defparam \scs_n_01~I .operation_mode = "normal";
defparam \scs_n_01~I .output_mode = "comb_only";
defparam \scs_n_01~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D25
flex10ke_lcell \always4~10_I (
// Equation(s):
// \always4~10  = !regnum[1] & !regnum[0] & \sel_comadr~29  & \always4~103 

        .dataa(regnum[1]),
        .datab(regnum[0]),
        .datac(\sel_comadr~29 ),
        .datad(\always4~103 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always4~10 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always4~10_I .clock_enable_mode = "false";
defparam \always4~10_I .lut_mask = "1000";
defparam \always4~10_I .operation_mode = "normal";
defparam \always4~10_I .output_mode = "comb_only";
defparam \always4~10_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D34
flex10ke_lcell \always4~107_I (
// Equation(s):
// \always4~107  = !regnum[0] & !regnum[6] & \always4~104 

        .dataa(vcc),
        .datab(regnum[0]),
        .datac(regnum[6]),
        .datad(\always4~104 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always4~107 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always4~107_I .clock_enable_mode = "false";
defparam \always4~107_I .lut_mask = "0300";
defparam \always4~107_I .operation_mode = "normal";
defparam \always4~107_I .output_mode = "comb_only";
defparam \always4~107_I .packed_mode = "false";
// synopsys translate_on

endmodule

module spi2 (
        shiftout_7,
        q_0,
        sd_stgl_2,
        sd_stgl_1,
        sd_start,
        dout_0,
        dout_1,
        dout_2,
        dout_3,
        dout_4,
        dout_5,
        dout_6,
        dout_7,
        wr_n,
        clock,
        sddi,
        d_0,
        d_1,
        d_2,
        d_3,
        d_4,
        d_5,
        d_6,
        d_7,
        sd_start1,
        devpor,
        devclrn,
        devoe);
output  shiftout_7;
output  q_0;
input   sd_stgl_2;
input   sd_stgl_1;
input   sd_start;
output  dout_0;
output  dout_1;
output  dout_2;
output  dout_3;
output  dout_4;
output  dout_5;
output  dout_6;
output  dout_7;
input   wr_n;
input   clock;
input   sddi;
input   d_0;
input   d_1;
input   d_2;
input   d_3;
input   d_4;
input   d_5;
input   d_6;
input   d_7;
input   sd_start1;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \counter_rtl_1|wysi_counter|counter_cell[0]~COUT ;
wire \dout~319 ;
wire \shiftout[7]~779 ;
wire \shiftout~771 ;
wire \shiftout~769 ;
wire \shiftout~767 ;
wire \shiftout~765 ;
wire \shiftout~763 ;
wire \shiftout~761 ;
wire \shiftout~759 ;
wire \counter_rtl_1|wysi_counter|counter_cell[1]~COUT ;
wire \counter_rtl_1|wysi_counter|counter_cell[2]~COUT ;
wire \counter_rtl_1|wysi_counter|counter_cell[3]~COUT ;
wire \dout~320 ;
wire \dout~321 ;
wire [6:0] shiftin;
wire [7:0] shiftout;
wire [4:0] \counter_rtl_1|wysi_counter|q ;


// atom is at LC6_J29
flex10ke_lcell \shiftout[7]~I (
// Equation(s):
// shiftout_7 = DFFEA(\shiftout~759 , GLOBAL(\fclk~dataout ), , , \shiftout[7]~779 , , )

        .dataa(\shiftout[7]~779 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\shiftout~759 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shiftout_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftout[7]~I .clock_enable_mode = "true";
defparam \shiftout[7]~I .lut_mask = "ff00";
defparam \shiftout[7]~I .operation_mode = "normal";
defparam \shiftout[7]~I .output_mode = "reg_only";
defparam \shiftout[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J9
flex10ke_lcell \counter_rtl_1|wysi_counter|counter_cell[0] (
// Equation(s):
// q_0 = DFFEA((\counter_rtl_1|wysi_counter|q [4] $ !q_0) & sd_start1, GLOBAL(\fclk~dataout ), , , , , )
// \counter_rtl_1|wysi_counter|counter_cell[0]~COUT  = CARRY(q_0)

        .dataa(\counter_rtl_1|wysi_counter|q [4]),
        .datab(sd_start1),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(q_0),
        .cout(\counter_rtl_1|wysi_counter|counter_cell[0]~COUT ),
        .cascout());
// synopsys translate_off
defparam \counter_rtl_1|wysi_counter|counter_cell[0] .clock_enable_mode = "false";
defparam \counter_rtl_1|wysi_counter|counter_cell[0] .lut_mask = "99aa";
defparam \counter_rtl_1|wysi_counter|counter_cell[0] .operation_mode = "clrb_cntr";
defparam \counter_rtl_1|wysi_counter|counter_cell[0] .output_mode = "reg_only";
defparam \counter_rtl_1|wysi_counter|counter_cell[0] .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H6
flex10ke_lcell \dout[0]~I (
// Equation(s):
// dout_0 = DFFEA(\sddi~dataout , GLOBAL(\fclk~dataout ), , , \dout~321 , , )

        .dataa(\dout~321 ),
        .datab(vcc),
        .datac(vcc),
        .datad(sddi),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dout_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dout[0]~I .clock_enable_mode = "true";
defparam \dout[0]~I .lut_mask = "ff00";
defparam \dout[0]~I .operation_mode = "normal";
defparam \dout[0]~I .output_mode = "reg_only";
defparam \dout[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H4
flex10ke_lcell \dout[1]~I (
// Equation(s):
// dout_1 = DFFEA(shiftin[0], GLOBAL(\fclk~dataout ), , , \dout~321 , , )

        .dataa(\dout~321 ),
        .datab(vcc),
        .datac(vcc),
        .datad(shiftin[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dout_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dout[1]~I .clock_enable_mode = "true";
defparam \dout[1]~I .lut_mask = "ff00";
defparam \dout[1]~I .operation_mode = "normal";
defparam \dout[1]~I .output_mode = "reg_only";
defparam \dout[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H6
flex10ke_lcell \dout[2]~I (
// Equation(s):
// dout_2 = DFFEA(shiftin[1], GLOBAL(\fclk~dataout ), , , \dout~321 , , )

        .dataa(\dout~321 ),
        .datab(vcc),
        .datac(vcc),
        .datad(shiftin[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dout_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dout[2]~I .clock_enable_mode = "true";
defparam \dout[2]~I .lut_mask = "ff00";
defparam \dout[2]~I .operation_mode = "normal";
defparam \dout[2]~I .output_mode = "reg_only";
defparam \dout[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H15
flex10ke_lcell \dout[3]~I (
// Equation(s):
// dout_3 = DFFEA(shiftin[2], GLOBAL(\fclk~dataout ), , , \dout~321 , , )

        .dataa(\dout~321 ),
        .datab(vcc),
        .datac(vcc),
        .datad(shiftin[2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dout_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dout[3]~I .clock_enable_mode = "true";
defparam \dout[3]~I .lut_mask = "ff00";
defparam \dout[3]~I .operation_mode = "normal";
defparam \dout[3]~I .output_mode = "reg_only";
defparam \dout[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H15
flex10ke_lcell \dout[4]~I (
// Equation(s):
// dout_4 = DFFEA(shiftin[3], GLOBAL(\fclk~dataout ), , , \dout~321 , , )

        .dataa(\dout~321 ),
        .datab(vcc),
        .datac(vcc),
        .datad(shiftin[3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dout_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dout[4]~I .clock_enable_mode = "true";
defparam \dout[4]~I .lut_mask = "ff00";
defparam \dout[4]~I .operation_mode = "normal";
defparam \dout[4]~I .output_mode = "reg_only";
defparam \dout[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H4
flex10ke_lcell \dout[5]~I (
// Equation(s):
// dout_5 = DFFEA(shiftin[4], GLOBAL(\fclk~dataout ), , , \dout~321 , , )

        .dataa(\dout~321 ),
        .datab(vcc),
        .datac(vcc),
        .datad(shiftin[4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dout_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dout[5]~I .clock_enable_mode = "true";
defparam \dout[5]~I .lut_mask = "ff00";
defparam \dout[5]~I .operation_mode = "normal";
defparam \dout[5]~I .output_mode = "reg_only";
defparam \dout[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H4
flex10ke_lcell \dout[6]~I (
// Equation(s):
// dout_6 = DFFEA(shiftin[5], GLOBAL(\fclk~dataout ), , , \dout~321 , , )

        .dataa(\dout~321 ),
        .datab(vcc),
        .datac(vcc),
        .datad(shiftin[5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dout_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dout[6]~I .clock_enable_mode = "true";
defparam \dout[6]~I .lut_mask = "ff00";
defparam \dout[6]~I .operation_mode = "normal";
defparam \dout[6]~I .output_mode = "reg_only";
defparam \dout[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H6
flex10ke_lcell \dout[7]~I (
// Equation(s):
// dout_7 = DFFEA(shiftin[6], GLOBAL(\fclk~dataout ), , , \dout~321 , , )

        .dataa(\dout~321 ),
        .datab(vcc),
        .datac(vcc),
        .datad(shiftin[6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dout_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dout[7]~I .clock_enable_mode = "true";
defparam \dout[7]~I .lut_mask = "ff00";
defparam \dout[7]~I .operation_mode = "normal";
defparam \dout[7]~I .output_mode = "reg_only";
defparam \dout[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J16
flex10ke_lcell \dout~319_I (
// Equation(s):
// \dout~319  = !q_0 & (sd_stgl_1 $ !sd_stgl_2)

        .dataa(vcc),
        .datab(q_0),
        .datac(sd_stgl_1),
        .datad(sd_stgl_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dout~319 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dout~319_I .clock_enable_mode = "false";
defparam \dout~319_I .lut_mask = "3003";
defparam \dout~319_I .operation_mode = "normal";
defparam \dout~319_I .output_mode = "comb_only";
defparam \dout~319_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J29
flex10ke_lcell \shiftout[7]~779_I (
// Equation(s):
// \shiftout[7]~779  = !\dout~319 

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\dout~319 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shiftout[7]~779 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftout[7]~779_I .clock_enable_mode = "false";
defparam \shiftout[7]~779_I .lut_mask = "00ff";
defparam \shiftout[7]~779_I .operation_mode = "normal";
defparam \shiftout[7]~779_I .output_mode = "comb_only";
defparam \shiftout[7]~779_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_J30
flex10ke_lcell \shiftout[0]~I (
// Equation(s):
// shiftout[0] = DFFEA(\wr_n~dataout  # \d[0]~7 , GLOBAL(\fclk~dataout ), , , sd_start, , )

        .dataa(sd_start),
        .datab(vcc),
        .datac(wr_n),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shiftout[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftout[0]~I .clock_enable_mode = "true";
defparam \shiftout[0]~I .lut_mask = "fff0";
defparam \shiftout[0]~I .operation_mode = "normal";
defparam \shiftout[0]~I .output_mode = "reg_only";
defparam \shiftout[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_J30
flex10ke_lcell \shiftout~771_I (
// Equation(s):
// \shiftout~771  = sd_start & (\d[1]~6  # \wr_n~dataout ) # !sd_start & (shiftout[0])

        .dataa(d_1),
        .datab(wr_n),
        .datac(sd_start),
        .datad(shiftout[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shiftout~771 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftout~771_I .clock_enable_mode = "false";
defparam \shiftout~771_I .lut_mask = "efe0";
defparam \shiftout~771_I .operation_mode = "normal";
defparam \shiftout~771_I .output_mode = "comb_only";
defparam \shiftout~771_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J30
flex10ke_lcell \shiftout[1]~I (
// Equation(s):
// shiftout[1] = DFFEA(\shiftout~771 , GLOBAL(\fclk~dataout ), , , \shiftout[7]~779 , , )

        .dataa(\shiftout[7]~779 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\shiftout~771 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shiftout[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftout[1]~I .clock_enable_mode = "true";
defparam \shiftout[1]~I .lut_mask = "ff00";
defparam \shiftout[1]~I .operation_mode = "normal";
defparam \shiftout[1]~I .output_mode = "reg_only";
defparam \shiftout[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_J30
flex10ke_lcell \shiftout~769_I (
// Equation(s):
// \shiftout~769  = sd_start & (\d[2]~5  # \wr_n~dataout ) # !sd_start & (shiftout[1])

        .dataa(d_2),
        .datab(wr_n),
        .datac(sd_start),
        .datad(shiftout[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shiftout~769 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftout~769_I .clock_enable_mode = "false";
defparam \shiftout~769_I .lut_mask = "efe0";
defparam \shiftout~769_I .operation_mode = "normal";
defparam \shiftout~769_I .output_mode = "comb_only";
defparam \shiftout~769_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J30
flex10ke_lcell \shiftout[2]~I (
// Equation(s):
// shiftout[2] = DFFEA(\shiftout~769 , GLOBAL(\fclk~dataout ), , , \shiftout[7]~779 , , )

        .dataa(\shiftout[7]~779 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\shiftout~769 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shiftout[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftout[2]~I .clock_enable_mode = "true";
defparam \shiftout[2]~I .lut_mask = "ff00";
defparam \shiftout[2]~I .operation_mode = "normal";
defparam \shiftout[2]~I .output_mode = "reg_only";
defparam \shiftout[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J30
flex10ke_lcell \shiftout~767_I (
// Equation(s):
// \shiftout~767  = sd_start & (\d[3]~4  # \wr_n~dataout ) # !sd_start & (shiftout[2])

        .dataa(d_3),
        .datab(wr_n),
        .datac(sd_start),
        .datad(shiftout[2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shiftout~767 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftout~767_I .clock_enable_mode = "false";
defparam \shiftout~767_I .lut_mask = "efe0";
defparam \shiftout~767_I .operation_mode = "normal";
defparam \shiftout~767_I .output_mode = "comb_only";
defparam \shiftout~767_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J30
flex10ke_lcell \shiftout[3]~I (
// Equation(s):
// shiftout[3] = DFFEA(\shiftout~767 , GLOBAL(\fclk~dataout ), , , \shiftout[7]~779 , , )

        .dataa(\shiftout[7]~779 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\shiftout~767 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shiftout[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftout[3]~I .clock_enable_mode = "true";
defparam \shiftout[3]~I .lut_mask = "ff00";
defparam \shiftout[3]~I .operation_mode = "normal";
defparam \shiftout[3]~I .output_mode = "reg_only";
defparam \shiftout[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J30
flex10ke_lcell \shiftout~765_I (
// Equation(s):
// \shiftout~765  = sd_start & (\d[4]~3  # \wr_n~dataout ) # !sd_start & (shiftout[3])

        .dataa(d_4),
        .datab(wr_n),
        .datac(sd_start),
        .datad(shiftout[3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shiftout~765 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftout~765_I .clock_enable_mode = "false";
defparam \shiftout~765_I .lut_mask = "efe0";
defparam \shiftout~765_I .operation_mode = "normal";
defparam \shiftout~765_I .output_mode = "comb_only";
defparam \shiftout~765_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_J29
flex10ke_lcell \shiftout[4]~I (
// Equation(s):
// shiftout[4] = DFFEA(\shiftout~765 , GLOBAL(\fclk~dataout ), , , \shiftout[7]~779 , , )

        .dataa(\shiftout[7]~779 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\shiftout~765 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shiftout[4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftout[4]~I .clock_enable_mode = "true";
defparam \shiftout[4]~I .lut_mask = "ff00";
defparam \shiftout[4]~I .operation_mode = "normal";
defparam \shiftout[4]~I .output_mode = "reg_only";
defparam \shiftout[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_J29
flex10ke_lcell \shiftout~763_I (
// Equation(s):
// \shiftout~763  = sd_start & (\d[5]~2  # \wr_n~dataout ) # !sd_start & (shiftout[4])

        .dataa(d_5),
        .datab(wr_n),
        .datac(sd_start),
        .datad(shiftout[4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shiftout~763 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftout~763_I .clock_enable_mode = "false";
defparam \shiftout~763_I .lut_mask = "efe0";
defparam \shiftout~763_I .operation_mode = "normal";
defparam \shiftout~763_I .output_mode = "comb_only";
defparam \shiftout~763_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J29
flex10ke_lcell \shiftout[5]~I (
// Equation(s):
// shiftout[5] = DFFEA(\shiftout~763 , GLOBAL(\fclk~dataout ), , , \shiftout[7]~779 , , )

        .dataa(\shiftout[7]~779 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\shiftout~763 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shiftout[5]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftout[5]~I .clock_enable_mode = "true";
defparam \shiftout[5]~I .lut_mask = "ff00";
defparam \shiftout[5]~I .operation_mode = "normal";
defparam \shiftout[5]~I .output_mode = "reg_only";
defparam \shiftout[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J29
flex10ke_lcell \shiftout~761_I (
// Equation(s):
// \shiftout~761  = sd_start & (\d[6]~1  # \wr_n~dataout ) # !sd_start & (shiftout[5])

        .dataa(d_6),
        .datab(wr_n),
        .datac(sd_start),
        .datad(shiftout[5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shiftout~761 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftout~761_I .clock_enable_mode = "false";
defparam \shiftout~761_I .lut_mask = "efe0";
defparam \shiftout~761_I .operation_mode = "normal";
defparam \shiftout~761_I .output_mode = "comb_only";
defparam \shiftout~761_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J29
flex10ke_lcell \shiftout[6]~I (
// Equation(s):
// shiftout[6] = DFFEA(\shiftout~761 , GLOBAL(\fclk~dataout ), , , \shiftout[7]~779 , , )

        .dataa(\shiftout[7]~779 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\shiftout~761 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shiftout[6]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftout[6]~I .clock_enable_mode = "true";
defparam \shiftout[6]~I .lut_mask = "ff00";
defparam \shiftout[6]~I .operation_mode = "normal";
defparam \shiftout[6]~I .output_mode = "reg_only";
defparam \shiftout[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J29
flex10ke_lcell \shiftout~759_I (
// Equation(s):
// \shiftout~759  = sd_start & (\d[7]~0  # \wr_n~dataout ) # !sd_start & (shiftout[6])

        .dataa(d_7),
        .datab(wr_n),
        .datac(sd_start),
        .datad(shiftout[6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\shiftout~759 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftout~759_I .clock_enable_mode = "false";
defparam \shiftout~759_I .lut_mask = "efe0";
defparam \shiftout~759_I .operation_mode = "normal";
defparam \shiftout~759_I .output_mode = "comb_only";
defparam \shiftout~759_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J9
flex10ke_lcell \counter_rtl_1|wysi_counter|counter_cell[1] (
// Equation(s):
// \counter_rtl_1|wysi_counter|q [1] = DFFEA((\counter_rtl_1|wysi_counter|q [1] $ (!\counter_rtl_1|wysi_counter|q [4] & \counter_rtl_1|wysi_counter|counter_cell[0]~COUT )) & sd_start1, GLOBAL(\fclk~dataout ), , , , , )
// \counter_rtl_1|wysi_counter|counter_cell[1]~COUT  = CARRY(\counter_rtl_1|wysi_counter|q [1] & (\counter_rtl_1|wysi_counter|counter_cell[0]~COUT ))

        .dataa(\counter_rtl_1|wysi_counter|q [4]),
        .datab(sd_start1),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(\counter_rtl_1|wysi_counter|counter_cell[0]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\counter_rtl_1|wysi_counter|q [1]),
        .cout(\counter_rtl_1|wysi_counter|counter_cell[1]~COUT ),
        .cascout());
// synopsys translate_off
defparam \counter_rtl_1|wysi_counter|counter_cell[1] .cin_used = "true";
defparam \counter_rtl_1|wysi_counter|counter_cell[1] .clock_enable_mode = "false";
defparam \counter_rtl_1|wysi_counter|counter_cell[1] .lut_mask = "9ca0";
defparam \counter_rtl_1|wysi_counter|counter_cell[1] .operation_mode = "clrb_cntr";
defparam \counter_rtl_1|wysi_counter|counter_cell[1] .output_mode = "reg_only";
defparam \counter_rtl_1|wysi_counter|counter_cell[1] .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J9
flex10ke_lcell \counter_rtl_1|wysi_counter|counter_cell[2] (
// Equation(s):
// \counter_rtl_1|wysi_counter|q [2] = DFFEA((\counter_rtl_1|wysi_counter|q [2] $ (!\counter_rtl_1|wysi_counter|q [4] & \counter_rtl_1|wysi_counter|counter_cell[1]~COUT )) & sd_start1, GLOBAL(\fclk~dataout ), , , , , )
// \counter_rtl_1|wysi_counter|counter_cell[2]~COUT  = CARRY(\counter_rtl_1|wysi_counter|q [2] & (\counter_rtl_1|wysi_counter|counter_cell[1]~COUT ))

        .dataa(\counter_rtl_1|wysi_counter|q [4]),
        .datab(sd_start1),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(\counter_rtl_1|wysi_counter|counter_cell[1]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\counter_rtl_1|wysi_counter|q [2]),
        .cout(\counter_rtl_1|wysi_counter|counter_cell[2]~COUT ),
        .cascout());
// synopsys translate_off
defparam \counter_rtl_1|wysi_counter|counter_cell[2] .cin_used = "true";
defparam \counter_rtl_1|wysi_counter|counter_cell[2] .clock_enable_mode = "false";
defparam \counter_rtl_1|wysi_counter|counter_cell[2] .lut_mask = "9ca0";
defparam \counter_rtl_1|wysi_counter|counter_cell[2] .operation_mode = "clrb_cntr";
defparam \counter_rtl_1|wysi_counter|counter_cell[2] .output_mode = "reg_only";
defparam \counter_rtl_1|wysi_counter|counter_cell[2] .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J9
flex10ke_lcell \counter_rtl_1|wysi_counter|counter_cell[3] (
// Equation(s):
// \counter_rtl_1|wysi_counter|q [3] = DFFEA((\counter_rtl_1|wysi_counter|q [3] $ (!\counter_rtl_1|wysi_counter|q [4] & \counter_rtl_1|wysi_counter|counter_cell[2]~COUT )) & sd_start1, GLOBAL(\fclk~dataout ), , , , , )
// \counter_rtl_1|wysi_counter|counter_cell[3]~COUT  = CARRY(\counter_rtl_1|wysi_counter|q [3] & (\counter_rtl_1|wysi_counter|counter_cell[2]~COUT ))

        .dataa(\counter_rtl_1|wysi_counter|q [4]),
        .datab(sd_start1),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(\counter_rtl_1|wysi_counter|counter_cell[2]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\counter_rtl_1|wysi_counter|q [3]),
        .cout(\counter_rtl_1|wysi_counter|counter_cell[3]~COUT ),
        .cascout());
// synopsys translate_off
defparam \counter_rtl_1|wysi_counter|counter_cell[3] .cin_used = "true";
defparam \counter_rtl_1|wysi_counter|counter_cell[3] .clock_enable_mode = "false";
defparam \counter_rtl_1|wysi_counter|counter_cell[3] .lut_mask = "9ca0";
defparam \counter_rtl_1|wysi_counter|counter_cell[3] .operation_mode = "clrb_cntr";
defparam \counter_rtl_1|wysi_counter|counter_cell[3] .output_mode = "reg_only";
defparam \counter_rtl_1|wysi_counter|counter_cell[3] .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_J9
flex10ke_lcell \counter_rtl_1|wysi_counter|counter_cell[4] (
// Equation(s):
// \counter_rtl_1|wysi_counter|q [4] = DFFEA((\counter_rtl_1|wysi_counter|q [4] $ (!\counter_rtl_1|wysi_counter|q [4] & \counter_rtl_1|wysi_counter|counter_cell[3]~COUT )) & sd_start1, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\counter_rtl_1|wysi_counter|q [4]),
        .datab(sd_start1),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(\counter_rtl_1|wysi_counter|counter_cell[3]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\counter_rtl_1|wysi_counter|q [4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \counter_rtl_1|wysi_counter|counter_cell[4] .cin_used = "true";
defparam \counter_rtl_1|wysi_counter|counter_cell[4] .clock_enable_mode = "false";
defparam \counter_rtl_1|wysi_counter|counter_cell[4] .lut_mask = "9c9c";
defparam \counter_rtl_1|wysi_counter|counter_cell[4] .operation_mode = "clrb_cntr";
defparam \counter_rtl_1|wysi_counter|counter_cell[4] .output_mode = "reg_only";
defparam \counter_rtl_1|wysi_counter|counter_cell[4] .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J9
flex10ke_lcell \dout~320_I (
// Equation(s):
// \dout~320  = \counter_rtl_1|wysi_counter|q [1] & \counter_rtl_1|wysi_counter|q [2] & \counter_rtl_1|wysi_counter|q [3]

        .dataa(vcc),
        .datab(\counter_rtl_1|wysi_counter|q [1]),
        .datac(\counter_rtl_1|wysi_counter|q [2]),
        .datad(\counter_rtl_1|wysi_counter|q [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dout~320 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dout~320_I .clock_enable_mode = "false";
defparam \dout~320_I .lut_mask = "c000";
defparam \dout~320_I .operation_mode = "normal";
defparam \dout~320_I .output_mode = "comb_only";
defparam \dout~320_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_J9
flex10ke_lcell \dout~321_I (
// Equation(s):
// \dout~321  = !\counter_rtl_1|wysi_counter|q [4] & \dout~320  & \dout~319 

        .dataa(vcc),
        .datab(\counter_rtl_1|wysi_counter|q [4]),
        .datac(\dout~320 ),
        .datad(\dout~319 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dout~321 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dout~321_I .clock_enable_mode = "false";
defparam \dout~321_I .lut_mask = "3000";
defparam \dout~321_I .operation_mode = "normal";
defparam \dout~321_I .output_mode = "comb_only";
defparam \dout~321_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H4
flex10ke_lcell \shiftin[0]~I (
// Equation(s):
// shiftin[0] = DFFEA(\sddi~dataout , GLOBAL(\fclk~dataout ), , , \dout~319 , , )

        .dataa(\dout~319 ),
        .datab(vcc),
        .datac(vcc),
        .datad(sddi),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shiftin[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftin[0]~I .clock_enable_mode = "true";
defparam \shiftin[0]~I .lut_mask = "ff00";
defparam \shiftin[0]~I .operation_mode = "normal";
defparam \shiftin[0]~I .output_mode = "reg_only";
defparam \shiftin[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H4
flex10ke_lcell \shiftin[1]~I (
// Equation(s):
// shiftin[1] = DFFEA(shiftin[0], GLOBAL(\fclk~dataout ), , , \dout~319 , , )

        .dataa(\dout~319 ),
        .datab(vcc),
        .datac(vcc),
        .datad(shiftin[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shiftin[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftin[1]~I .clock_enable_mode = "true";
defparam \shiftin[1]~I .lut_mask = "ff00";
defparam \shiftin[1]~I .operation_mode = "normal";
defparam \shiftin[1]~I .output_mode = "reg_only";
defparam \shiftin[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H15
flex10ke_lcell \shiftin[2]~I (
// Equation(s):
// shiftin[2] = DFFEA(shiftin[1], GLOBAL(\fclk~dataout ), , , \dout~319 , , )

        .dataa(\dout~319 ),
        .datab(vcc),
        .datac(vcc),
        .datad(shiftin[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shiftin[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftin[2]~I .clock_enable_mode = "true";
defparam \shiftin[2]~I .lut_mask = "ff00";
defparam \shiftin[2]~I .operation_mode = "normal";
defparam \shiftin[2]~I .output_mode = "reg_only";
defparam \shiftin[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H15
flex10ke_lcell \shiftin[3]~I (
// Equation(s):
// shiftin[3] = DFFEA(shiftin[2], GLOBAL(\fclk~dataout ), , , \dout~319 , , )

        .dataa(\dout~319 ),
        .datab(vcc),
        .datac(vcc),
        .datad(shiftin[2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shiftin[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftin[3]~I .clock_enable_mode = "true";
defparam \shiftin[3]~I .lut_mask = "ff00";
defparam \shiftin[3]~I .operation_mode = "normal";
defparam \shiftin[3]~I .output_mode = "reg_only";
defparam \shiftin[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H4
flex10ke_lcell \shiftin[4]~I (
// Equation(s):
// shiftin[4] = DFFEA(shiftin[3], GLOBAL(\fclk~dataout ), , , \dout~319 , , )

        .dataa(\dout~319 ),
        .datab(vcc),
        .datac(vcc),
        .datad(shiftin[3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shiftin[4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftin[4]~I .clock_enable_mode = "true";
defparam \shiftin[4]~I .lut_mask = "ff00";
defparam \shiftin[4]~I .operation_mode = "normal";
defparam \shiftin[4]~I .output_mode = "reg_only";
defparam \shiftin[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H4
flex10ke_lcell \shiftin[5]~I (
// Equation(s):
// shiftin[5] = DFFEA(shiftin[4], GLOBAL(\fclk~dataout ), , , \dout~319 , , )

        .dataa(\dout~319 ),
        .datab(vcc),
        .datac(vcc),
        .datad(shiftin[4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shiftin[5]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftin[5]~I .clock_enable_mode = "true";
defparam \shiftin[5]~I .lut_mask = "ff00";
defparam \shiftin[5]~I .operation_mode = "normal";
defparam \shiftin[5]~I .output_mode = "reg_only";
defparam \shiftin[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H4
flex10ke_lcell \shiftin[6]~I (
// Equation(s):
// shiftin[6] = DFFEA(shiftin[5], GLOBAL(\fclk~dataout ), , , \dout~319 , , )

        .dataa(\dout~319 ),
        .datab(vcc),
        .datac(vcc),
        .datad(shiftin[5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shiftin[6]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shiftin[6]~I .clock_enable_mode = "true";
defparam \shiftin[6]~I .lut_mask = "ff00";
defparam \shiftin[6]~I .operation_mode = "normal";
defparam \shiftin[6]~I .output_mode = "reg_only";
defparam \shiftin[6]~I .packed_mode = "false";
// synopsys translate_on

endmodule

module synch (
        hpix,
        hblank,
        hsync,
        pre_cend,
        line_start,
        cend,
        hsync_start,
        hint_start,
        clk,
        line_start1,
        devpor,
        devclrn,
        devoe);
output  hpix;
output  hblank;
output  hsync;
input   pre_cend;
output  line_start;
input   cend;
output  hsync_start;
output  hint_start;
input   clk;
output  line_start1;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \Equal3~47 ;
wire \Equal0~51 ;
wire \Equal0~52 ;
wire \Equal1~46 ;
wire \Equal1~47 ;
wire \hpix~66 ;
wire \Equal2~60 ;
wire \Equal1~48 ;
wire \Equal2~61 ;
wire \Equal1~49 ;
wire \Equal4~23 ;
wire \Equal3~46 ;
wire \line_start~189 ;
wire [8:0] hcount;
wire [8:0] \Add0|adder|result_node|cs_buffer ;
wire [8:0] \Add0|adder|result_node|cout ;
wire [8:0] \Add0|adder|unreg_res_node ;


// atom is at LC2_H13
flex10ke_lcell \hpix~I (
// Equation(s):
// hpix = DFFEA(\hpix~66  & !hcount[8] # !\hpix~66  & (hpix), GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(hcount[8]),
        .datac(\hpix~66 ),
        .datad(hpix),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hpix),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hpix~I .clock_enable_mode = "true";
defparam \hpix~I .lut_mask = "3f30";
defparam \hpix~I .operation_mode = "normal";
defparam \hpix~I .output_mode = "reg_only";
defparam \hpix~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H13
flex10ke_lcell \hblank~I (
// Equation(s):
// hblank = DFFEA(\Equal1~49  # !\Equal2~61  & hblank, GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(\Equal2~61 ),
        .datac(\Equal1~49 ),
        .datad(hblank),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hblank),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hblank~I .clock_enable_mode = "true";
defparam \hblank~I .lut_mask = "f3f0";
defparam \hblank~I .operation_mode = "normal";
defparam \hblank~I .output_mode = "reg_only";
defparam \hblank~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H7
flex10ke_lcell \hsync~I (
// Equation(s):
// hsync = DFFEA(\Equal3~46  # !\Equal4~23  & hsync, GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(\Equal4~23 ),
        .datac(\Equal3~46 ),
        .datad(hsync),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hsync),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hsync~I .clock_enable_mode = "true";
defparam \hsync~I .lut_mask = "f3f0";
defparam \hsync~I .operation_mode = "normal";
defparam \hsync~I .output_mode = "reg_only";
defparam \hsync~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H13
flex10ke_lcell \line_start~I (
// Equation(s):
// line_start = DFFEA(pre_cend, GLOBAL(\fclk~dataout ), , , \line_start~189 , , )

        .dataa(\line_start~189 ),
        .datab(vcc),
        .datac(vcc),
        .datad(pre_cend),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(line_start),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \line_start~I .clock_enable_mode = "true";
defparam \line_start~I .lut_mask = "ff00";
defparam \line_start~I .operation_mode = "normal";
defparam \line_start~I .output_mode = "reg_only";
defparam \line_start~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J11
flex10ke_lcell \hsync_start~I (
// Equation(s):
// hsync_start = DFFEA(pre_cend & (\Equal3~46  # hsync_start), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(\Equal3~46 ),
        .datac(hsync_start),
        .datad(pre_cend),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hsync_start),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hsync_start~I .clock_enable_mode = "false";
defparam \hsync_start~I .lut_mask = "fc00";
defparam \hsync_start~I .operation_mode = "normal";
defparam \hsync_start~I .output_mode = "reg_only";
defparam \hsync_start~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H7
flex10ke_lcell \hint_start~I (
// Equation(s):
// hint_start = DFFEA(!hcount[2] & pre_cend & \Equal0~52 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(hcount[2]),
        .datac(pre_cend),
        .datad(\Equal0~52 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hint_start),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hint_start~I .clock_enable_mode = "false";
defparam \hint_start~I .lut_mask = "3000";
defparam \hint_start~I .operation_mode = "normal";
defparam \hint_start~I .output_mode = "reg_only";
defparam \hint_start~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J19
flex10ke_lcell \line_start~_wirecell_I (
// Equation(s):
// line_start1 = !line_start

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(line_start),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(line_start1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \line_start~_wirecell_I .clock_enable_mode = "false";
defparam \line_start~_wirecell_I .lut_mask = "00ff";
defparam \line_start~_wirecell_I .operation_mode = "normal";
defparam \line_start~_wirecell_I .output_mode = "comb_only";
defparam \line_start~_wirecell_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H16
flex10ke_lcell \hcount[0]~I (
// Equation(s):
// hcount[0] = DFFEA(!hcount[0], GLOBAL(\fclk~dataout ), , , cend, , )
// \Add0|adder|result_node|cout [0] = CARRY(hcount[0])

        .dataa(cend),
        .datab(hcount[0]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[0]),
        .cout(\Add0|adder|result_node|cout [0]),
        .cascout());
// synopsys translate_off
defparam \hcount[0]~I .clock_enable_mode = "true";
defparam \hcount[0]~I .lut_mask = "33cc";
defparam \hcount[0]~I .operation_mode = "arithmetic";
defparam \hcount[0]~I .output_mode = "reg_only";
defparam \hcount[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H16
flex10ke_lcell \Add0|adder|result_node|cs_buffer[1]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [1] = hcount[1] $ \Add0|adder|result_node|cout [0]
// \Add0|adder|result_node|cout [1] = CARRY(hcount[1] & \Add0|adder|result_node|cout [0])

        .dataa(vcc),
        .datab(hcount[1]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [0]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [1]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [1]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[1]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[1]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[1]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[1]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[1]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H16
flex10ke_lcell \hcount[1]~I (
// Equation(s):
// hcount[1] = DFFEA(\Add0|adder|result_node|cs_buffer [1], GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[1]~I .clock_enable_mode = "true";
defparam \hcount[1]~I .lut_mask = "ff00";
defparam \hcount[1]~I .operation_mode = "normal";
defparam \hcount[1]~I .output_mode = "reg_only";
defparam \hcount[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H16
flex10ke_lcell \Add0|adder|result_node|cs_buffer[2]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [2] = hcount[2] $ \Add0|adder|result_node|cout [1]
// \Add0|adder|result_node|cout [2] = CARRY(hcount[2] & \Add0|adder|result_node|cout [1])

        .dataa(vcc),
        .datab(hcount[2]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [1]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [2]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [2]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[2]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[2]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[2]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[2]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[2]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H16
flex10ke_lcell \hcount[2]~I (
// Equation(s):
// hcount[2] = DFFEA(\Add0|adder|result_node|cs_buffer [2], GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[2]~I .clock_enable_mode = "true";
defparam \hcount[2]~I .lut_mask = "ff00";
defparam \hcount[2]~I .operation_mode = "normal";
defparam \hcount[2]~I .output_mode = "reg_only";
defparam \hcount[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H16
flex10ke_lcell \Add0|adder|result_node|cs_buffer[3]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [3] = hcount[3] $ \Add0|adder|result_node|cout [2]
// \Add0|adder|result_node|cout [3] = CARRY(hcount[3] & \Add0|adder|result_node|cout [2])

        .dataa(vcc),
        .datab(hcount[3]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [2]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [3]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [3]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[3]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[3]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[3]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[3]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[3]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H16
flex10ke_lcell \hcount[3]~I (
// Equation(s):
// hcount[3] = DFFEA(\Add0|adder|result_node|cs_buffer [3], GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[3]~I .clock_enable_mode = "true";
defparam \hcount[3]~I .lut_mask = "ff00";
defparam \hcount[3]~I .operation_mode = "normal";
defparam \hcount[3]~I .output_mode = "reg_only";
defparam \hcount[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H18
flex10ke_lcell \Add0|adder|result_node|cs_buffer[4]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [4] = hcount[4] $ \Add0|adder|result_node|cout [3]
// \Add0|adder|result_node|cout [4] = CARRY(hcount[4] & \Add0|adder|result_node|cout [3])

        .dataa(vcc),
        .datab(hcount[4]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [3]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [4]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [4]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[4]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[4]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[4]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[4]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[4]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H18
flex10ke_lcell \hcount[4]~I (
// Equation(s):
// hcount[4] = DFFEA(\Add0|adder|result_node|cs_buffer [4], GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[4]~I .clock_enable_mode = "true";
defparam \hcount[4]~I .lut_mask = "ff00";
defparam \hcount[4]~I .operation_mode = "normal";
defparam \hcount[4]~I .output_mode = "reg_only";
defparam \hcount[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H18
flex10ke_lcell \Add0|adder|result_node|cs_buffer[5]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [5] = hcount[5] $ \Add0|adder|result_node|cout [4]
// \Add0|adder|result_node|cout [5] = CARRY(hcount[5] & \Add0|adder|result_node|cout [4])

        .dataa(vcc),
        .datab(hcount[5]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [4]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [5]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [5]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[5]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[5]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[5]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[5]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[5]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H18
flex10ke_lcell \hcount[5]~I (
// Equation(s):
// hcount[5] = DFFEA(\Add0|adder|result_node|cs_buffer [5], GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[5]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[5]~I .clock_enable_mode = "true";
defparam \hcount[5]~I .lut_mask = "ff00";
defparam \hcount[5]~I .operation_mode = "normal";
defparam \hcount[5]~I .output_mode = "reg_only";
defparam \hcount[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H9
flex10ke_lcell \Equal3~47_I (
// Equation(s):
// \Equal3~47  = hcount[3] & hcount[1]

        .dataa(vcc),
        .datab(vcc),
        .datac(hcount[3]),
        .datad(hcount[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal3~47 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal3~47_I .clock_enable_mode = "false";
defparam \Equal3~47_I .lut_mask = "f000";
defparam \Equal3~47_I .operation_mode = "normal";
defparam \Equal3~47_I .output_mode = "comb_only";
defparam \Equal3~47_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H9
flex10ke_lcell \Equal0~51_I (
// Equation(s):
// \Equal0~51  = !hcount[6] & hcount[5] & \Equal3~47  & hcount[0]

        .dataa(hcount[6]),
        .datab(hcount[5]),
        .datac(\Equal3~47 ),
        .datad(hcount[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal0~51 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal0~51_I .clock_enable_mode = "false";
defparam \Equal0~51_I .lut_mask = "4000";
defparam \Equal0~51_I .operation_mode = "normal";
defparam \Equal0~51_I .output_mode = "comb_only";
defparam \Equal0~51_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H7
flex10ke_lcell \Equal0~52_I (
// Equation(s):
// \Equal0~52  = hcount[7] & hcount[4] & hcount[8] & \Equal0~51 

        .dataa(hcount[7]),
        .datab(hcount[4]),
        .datac(hcount[8]),
        .datad(\Equal0~51 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal0~52 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal0~52_I .clock_enable_mode = "false";
defparam \Equal0~52_I .lut_mask = "8000";
defparam \Equal0~52_I .operation_mode = "normal";
defparam \Equal0~52_I .output_mode = "comb_only";
defparam \Equal0~52_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H18
flex10ke_lcell \Add0|adder|result_node|cs_buffer[6]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [6] = hcount[6] $ \Add0|adder|result_node|cout [5]
// \Add0|adder|result_node|cout [6] = CARRY(hcount[6] & \Add0|adder|result_node|cout [5])

        .dataa(vcc),
        .datab(hcount[6]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [5]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [6]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [6]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[6]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[6]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[6]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[6]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[6]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H7
flex10ke_lcell \hcount[6]~I (
// Equation(s):
// hcount[6] = DFFEA(\Add0|adder|result_node|cs_buffer [6] & (!hcount[2] # !\Equal0~52 ), GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(\Equal0~52 ),
        .datac(hcount[2]),
        .datad(\Add0|adder|result_node|cs_buffer [6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[6]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[6]~I .clock_enable_mode = "true";
defparam \hcount[6]~I .lut_mask = "3f00";
defparam \hcount[6]~I .operation_mode = "normal";
defparam \hcount[6]~I .output_mode = "reg_only";
defparam \hcount[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H18
flex10ke_lcell \Add0|adder|result_node|cs_buffer[7]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [7] = hcount[7] $ \Add0|adder|result_node|cout [6]
// \Add0|adder|result_node|cout [7] = CARRY(hcount[7] & \Add0|adder|result_node|cout [6])

        .dataa(vcc),
        .datab(hcount[7]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [6]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [7]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [7]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[7]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[7]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[7]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[7]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[7]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H7
flex10ke_lcell \hcount[7]~I (
// Equation(s):
// hcount[7] = DFFEA(\Add0|adder|result_node|cs_buffer [7] & (!hcount[2] # !\Equal0~52 ), GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(\Equal0~52 ),
        .datac(hcount[2]),
        .datad(\Add0|adder|result_node|cs_buffer [7]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[7]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[7]~I .clock_enable_mode = "true";
defparam \hcount[7]~I .lut_mask = "3f00";
defparam \hcount[7]~I .operation_mode = "normal";
defparam \hcount[7]~I .output_mode = "reg_only";
defparam \hcount[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H18
flex10ke_lcell \Add0|adder|unreg_res_node[8]~I (
// Equation(s):
// \Add0|adder|unreg_res_node [8] = \Add0|adder|result_node|cout [7] $ hcount[8]

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(hcount[8]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [7]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|unreg_res_node [8]),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|unreg_res_node[8]~I .cin_used = "true";
defparam \Add0|adder|unreg_res_node[8]~I .clock_enable_mode = "false";
defparam \Add0|adder|unreg_res_node[8]~I .lut_mask = "0ff0";
defparam \Add0|adder|unreg_res_node[8]~I .operation_mode = "normal";
defparam \Add0|adder|unreg_res_node[8]~I .output_mode = "comb_only";
defparam \Add0|adder|unreg_res_node[8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H7
flex10ke_lcell \hcount[8]~I (
// Equation(s):
// hcount[8] = DFFEA(\Add0|adder|unreg_res_node [8] & (!hcount[2] # !\Equal0~52 ), GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(\Equal0~52 ),
        .datac(hcount[2]),
        .datad(\Add0|adder|unreg_res_node [8]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[8]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[8]~I .clock_enable_mode = "true";
defparam \hcount[8]~I .lut_mask = "3f00";
defparam \hcount[8]~I .operation_mode = "normal";
defparam \hcount[8]~I .output_mode = "reg_only";
defparam \hcount[8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H9
flex10ke_lcell \Equal1~46_I (
// Equation(s):
// \Equal1~46  = !hcount[0] & !hcount[5] & !hcount[4] & !hcount[6]

        .dataa(hcount[0]),
        .datab(hcount[5]),
        .datac(hcount[4]),
        .datad(hcount[6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal1~46 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal1~46_I .clock_enable_mode = "false";
defparam \Equal1~46_I .lut_mask = "0001";
defparam \Equal1~46_I .operation_mode = "normal";
defparam \Equal1~46_I .output_mode = "comb_only";
defparam \Equal1~46_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H9
flex10ke_lcell \Equal1~47_I (
// Equation(s):
// \Equal1~47  = !hcount[1] & \Equal1~46 

        .dataa(vcc),
        .datab(vcc),
        .datac(hcount[1]),
        .datad(\Equal1~46 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal1~47 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal1~47_I .clock_enable_mode = "false";
defparam \Equal1~47_I .lut_mask = "0f00";
defparam \Equal1~47_I .operation_mode = "normal";
defparam \Equal1~47_I .output_mode = "comb_only";
defparam \Equal1~47_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H16
flex10ke_lcell \hpix~66_I (
// Equation(s):
// \hpix~66  = hcount[2] & hcount[3] & hcount[7] & \Equal1~47 

        .dataa(hcount[2]),
        .datab(hcount[3]),
        .datac(hcount[7]),
        .datad(\Equal1~47 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\hpix~66 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hpix~66_I .clock_enable_mode = "false";
defparam \hpix~66_I .lut_mask = "8000";
defparam \hpix~66_I .operation_mode = "normal";
defparam \hpix~66_I .output_mode = "comb_only";
defparam \hpix~66_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H9
flex10ke_lcell \Equal2~60_I (
// Equation(s):
// \Equal2~60  = !hcount[0] & !hcount[5] & !hcount[1] & hcount[6]

        .dataa(hcount[0]),
        .datab(hcount[5]),
        .datac(hcount[1]),
        .datad(hcount[6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal2~60 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal2~60_I .clock_enable_mode = "false";
defparam \Equal2~60_I .lut_mask = "0100";
defparam \Equal2~60_I .operation_mode = "normal";
defparam \Equal2~60_I .output_mode = "comb_only";
defparam \Equal2~60_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H7
flex10ke_lcell \Equal1~48_I (
// Equation(s):
// \Equal1~48  = !hcount[2] & !hcount[7] & !hcount[8]

        .dataa(vcc),
        .datab(hcount[2]),
        .datac(hcount[7]),
        .datad(hcount[8]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal1~48 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal1~48_I .clock_enable_mode = "false";
defparam \Equal1~48_I .lut_mask = "0003";
defparam \Equal1~48_I .operation_mode = "normal";
defparam \Equal1~48_I .output_mode = "comb_only";
defparam \Equal1~48_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H9
flex10ke_lcell \Equal2~61_I (
// Equation(s):
// \Equal2~61  = \Equal2~60  & hcount[4] & \Equal1~48  & hcount[3]

        .dataa(\Equal2~60 ),
        .datab(hcount[4]),
        .datac(\Equal1~48 ),
        .datad(hcount[3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal2~61 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal2~61_I .clock_enable_mode = "false";
defparam \Equal2~61_I .lut_mask = "8000";
defparam \Equal2~61_I .operation_mode = "normal";
defparam \Equal2~61_I .output_mode = "comb_only";
defparam \Equal2~61_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H9
flex10ke_lcell \Equal1~49_I (
// Equation(s):
// \Equal1~49  = !hcount[1] & !hcount[3] & \Equal1~46  & \Equal1~48 

        .dataa(hcount[1]),
        .datab(hcount[3]),
        .datac(\Equal1~46 ),
        .datad(\Equal1~48 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal1~49 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal1~49_I .clock_enable_mode = "false";
defparam \Equal1~49_I .lut_mask = "1000";
defparam \Equal1~49_I .operation_mode = "normal";
defparam \Equal1~49_I .output_mode = "comb_only";
defparam \Equal1~49_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H7
flex10ke_lcell \Equal4~23_I (
// Equation(s):
// \Equal4~23  = !hcount[4] & \Equal1~48  & \Equal0~51 

        .dataa(vcc),
        .datab(hcount[4]),
        .datac(\Equal1~48 ),
        .datad(\Equal0~51 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal4~23 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal4~23_I .clock_enable_mode = "false";
defparam \Equal4~23_I .lut_mask = "3000";
defparam \Equal4~23_I .operation_mode = "normal";
defparam \Equal4~23_I .output_mode = "comb_only";
defparam \Equal4~23_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H9
flex10ke_lcell \Equal3~46_I (
// Equation(s):
// \Equal3~46  = hcount[3] & hcount[1] & \Equal1~48  & \Equal1~46 

        .dataa(hcount[3]),
        .datab(hcount[1]),
        .datac(\Equal1~48 ),
        .datad(\Equal1~46 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal3~46 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal3~46_I .clock_enable_mode = "false";
defparam \Equal3~46_I .lut_mask = "8000";
defparam \Equal3~46_I .operation_mode = "normal";
defparam \Equal3~46_I .output_mode = "comb_only";
defparam \Equal3~46_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H13
flex10ke_lcell \line_start~189_I (
// Equation(s):
// \line_start~189  = \Equal2~61  # !pre_cend

        .dataa(vcc),
        .datab(vcc),
        .datac(pre_cend),
        .datad(\Equal2~61 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\line_start~189 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \line_start~189_I .clock_enable_mode = "false";
defparam \line_start~189_I .lut_mask = "ff0f";
defparam \line_start~189_I .operation_mode = "normal";
defparam \line_start~189_I .output_mode = "comb_only";
defparam \line_start~189_I .packed_mode = "false";
// synopsys translate_on

endmodule

module syncv (
        vpix,
        vblank,
        vsync,
        int_start,
        line_start,
        hsync_start,
        hint_start,
        clk,
        int_start1,
        devpor,
        devclrn,
        devoe);
output  vpix;
output  vblank;
output  vsync;
output  int_start;
input   line_start;
input   hsync_start;
input   hint_start;
input   clk;
output  int_start1;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \vsync~84 ;
wire \Equal0~36 ;
wire \always2~73 ;
wire \always2~74 ;
wire \Equal5~48 ;
wire \Equal5~49 ;
wire \vpix~76 ;
wire \Equal1~38 ;
wire \vblank~40 ;
wire \always2~75 ;
wire \vsync~91 ;
wire \vsync~87 ;
wire [8:0] vcount;
wire [8:0] \Add0|adder|result_node|cout ;
wire [8:0] \Add0|adder|result_node|cs_buffer ;
wire [8:0] \Add0|adder|unreg_res_node ;


// atom is at LC1_B36
flex10ke_lcell \vpix~I (
// Equation(s):
// vpix = DFFEA(\vpix~76 , GLOBAL(\fclk~dataout ), , , hsync_start, , )

        .dataa(hsync_start),
        .datab(vcc),
        .datac(vcc),
        .datad(\vpix~76 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vpix),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vpix~I .clock_enable_mode = "true";
defparam \vpix~I .lut_mask = "ff00";
defparam \vpix~I .operation_mode = "normal";
defparam \vpix~I .output_mode = "reg_only";
defparam \vpix~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_B34
flex10ke_lcell \vblank~I (
// Equation(s):
// vblank = DFFEA(\vblank~40 , GLOBAL(\fclk~dataout ), , , hsync_start, , )

        .dataa(hsync_start),
        .datab(vcc),
        .datac(vcc),
        .datad(\vblank~40 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vblank),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vblank~I .clock_enable_mode = "true";
defparam \vblank~I .lut_mask = "ff00";
defparam \vblank~I .operation_mode = "normal";
defparam \vblank~I .output_mode = "reg_only";
defparam \vblank~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B34
flex10ke_lcell \vsync~I (
// Equation(s):
// vsync = DFFEA(!\vsync~87 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\vsync~87 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vsync),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vsync~I .clock_enable_mode = "false";
defparam \vsync~I .lut_mask = "00ff";
defparam \vsync~I .operation_mode = "normal";
defparam \vsync~I .output_mode = "reg_only";
defparam \vsync~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B34
flex10ke_lcell \int_start~I (
// Equation(s):
// int_start = DFFEA(!vcount[3] & !vcount[5] & hint_start & \Equal1~38 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcount[3]),
        .datab(vcount[5]),
        .datac(hint_start),
        .datad(\Equal1~38 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_start),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_start~I .clock_enable_mode = "false";
defparam \int_start~I .lut_mask = "1000";
defparam \int_start~I .operation_mode = "normal";
defparam \int_start~I .output_mode = "reg_only";
defparam \int_start~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I4
flex10ke_lcell \int_start~_wirecell_I (
// Equation(s):
// int_start1 = !int_start

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(int_start),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(int_start1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_start~_wirecell_I .clock_enable_mode = "false";
defparam \int_start~_wirecell_I .lut_mask = "00ff";
defparam \int_start~_wirecell_I .operation_mode = "normal";
defparam \int_start~_wirecell_I .output_mode = "comb_only";
defparam \int_start~_wirecell_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B28
flex10ke_lcell \vcount[0]~I (
// Equation(s):
// vcount[0] = DFFEA(!vcount[0], GLOBAL(\fclk~dataout ), , , hsync_start, , )
// \Add0|adder|result_node|cout [0] = CARRY(vcount[0])

        .dataa(hsync_start),
        .datab(vcount[0]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vcount[0]),
        .cout(\Add0|adder|result_node|cout [0]),
        .cascout());
// synopsys translate_off
defparam \vcount[0]~I .clock_enable_mode = "true";
defparam \vcount[0]~I .lut_mask = "33cc";
defparam \vcount[0]~I .operation_mode = "arithmetic";
defparam \vcount[0]~I .output_mode = "reg_only";
defparam \vcount[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B28
flex10ke_lcell \Add0|adder|result_node|cs_buffer[1]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [1] = vcount[1] $ \Add0|adder|result_node|cout [0]
// \Add0|adder|result_node|cout [1] = CARRY(vcount[1] & \Add0|adder|result_node|cout [0])

        .dataa(vcc),
        .datab(vcount[1]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [0]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [1]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [1]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[1]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[1]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[1]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[1]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[1]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B28
flex10ke_lcell \vcount[1]~I (
// Equation(s):
// vcount[1] = DFFEA(\Add0|adder|result_node|cs_buffer [1], GLOBAL(\fclk~dataout ), , , hsync_start, , )

        .dataa(hsync_start),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vcount[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vcount[1]~I .clock_enable_mode = "true";
defparam \vcount[1]~I .lut_mask = "ff00";
defparam \vcount[1]~I .operation_mode = "normal";
defparam \vcount[1]~I .output_mode = "reg_only";
defparam \vcount[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_B28
flex10ke_lcell \Add0|adder|result_node|cs_buffer[2]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [2] = vcount[2] $ \Add0|adder|result_node|cout [1]
// \Add0|adder|result_node|cout [2] = CARRY(vcount[2] & \Add0|adder|result_node|cout [1])

        .dataa(vcc),
        .datab(vcount[2]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [1]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [2]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [2]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[2]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[2]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[2]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[2]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[2]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B28
flex10ke_lcell \vcount[2]~I (
// Equation(s):
// vcount[2] = DFFEA(\Add0|adder|result_node|cs_buffer [2], GLOBAL(\fclk~dataout ), , , hsync_start, , )

        .dataa(hsync_start),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vcount[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vcount[2]~I .clock_enable_mode = "true";
defparam \vcount[2]~I .lut_mask = "ff00";
defparam \vcount[2]~I .operation_mode = "normal";
defparam \vcount[2]~I .output_mode = "reg_only";
defparam \vcount[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_B28
flex10ke_lcell \Add0|adder|result_node|cs_buffer[3]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [3] = vcount[3] $ \Add0|adder|result_node|cout [2]
// \Add0|adder|result_node|cout [3] = CARRY(vcount[3] & \Add0|adder|result_node|cout [2])

        .dataa(vcc),
        .datab(vcount[3]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [2]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [3]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [3]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[3]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[3]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[3]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[3]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[3]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_B34
flex10ke_lcell \vcount[3]~I (
// Equation(s):
// vcount[3] = DFFEA(\Add0|adder|result_node|cs_buffer [3], GLOBAL(\fclk~dataout ), , , hsync_start, , )

        .dataa(hsync_start),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vcount[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vcount[3]~I .clock_enable_mode = "true";
defparam \vcount[3]~I .lut_mask = "ff00";
defparam \vcount[3]~I .operation_mode = "normal";
defparam \vcount[3]~I .output_mode = "reg_only";
defparam \vcount[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B30
flex10ke_lcell \Add0|adder|result_node|cs_buffer[4]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [4] = vcount[4] $ \Add0|adder|result_node|cout [3]
// \Add0|adder|result_node|cout [4] = CARRY(vcount[4] & \Add0|adder|result_node|cout [3])

        .dataa(vcc),
        .datab(vcount[4]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [3]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [4]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [4]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[4]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[4]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[4]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[4]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[4]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B30
flex10ke_lcell \vcount[4]~I (
// Equation(s):
// vcount[4] = DFFEA(\Add0|adder|result_node|cs_buffer [4], GLOBAL(\fclk~dataout ), , , hsync_start, , )

        .dataa(hsync_start),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vcount[4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vcount[4]~I .clock_enable_mode = "true";
defparam \vcount[4]~I .lut_mask = "ff00";
defparam \vcount[4]~I .operation_mode = "normal";
defparam \vcount[4]~I .output_mode = "reg_only";
defparam \vcount[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_B36
flex10ke_lcell \Equal0~36_I (
// Equation(s):
// \Equal0~36  = vcount[5] & vcount[2] & vcount[8] & vcount[4]

        .dataa(vcount[5]),
        .datab(vcount[2]),
        .datac(vcount[8]),
        .datad(vcount[4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal0~36 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal0~36_I .clock_enable_mode = "false";
defparam \Equal0~36_I .lut_mask = "8000";
defparam \Equal0~36_I .operation_mode = "normal";
defparam \Equal0~36_I .output_mode = "comb_only";
defparam \Equal0~36_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B30
flex10ke_lcell \Add0|adder|result_node|cs_buffer[5]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [5] = vcount[5] $ \Add0|adder|result_node|cout [4]
// \Add0|adder|result_node|cout [5] = CARRY(vcount[5] & \Add0|adder|result_node|cout [4])

        .dataa(vcc),
        .datab(vcount[5]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [4]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [5]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [5]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[5]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[5]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[5]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[5]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[5]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_B30
flex10ke_lcell \vcount[5]~I (
// Equation(s):
// vcount[5] = DFFEA(\Add0|adder|result_node|cs_buffer [5], GLOBAL(\fclk~dataout ), , , hsync_start, , )

        .dataa(hsync_start),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vcount[5]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vcount[5]~I .clock_enable_mode = "true";
defparam \vcount[5]~I .lut_mask = "ff00";
defparam \vcount[5]~I .operation_mode = "normal";
defparam \vcount[5]~I .output_mode = "reg_only";
defparam \vcount[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B30
flex10ke_lcell \Add0|adder|result_node|cs_buffer[6]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [6] = vcount[6] $ \Add0|adder|result_node|cout [5]
// \Add0|adder|result_node|cout [6] = CARRY(vcount[6] & \Add0|adder|result_node|cout [5])

        .dataa(vcc),
        .datab(vcount[6]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [5]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [6]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [6]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[6]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[6]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[6]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[6]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[6]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B36
flex10ke_lcell \vcount[6]~I (
// Equation(s):
// vcount[6] = DFFEA(\Add0|adder|result_node|cs_buffer [6] & (!\always2~74  # !\Equal0~36 ), GLOBAL(\fclk~dataout ), , , hsync_start, , )

        .dataa(hsync_start),
        .datab(\Equal0~36 ),
        .datac(\always2~74 ),
        .datad(\Add0|adder|result_node|cs_buffer [6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vcount[6]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vcount[6]~I .clock_enable_mode = "true";
defparam \vcount[6]~I .lut_mask = "3f00";
defparam \vcount[6]~I .operation_mode = "normal";
defparam \vcount[6]~I .output_mode = "reg_only";
defparam \vcount[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B30
flex10ke_lcell \Add0|adder|result_node|cs_buffer[7]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [7] = vcount[7] $ \Add0|adder|result_node|cout [6]
// \Add0|adder|result_node|cout [7] = CARRY(vcount[7] & \Add0|adder|result_node|cout [6])

        .dataa(vcc),
        .datab(vcount[7]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [6]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [7]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [7]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[7]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[7]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[7]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[7]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[7]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_B30
flex10ke_lcell \vcount[7]~I (
// Equation(s):
// vcount[7] = DFFEA(\Add0|adder|result_node|cs_buffer [7], GLOBAL(\fclk~dataout ), , , hsync_start, , )

        .dataa(hsync_start),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [7]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vcount[7]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vcount[7]~I .clock_enable_mode = "true";
defparam \vcount[7]~I .lut_mask = "ff00";
defparam \vcount[7]~I .operation_mode = "normal";
defparam \vcount[7]~I .output_mode = "reg_only";
defparam \vcount[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B28
flex10ke_lcell \always2~73_I (
// Equation(s):
// \always2~73  = vcount[0] & vcount[1]

        .dataa(vcc),
        .datab(vcc),
        .datac(vcount[0]),
        .datad(vcount[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always2~73 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always2~73_I .clock_enable_mode = "false";
defparam \always2~73_I .lut_mask = "f000";
defparam \always2~73_I .operation_mode = "normal";
defparam \always2~73_I .output_mode = "comb_only";
defparam \always2~73_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B34
flex10ke_lcell \always2~74_I (
// Equation(s):
// \always2~74  = !vcount[6] & !vcount[7] & \always2~73  & vcount[3]

        .dataa(vcount[6]),
        .datab(vcount[7]),
        .datac(\always2~73 ),
        .datad(vcount[3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always2~74 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always2~74_I .clock_enable_mode = "false";
defparam \always2~74_I .lut_mask = "1000";
defparam \always2~74_I .operation_mode = "normal";
defparam \always2~74_I .output_mode = "comb_only";
defparam \always2~74_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B30
flex10ke_lcell \Add0|adder|unreg_res_node[8]~I (
// Equation(s):
// \Add0|adder|unreg_res_node [8] = \Add0|adder|result_node|cout [7] $ vcount[8]

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(vcount[8]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [7]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|unreg_res_node [8]),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|unreg_res_node[8]~I .cin_used = "true";
defparam \Add0|adder|unreg_res_node[8]~I .clock_enable_mode = "false";
defparam \Add0|adder|unreg_res_node[8]~I .lut_mask = "0ff0";
defparam \Add0|adder|unreg_res_node[8]~I .operation_mode = "normal";
defparam \Add0|adder|unreg_res_node[8]~I .output_mode = "comb_only";
defparam \Add0|adder|unreg_res_node[8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_B36
flex10ke_lcell \vcount[8]~I (
// Equation(s):
// vcount[8] = DFFEA(\Add0|adder|unreg_res_node [8] & (!\always2~74  # !\Equal0~36 ), GLOBAL(\fclk~dataout ), , , hsync_start, , )

        .dataa(hsync_start),
        .datab(\Equal0~36 ),
        .datac(\always2~74 ),
        .datad(\Add0|adder|unreg_res_node [8]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vcount[8]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vcount[8]~I .clock_enable_mode = "true";
defparam \vcount[8]~I .lut_mask = "3f00";
defparam \vcount[8]~I .operation_mode = "normal";
defparam \vcount[8]~I .output_mode = "reg_only";
defparam \vcount[8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B28
flex10ke_lcell \Equal5~48_I (
// Equation(s):
// \Equal5~48  = !vcount[0] & !vcount[1] & !vcount[2] & !vcount[7]

        .dataa(vcount[0]),
        .datab(vcount[1]),
        .datac(vcount[2]),
        .datad(vcount[7]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal5~48 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal5~48_I .clock_enable_mode = "false";
defparam \Equal5~48_I .lut_mask = "0001";
defparam \Equal5~48_I .operation_mode = "normal";
defparam \Equal5~48_I .output_mode = "comb_only";
defparam \Equal5~48_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B36
flex10ke_lcell \Equal5~49_I (
// Equation(s):
// \Equal5~49  = !vcount[3] & !vcount[5] & vcount[4] & \Equal5~48 

        .dataa(vcount[3]),
        .datab(vcount[5]),
        .datac(vcount[4]),
        .datad(\Equal5~48 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal5~49 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal5~49_I .clock_enable_mode = "false";
defparam \Equal5~49_I .lut_mask = "1000";
defparam \Equal5~49_I .operation_mode = "normal";
defparam \Equal5~49_I .output_mode = "comb_only";
defparam \Equal5~49_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B36
flex10ke_lcell \vpix~76_I (
// Equation(s):
// \vpix~76  = vcount[8] & vpix & (vcount[6] # !\Equal5~49 ) # !vcount[8] & (vpix # \Equal5~49  & vcount[6])

        .dataa(vcount[8]),
        .datab(\Equal5~49 ),
        .datac(vcount[6]),
        .datad(vpix),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\vpix~76 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vpix~76_I .clock_enable_mode = "false";
defparam \vpix~76_I .lut_mask = "f740";
defparam \vpix~76_I .operation_mode = "normal";
defparam \vpix~76_I .output_mode = "comb_only";
defparam \vpix~76_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B36
flex10ke_lcell \Equal1~38_I (
// Equation(s):
// \Equal1~38  = !vcount[8] & !vcount[4] & !vcount[6] & \Equal5~48 

        .dataa(vcount[8]),
        .datab(vcount[4]),
        .datac(vcount[6]),
        .datad(\Equal5~48 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal1~38 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal1~38_I .clock_enable_mode = "false";
defparam \Equal1~38_I .lut_mask = "0100";
defparam \Equal1~38_I .operation_mode = "normal";
defparam \Equal1~38_I .output_mode = "comb_only";
defparam \Equal1~38_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B34
flex10ke_lcell \vblank~40_I (
// Equation(s):
// \vblank~40  = \Equal1~38  & (vcount[3] & (vblank) # !vcount[3] & !vcount[5]) # !\Equal1~38  & (vblank)

        .dataa(vcount[5]),
        .datab(\Equal1~38 ),
        .datac(vcount[3]),
        .datad(vblank),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\vblank~40 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vblank~40_I .clock_enable_mode = "false";
defparam \vblank~40_I .lut_mask = "f704";
defparam \vblank~40_I .operation_mode = "normal";
defparam \vblank~40_I .output_mode = "comb_only";
defparam \vblank~40_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B36
flex10ke_lcell \always2~75_I (
// Equation(s):
// \always2~75  = !vcount[5] & !vcount[2] & !vcount[8] & !vcount[4]

        .dataa(vcount[5]),
        .datab(vcount[2]),
        .datac(vcount[8]),
        .datad(vcount[4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always2~75 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always2~75_I .clock_enable_mode = "false";
defparam \always2~75_I .lut_mask = "0001";
defparam \always2~75_I .operation_mode = "normal";
defparam \always2~75_I .output_mode = "comb_only";
defparam \always2~75_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B34
flex10ke_lcell \vsync~84_I (
// Equation(s):
// \vsync~91  = \always2~75  & line_start & \always2~74  # !vsync

        .dataa(vsync),
        .datab(\always2~75 ),
        .datac(line_start),
        .datad(\always2~74 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\vsync~84 ),
        .regout(),
        .cout(),
        .cascout(\vsync~91 ));
// synopsys translate_off
defparam \vsync~84_I .clock_enable_mode = "false";
defparam \vsync~84_I .lut_mask = "d555";
defparam \vsync~84_I .operation_mode = "normal";
defparam \vsync~84_I .output_mode = "none";
defparam \vsync~84_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B34
flex10ke_lcell \vsync~87_I (
// Equation(s):
// \vsync~87  = (vcount[5] # !\Equal1~38  # !vcount[3] # !hsync_start) & CASCADE(\vsync~91 )

        .dataa(hsync_start),
        .datab(vcount[3]),
        .datac(\Equal1~38 ),
        .datad(vcount[5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\vsync~91 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\vsync~87 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vsync~87_I .clock_enable_mode = "false";
defparam \vsync~87_I .lut_mask = "ff7f";
defparam \vsync~87_I .operation_mode = "normal";
defparam \vsync~87_I .output_mode = "comb_only";
defparam \vsync~87_I .packed_mode = "false";
// synopsys translate_on

endmodule

module vg93 (
        rst_n,
        always0,
        vgclk_div4_1,
        vg_res_n,
        vg_hrdy,
        vg_rclk,
        vg_rawr,
        vg_a_0,
        vg_a_1,
        vg_wrd,
        vg_side,
        port_wr,
        vg_wrFF,
        drq_sync_1,
        intrq_sync_1,
        fclk,
        zclk,
        step,
        vg_drq,
        vg_wd,
        vg_irq,
        rdat_b_n,
        vg_sr,
        vg_sl,
        vg_tr43,
        d_0,
        d_1,
        d_2,
        d_3,
        d_4,
        devpor,
        devclrn,
        devoe);
input   rst_n;
input   always0;
output  vgclk_div4_1;
output  vg_res_n;
output  vg_hrdy;
output  vg_rclk;
output  vg_rawr;
output  vg_a_0;
output  vg_a_1;
output  vg_wrd;
output  vg_side;
input   port_wr;
input   vg_wrFF;
output  drq_sync_1;
output  intrq_sync_1;
input   fclk;
input   zclk;
input   step;
input   vg_drq;
input   vg_wd;
input   vg_irq;
input   rdat_b_n;
input   vg_sr;
input   vg_sl;
input   vg_tr43;
input   d_0;
input   d_1;
input   d_2;
input   d_3;
input   d_4;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \wrdelay_cnt~755 ;
wire \Equal0~49 ;
wire \turbo_state~30 ;
wire turbo_state;
wire \vg_hrdy~23 ;
wire \Equal2~22 ;
wire rdat_edge1;
wire rdat_edge2;
wire rdat;
wire \rclk_cnt~191 ;
wire \Equal3~51 ;
wire \Equal3~52 ;
wire rwidth_ena;
wire \rwidth_cnt_rtl_6|wysi_counter|counter_cell[0]~COUT ;
wire \rwidth_cnt_rtl_6|wysi_counter|counter_cell[1]~COUT ;
wire wd;
wire \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[0]~COUT ;
wire \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[1]~COUT ;
wire \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[2]~COUT ;
wire \wrdelay_cnt~750 ;
wire \Equal1~25 ;
wire \wrdelay_cnt~768 ;
wire \wrdelay_cnt~758 ;
wire \wrdelay_cnt~745 ;
wire \wrdelay_cnt~748 ;
wire \Equal1~24 ;
wire wrwidth_ena;
wire [2:0] drq_pulse;
wire [1:0] drq_sync;
wire [1:0] intrq_sync;
wire [5:0] rclk_cnt;
wire [4:0] rdat_sync;
wire [1:0] sl_sync;
wire [1:0] sr_sync;
wire [2:0] step_pulse;
wire [1:0] tr43_sync;
wire [1:0] vgclk_div4;
wire [2:0] vgclk_div7;
wire [2:0] wd_sync;
wire [3:0] wrdelay_cnt;
wire [5:0] \Add4|adder|result_node|cs_buffer ;
wire [5:0] \Add4|adder|result_node|cout ;
wire [5:0] \Add4|adder|unreg_res_node ;
wire [3:0] \wrwidth_cnt_rtl_7|wysi_counter|q ;
wire [3:0] \rwidth_cnt_rtl_6|wysi_counter|q ;


// atom is at LC1_J33
flex10ke_lcell \vgclk_div4[1]~I (
// Equation(s):
// vgclk_div4_1 = DFFEA(turbo_state & !vgclk_div4_1 # !turbo_state & (vgclk_div4[0]), GLOBAL(\fclk~dataout ), , , \Equal0~49 , , )

        .dataa(\Equal0~49 ),
        .datab(vgclk_div4_1),
        .datac(turbo_state),
        .datad(vgclk_div4[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vgclk_div4_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vgclk_div4[1]~I .clock_enable_mode = "true";
defparam \vgclk_div4[1]~I .lut_mask = "3f30";
defparam \vgclk_div4[1]~I .operation_mode = "normal";
defparam \vgclk_div4[1]~I .output_mode = "reg_only";
defparam \vgclk_div4[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B35
flex10ke_lcell \vg_res_n~I (
// Equation(s):
// vg_res_n = DFFEA(\d[2]~5 , GLOBAL(\clkz_in~dataout ), rst_out_n, , vg_wrFF, , )

        .dataa(vg_wrFF),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vg_res_n),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vg_res_n~I .clock_enable_mode = "true";
defparam \vg_res_n~I .lut_mask = "ff00";
defparam \vg_res_n~I .operation_mode = "normal";
defparam \vg_res_n~I .output_mode = "reg_only";
defparam \vg_res_n~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F34
flex10ke_lcell \vg_hrdy~I (
// Equation(s):
// vg_hrdy = DFFEA(\d[3]~4 , GLOBAL(\clkz_in~dataout ), , , \vg_hrdy~23 , , )

        .dataa(\vg_hrdy~23 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vg_hrdy),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vg_hrdy~I .clock_enable_mode = "true";
defparam \vg_hrdy~I .lut_mask = "ff00";
defparam \vg_hrdy~I .operation_mode = "normal";
defparam \vg_hrdy~I .output_mode = "reg_only";
defparam \vg_hrdy~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J31
flex10ke_lcell \vg_rclk~I (
// Equation(s):
// vg_rclk = DFFEA(!vg_rclk, GLOBAL(\fclk~dataout ), , , \Equal3~52 , , )

        .dataa(\Equal3~52 ),
        .datab(vcc),
        .datac(vcc),
        .datad(vg_rclk),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vg_rclk),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vg_rclk~I .clock_enable_mode = "true";
defparam \vg_rclk~I .lut_mask = "00ff";
defparam \vg_rclk~I .operation_mode = "normal";
defparam \vg_rclk~I .output_mode = "reg_only";
defparam \vg_rclk~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_J32
flex10ke_lcell \vg_rawr~I (
// Equation(s):
// vg_rawr = DFFEA(\rwidth_cnt_rtl_6|wysi_counter|q [2], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\rwidth_cnt_rtl_6|wysi_counter|q [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vg_rawr),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vg_rawr~I .clock_enable_mode = "false";
defparam \vg_rawr~I .lut_mask = "ff00";
defparam \vg_rawr~I .operation_mode = "normal";
defparam \vg_rawr~I .output_mode = "reg_only";
defparam \vg_rawr~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J23
flex10ke_lcell \vg_a[0]~I (
// Equation(s):
// vg_a_0 = DFFEA(\d[0]~7 , GLOBAL(\clkz_in~dataout ), , , \vg_hrdy~23 , , )

        .dataa(\vg_hrdy~23 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vg_a_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vg_a[0]~I .clock_enable_mode = "true";
defparam \vg_a[0]~I .lut_mask = "ff00";
defparam \vg_a[0]~I .operation_mode = "normal";
defparam \vg_a[0]~I .output_mode = "reg_only";
defparam \vg_a[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J21
flex10ke_lcell \vg_a[1]~I (
// Equation(s):
// vg_a_1 = DFFEA(\d[1]~6 , GLOBAL(\clkz_in~dataout ), , , \vg_hrdy~23 , , )

        .dataa(\vg_hrdy~23 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vg_a_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vg_a[1]~I .clock_enable_mode = "true";
defparam \vg_a[1]~I .lut_mask = "ff00";
defparam \vg_a[1]~I .operation_mode = "normal";
defparam \vg_a[1]~I .output_mode = "reg_only";
defparam \vg_a[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_F26
flex10ke_lcell \vg_wrd~I (
// Equation(s):
// vg_wrd = DFFEA(\wrwidth_cnt_rtl_7|wysi_counter|q [0] # \wrwidth_cnt_rtl_7|wysi_counter|q [1] # \wrwidth_cnt_rtl_7|wysi_counter|q [2], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(\wrwidth_cnt_rtl_7|wysi_counter|q [0]),
        .datac(\wrwidth_cnt_rtl_7|wysi_counter|q [1]),
        .datad(\wrwidth_cnt_rtl_7|wysi_counter|q [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vg_wrd),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vg_wrd~I .clock_enable_mode = "false";
defparam \vg_wrd~I .lut_mask = "fffc";
defparam \vg_wrd~I .operation_mode = "normal";
defparam \vg_wrd~I .output_mode = "reg_only";
defparam \vg_wrd~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J25
flex10ke_lcell \vg_side~I (
// Equation(s):
// vg_side = DFFEA(!\d[4]~3 , GLOBAL(\clkz_in~dataout ), , , \vg_hrdy~23 , , )

        .dataa(\vg_hrdy~23 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vg_side),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vg_side~I .clock_enable_mode = "true";
defparam \vg_side~I .lut_mask = "00ff";
defparam \vg_side~I .operation_mode = "normal";
defparam \vg_side~I .output_mode = "reg_only";
defparam \vg_side~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_E33
flex10ke_lcell \drq_sync[1]~I (
// Equation(s):
// drq_sync_1 = DFFEA(drq_sync[0], GLOBAL(\clkz_in~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(drq_sync[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(drq_sync_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \drq_sync[1]~I .clock_enable_mode = "false";
defparam \drq_sync[1]~I .lut_mask = "ff00";
defparam \drq_sync[1]~I .operation_mode = "normal";
defparam \drq_sync[1]~I .output_mode = "reg_only";
defparam \drq_sync[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H24
flex10ke_lcell \intrq_sync[1]~I (
// Equation(s):
// intrq_sync_1 = DFFEA(intrq_sync[0], GLOBAL(\clkz_in~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(intrq_sync[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(intrq_sync_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \intrq_sync[1]~I .clock_enable_mode = "false";
defparam \intrq_sync[1]~I .lut_mask = "ff00";
defparam \intrq_sync[1]~I .operation_mode = "normal";
defparam \intrq_sync[1]~I .output_mode = "reg_only";
defparam \intrq_sync[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_J33
flex10ke_lcell \vgclk_div7[0]~I (
// Equation(s):
// vgclk_div7[0] = DFFEA(!vgclk_div7[0] & !\Equal0~49 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vgclk_div7[0]),
        .datad(\Equal0~49 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vgclk_div7[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vgclk_div7[0]~I .clock_enable_mode = "false";
defparam \vgclk_div7[0]~I .lut_mask = "000f";
defparam \vgclk_div7[0]~I .operation_mode = "normal";
defparam \vgclk_div7[0]~I .output_mode = "reg_only";
defparam \vgclk_div7[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J33
flex10ke_lcell \vgclk_div7[1]~I (
// Equation(s):
// vgclk_div7[1] = DFFEA(!\Equal0~49  & (vgclk_div7[0] $ vgclk_div7[1]), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vgclk_div7[0]),
        .datac(vgclk_div7[1]),
        .datad(\Equal0~49 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vgclk_div7[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vgclk_div7[1]~I .clock_enable_mode = "false";
defparam \vgclk_div7[1]~I .lut_mask = "003c";
defparam \vgclk_div7[1]~I .operation_mode = "normal";
defparam \vgclk_div7[1]~I .output_mode = "reg_only";
defparam \vgclk_div7[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J33
flex10ke_lcell \vgclk_div7[2]~I (
// Equation(s):
// vgclk_div7[2] = DFFEA(!\Equal0~49  & (vgclk_div7[2] $ (vgclk_div7[0] & vgclk_div7[1])), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vgclk_div7[2]),
        .datab(vgclk_div7[0]),
        .datac(vgclk_div7[1]),
        .datad(\Equal0~49 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vgclk_div7[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vgclk_div7[2]~I .clock_enable_mode = "false";
defparam \vgclk_div7[2]~I .lut_mask = "006a";
defparam \vgclk_div7[2]~I .operation_mode = "normal";
defparam \vgclk_div7[2]~I .output_mode = "reg_only";
defparam \vgclk_div7[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_J33
flex10ke_lcell \Equal0~49_I (
// Equation(s):
// \Equal0~49  = vgclk_div7[1] & vgclk_div7[2]

        .dataa(vcc),
        .datab(vcc),
        .datac(vgclk_div7[1]),
        .datad(vgclk_div7[2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal0~49 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal0~49_I .clock_enable_mode = "false";
defparam \Equal0~49_I .lut_mask = "f000";
defparam \Equal0~49_I .operation_mode = "normal";
defparam \Equal0~49_I .output_mode = "comb_only";
defparam \Equal0~49_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_J27
flex10ke_lcell \drq_pulse[0]~I (
// Equation(s):
// drq_pulse[0] = DFFEA(\vg_drq~dataout , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(vg_drq),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(drq_pulse[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \drq_pulse[0]~I .clock_enable_mode = "false";
defparam \drq_pulse[0]~I .lut_mask = "ff00";
defparam \drq_pulse[0]~I .operation_mode = "normal";
defparam \drq_pulse[0]~I .output_mode = "reg_only";
defparam \drq_pulse[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_J27
flex10ke_lcell \drq_pulse[1]~I (
// Equation(s):
// drq_pulse[1] = DFFEA(drq_pulse[0], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(drq_pulse[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(drq_pulse[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \drq_pulse[1]~I .clock_enable_mode = "false";
defparam \drq_pulse[1]~I .lut_mask = "ff00";
defparam \drq_pulse[1]~I .operation_mode = "normal";
defparam \drq_pulse[1]~I .output_mode = "reg_only";
defparam \drq_pulse[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J27
flex10ke_lcell \drq_pulse[2]~I (
// Equation(s):
// drq_pulse[2] = DFFEA(drq_pulse[1], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(drq_pulse[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(drq_pulse[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \drq_pulse[2]~I .clock_enable_mode = "false";
defparam \drq_pulse[2]~I .lut_mask = "ff00";
defparam \drq_pulse[2]~I .operation_mode = "normal";
defparam \drq_pulse[2]~I .output_mode = "reg_only";
defparam \drq_pulse[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_J27
flex10ke_lcell \step_pulse[0]~I (
// Equation(s):
// step_pulse[0] = DFFEA(\step~dataout , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(step),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(step_pulse[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \step_pulse[0]~I .clock_enable_mode = "false";
defparam \step_pulse[0]~I .lut_mask = "ff00";
defparam \step_pulse[0]~I .operation_mode = "normal";
defparam \step_pulse[0]~I .output_mode = "reg_only";
defparam \step_pulse[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J27
flex10ke_lcell \step_pulse[1]~I (
// Equation(s):
// step_pulse[1] = DFFEA(step_pulse[0], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(step_pulse[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(step_pulse[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \step_pulse[1]~I .clock_enable_mode = "false";
defparam \step_pulse[1]~I .lut_mask = "ff00";
defparam \step_pulse[1]~I .operation_mode = "normal";
defparam \step_pulse[1]~I .output_mode = "reg_only";
defparam \step_pulse[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J27
flex10ke_lcell \step_pulse[2]~I (
// Equation(s):
// step_pulse[2] = DFFEA(step_pulse[1], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(step_pulse[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(step_pulse[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \step_pulse[2]~I .clock_enable_mode = "false";
defparam \step_pulse[2]~I .lut_mask = "ff00";
defparam \step_pulse[2]~I .operation_mode = "normal";
defparam \step_pulse[2]~I .output_mode = "reg_only";
defparam \step_pulse[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J27
flex10ke_lcell \turbo_state~30_I (
// Equation(s):
// \turbo_state~30  = turbo_state # !step_pulse[2] & step_pulse[1]

        .dataa(vcc),
        .datab(step_pulse[2]),
        .datac(step_pulse[1]),
        .datad(turbo_state),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\turbo_state~30 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \turbo_state~30_I .clock_enable_mode = "false";
defparam \turbo_state~30_I .lut_mask = "ff30";
defparam \turbo_state~30_I .operation_mode = "normal";
defparam \turbo_state~30_I .output_mode = "comb_only";
defparam \turbo_state~30_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J27
flex10ke_lcell \turbo_state~I (
// Equation(s):
// turbo_state = DFFEA(\turbo_state~30  & (drq_pulse[2] # !drq_pulse[1]), GLOBAL(\fclk~dataout ), rst_out_n, , , , )

        .dataa(vcc),
        .datab(drq_pulse[1]),
        .datac(drq_pulse[2]),
        .datad(\turbo_state~30 ),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(turbo_state),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \turbo_state~I .clock_enable_mode = "false";
defparam \turbo_state~I .lut_mask = "f300";
defparam \turbo_state~I .operation_mode = "normal";
defparam \turbo_state~I .output_mode = "reg_only";
defparam \turbo_state~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J33
flex10ke_lcell \vgclk_div4[0]~I (
// Equation(s):
// vgclk_div4[0] = DFFEA(!vgclk_div4_1, GLOBAL(\fclk~dataout ), , , \Equal0~49 , , )

        .dataa(\Equal0~49 ),
        .datab(vcc),
        .datac(vcc),
        .datad(vgclk_div4_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vgclk_div4[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vgclk_div4[0]~I .clock_enable_mode = "true";
defparam \vgclk_div4[0]~I .lut_mask = "00ff";
defparam \vgclk_div4[0]~I .operation_mode = "normal";
defparam \vgclk_div4[0]~I .output_mode = "reg_only";
defparam \vgclk_div4[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F34
flex10ke_lcell \vg_hrdy~23_I (
// Equation(s):
// \vg_hrdy~23  = port_wr & always0 & rst_out_n

        .dataa(vcc),
        .datab(port_wr),
        .datac(always0),
        .datad(rst_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\vg_hrdy~23 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vg_hrdy~23_I .clock_enable_mode = "false";
defparam \vg_hrdy~23_I .lut_mask = "c000";
defparam \vg_hrdy~23_I .operation_mode = "normal";
defparam \vg_hrdy~23_I .output_mode = "comb_only";
defparam \vg_hrdy~23_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J22
flex10ke_lcell \rclk_cnt[0]~I (
// Equation(s):
// rclk_cnt[0] = DFFEA(\rclk_cnt~191  # !rclk_cnt[0], GLOBAL(\fclk~dataout ), , , , , )
// \Add4|adder|result_node|cout [0] = CARRY(rclk_cnt[0])

        .dataa(\rclk_cnt~191 ),
        .datab(rclk_cnt[0]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rclk_cnt[0]),
        .cout(\Add4|adder|result_node|cout [0]),
        .cascout());
// synopsys translate_off
defparam \rclk_cnt[0]~I .clock_enable_mode = "false";
defparam \rclk_cnt[0]~I .lut_mask = "bbcc";
defparam \rclk_cnt[0]~I .operation_mode = "arithmetic";
defparam \rclk_cnt[0]~I .output_mode = "reg_only";
defparam \rclk_cnt[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J22
flex10ke_lcell \Add4|adder|result_node|cs_buffer[1]~I (
// Equation(s):
// \Add4|adder|result_node|cs_buffer [1] = rclk_cnt[1] $ \Add4|adder|result_node|cout [0]
// \Add4|adder|result_node|cout [1] = CARRY(rclk_cnt[1] # \Add4|adder|result_node|cout [0])

        .dataa(vcc),
        .datab(rclk_cnt[1]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add4|adder|result_node|cout [0]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add4|adder|result_node|cs_buffer [1]),
        .regout(),
        .cout(\Add4|adder|result_node|cout [1]),
        .cascout());
// synopsys translate_off
defparam \Add4|adder|result_node|cs_buffer[1]~I .cin_used = "true";
defparam \Add4|adder|result_node|cs_buffer[1]~I .clock_enable_mode = "false";
defparam \Add4|adder|result_node|cs_buffer[1]~I .lut_mask = "3cfc";
defparam \Add4|adder|result_node|cs_buffer[1]~I .operation_mode = "arithmetic";
defparam \Add4|adder|result_node|cs_buffer[1]~I .output_mode = "comb_only";
defparam \Add4|adder|result_node|cs_buffer[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_J35
flex10ke_lcell \rdat_sync[0]~I (
// Equation(s):
// rdat_sync[0] = DFFEA(!\rdat_b_n~dataout , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(rdat_b_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rdat_sync[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rdat_sync[0]~I .clock_enable_mode = "false";
defparam \rdat_sync[0]~I .lut_mask = "00ff";
defparam \rdat_sync[0]~I .operation_mode = "normal";
defparam \rdat_sync[0]~I .output_mode = "reg_only";
defparam \rdat_sync[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_J35
flex10ke_lcell \rdat_sync[1]~I (
// Equation(s):
// rdat_sync[1] = DFFEA(rdat_sync[0], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(rdat_sync[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rdat_sync[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rdat_sync[1]~I .clock_enable_mode = "false";
defparam \rdat_sync[1]~I .lut_mask = "ff00";
defparam \rdat_sync[1]~I .operation_mode = "normal";
defparam \rdat_sync[1]~I .output_mode = "reg_only";
defparam \rdat_sync[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J35
flex10ke_lcell \rdat_sync[2]~I (
// Equation(s):
// rdat_sync[2] = DFFEA(rdat_sync[1], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(rdat_sync[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rdat_sync[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rdat_sync[2]~I .clock_enable_mode = "false";
defparam \rdat_sync[2]~I .lut_mask = "ff00";
defparam \rdat_sync[2]~I .operation_mode = "normal";
defparam \rdat_sync[2]~I .output_mode = "reg_only";
defparam \rdat_sync[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J35
flex10ke_lcell \rdat_sync[3]~I (
// Equation(s):
// rdat_sync[3] = DFFEA(rdat_sync[2], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(rdat_sync[2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rdat_sync[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rdat_sync[3]~I .clock_enable_mode = "false";
defparam \rdat_sync[3]~I .lut_mask = "ff00";
defparam \rdat_sync[3]~I .operation_mode = "normal";
defparam \rdat_sync[3]~I .output_mode = "reg_only";
defparam \rdat_sync[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J35
flex10ke_lcell \rdat_sync[4]~I (
// Equation(s):
// rdat_sync[4] = DFFEA(rdat_sync[3], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(rdat_sync[3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rdat_sync[4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rdat_sync[4]~I .clock_enable_mode = "false";
defparam \rdat_sync[4]~I .lut_mask = "ff00";
defparam \rdat_sync[4]~I .operation_mode = "normal";
defparam \rdat_sync[4]~I .output_mode = "reg_only";
defparam \rdat_sync[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J35
flex10ke_lcell \Equal2~22_I (
// Equation(s):
// \Equal2~22  = rdat_sync[1] & rdat_sync[2] & rdat_sync[3] & rdat_sync[4]

        .dataa(rdat_sync[1]),
        .datab(rdat_sync[2]),
        .datac(rdat_sync[3]),
        .datad(rdat_sync[4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal2~22 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal2~22_I .clock_enable_mode = "false";
defparam \Equal2~22_I .lut_mask = "8000";
defparam \Equal2~22_I .operation_mode = "normal";
defparam \Equal2~22_I .output_mode = "comb_only";
defparam \Equal2~22_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J31
flex10ke_lcell \rdat_edge1~I (
// Equation(s):
// rdat_edge1 = DFFEA(\Equal2~22  # !\Equal3~52  & rdat_edge1, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(\Equal3~52 ),
        .datac(rdat_edge1),
        .datad(\Equal2~22 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rdat_edge1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rdat_edge1~I .clock_enable_mode = "false";
defparam \rdat_edge1~I .lut_mask = "ff30";
defparam \rdat_edge1~I .operation_mode = "normal";
defparam \rdat_edge1~I .output_mode = "reg_only";
defparam \rdat_edge1~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_J31
flex10ke_lcell \rdat_edge2~I (
// Equation(s):
// rdat_edge2 = DFFEA(rdat_edge1, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(rdat_edge1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rdat_edge2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rdat_edge2~I .clock_enable_mode = "false";
defparam \rdat_edge2~I .lut_mask = "ff00";
defparam \rdat_edge2~I .operation_mode = "normal";
defparam \rdat_edge2~I .output_mode = "reg_only";
defparam \rdat_edge2~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_J31
flex10ke_lcell \rclk_cnt[1]~I (
// Equation(s):
// rclk_cnt[1] = DFFEA(!\Add4|adder|result_node|cs_buffer [1] & (rdat_edge2 # !rdat_edge1), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(\Add4|adder|result_node|cs_buffer [1]),
        .datac(rdat_edge1),
        .datad(rdat_edge2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rclk_cnt[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rclk_cnt[1]~I .clock_enable_mode = "false";
defparam \rclk_cnt[1]~I .lut_mask = "3303";
defparam \rclk_cnt[1]~I .operation_mode = "normal";
defparam \rclk_cnt[1]~I .output_mode = "reg_only";
defparam \rclk_cnt[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J22
flex10ke_lcell \Add4|adder|result_node|cs_buffer[2]~I (
// Equation(s):
// \Add4|adder|result_node|cs_buffer [2] = rclk_cnt[2] $ \Add4|adder|result_node|cout [1]
// \Add4|adder|result_node|cout [2] = CARRY(rclk_cnt[2] # \Add4|adder|result_node|cout [1])

        .dataa(vcc),
        .datab(rclk_cnt[2]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add4|adder|result_node|cout [1]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add4|adder|result_node|cs_buffer [2]),
        .regout(),
        .cout(\Add4|adder|result_node|cout [2]),
        .cascout());
// synopsys translate_off
defparam \Add4|adder|result_node|cs_buffer[2]~I .cin_used = "true";
defparam \Add4|adder|result_node|cs_buffer[2]~I .clock_enable_mode = "false";
defparam \Add4|adder|result_node|cs_buffer[2]~I .lut_mask = "3cfc";
defparam \Add4|adder|result_node|cs_buffer[2]~I .operation_mode = "arithmetic";
defparam \Add4|adder|result_node|cs_buffer[2]~I .output_mode = "comb_only";
defparam \Add4|adder|result_node|cs_buffer[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_J32
flex10ke_lcell \rdat~I (
// Equation(s):
// rdat = rdat_edge2 # !rdat_edge1

        .dataa(vcc),
        .datab(vcc),
        .datac(rdat_edge2),
        .datad(rdat_edge1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(rdat),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rdat~I .clock_enable_mode = "false";
defparam \rdat~I .lut_mask = "f0ff";
defparam \rdat~I .operation_mode = "normal";
defparam \rdat~I .output_mode = "comb_only";
defparam \rdat~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J32
flex10ke_lcell \rclk_cnt~191_I (
// Equation(s):
// \rclk_cnt~191  = !rclk_cnt[0] & !rclk_cnt[1] & \Equal3~51  # !rdat

        .dataa(rclk_cnt[0]),
        .datab(rclk_cnt[1]),
        .datac(\Equal3~51 ),
        .datad(rdat),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\rclk_cnt~191 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rclk_cnt~191_I .clock_enable_mode = "false";
defparam \rclk_cnt~191_I .lut_mask = "10ff";
defparam \rclk_cnt~191_I .operation_mode = "normal";
defparam \rclk_cnt~191_I .output_mode = "comb_only";
defparam \rclk_cnt~191_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J22
flex10ke_lcell \rclk_cnt[2]~I (
// Equation(s):
// rclk_cnt[2] = DFFEA(\rclk_cnt~191  # !\Add4|adder|result_node|cs_buffer [2], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(\Add4|adder|result_node|cs_buffer [2]),
        .datad(\rclk_cnt~191 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rclk_cnt[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rclk_cnt[2]~I .clock_enable_mode = "false";
defparam \rclk_cnt[2]~I .lut_mask = "ff0f";
defparam \rclk_cnt[2]~I .operation_mode = "normal";
defparam \rclk_cnt[2]~I .output_mode = "reg_only";
defparam \rclk_cnt[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J22
flex10ke_lcell \Add4|adder|result_node|cs_buffer[3]~I (
// Equation(s):
// \Add4|adder|result_node|cs_buffer [3] = rclk_cnt[3] $ \Add4|adder|result_node|cout [2]
// \Add4|adder|result_node|cout [3] = CARRY(rclk_cnt[3] # \Add4|adder|result_node|cout [2])

        .dataa(vcc),
        .datab(rclk_cnt[3]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add4|adder|result_node|cout [2]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add4|adder|result_node|cs_buffer [3]),
        .regout(),
        .cout(\Add4|adder|result_node|cout [3]),
        .cascout());
// synopsys translate_off
defparam \Add4|adder|result_node|cs_buffer[3]~I .cin_used = "true";
defparam \Add4|adder|result_node|cs_buffer[3]~I .clock_enable_mode = "false";
defparam \Add4|adder|result_node|cs_buffer[3]~I .lut_mask = "3cfc";
defparam \Add4|adder|result_node|cs_buffer[3]~I .operation_mode = "arithmetic";
defparam \Add4|adder|result_node|cs_buffer[3]~I .output_mode = "comb_only";
defparam \Add4|adder|result_node|cs_buffer[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J31
flex10ke_lcell \rclk_cnt[3]~I (
// Equation(s):
// rclk_cnt[3] = DFFEA(rdat_edge2 & !\Add4|adder|result_node|cs_buffer [3] & !\Equal3~52  # !rdat_edge2 & (rdat_edge1 # !\Add4|adder|result_node|cs_buffer [3] & !\Equal3~52 ), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(rdat_edge2),
        .datab(\Add4|adder|result_node|cs_buffer [3]),
        .datac(\Equal3~52 ),
        .datad(rdat_edge1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rclk_cnt[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rclk_cnt[3]~I .clock_enable_mode = "false";
defparam \rclk_cnt[3]~I .lut_mask = "5703";
defparam \rclk_cnt[3]~I .operation_mode = "normal";
defparam \rclk_cnt[3]~I .output_mode = "reg_only";
defparam \rclk_cnt[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_J22
flex10ke_lcell \Add4|adder|result_node|cs_buffer[4]~I (
// Equation(s):
// \Add4|adder|result_node|cs_buffer [4] = rclk_cnt[4] $ \Add4|adder|result_node|cout [3]
// \Add4|adder|result_node|cout [4] = CARRY(rclk_cnt[4] # \Add4|adder|result_node|cout [3])

        .dataa(vcc),
        .datab(rclk_cnt[4]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add4|adder|result_node|cout [3]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add4|adder|result_node|cs_buffer [4]),
        .regout(),
        .cout(\Add4|adder|result_node|cout [4]),
        .cascout());
// synopsys translate_off
defparam \Add4|adder|result_node|cs_buffer[4]~I .cin_used = "true";
defparam \Add4|adder|result_node|cs_buffer[4]~I .clock_enable_mode = "false";
defparam \Add4|adder|result_node|cs_buffer[4]~I .lut_mask = "3cfc";
defparam \Add4|adder|result_node|cs_buffer[4]~I .operation_mode = "arithmetic";
defparam \Add4|adder|result_node|cs_buffer[4]~I .output_mode = "comb_only";
defparam \Add4|adder|result_node|cs_buffer[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J32
flex10ke_lcell \rclk_cnt[4]~I (
// Equation(s):
// rclk_cnt[4] = DFFEA(\rclk_cnt~191  # !\Add4|adder|result_node|cs_buffer [4], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(\Add4|adder|result_node|cs_buffer [4]),
        .datad(\rclk_cnt~191 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rclk_cnt[4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rclk_cnt[4]~I .clock_enable_mode = "false";
defparam \rclk_cnt[4]~I .lut_mask = "ff0f";
defparam \rclk_cnt[4]~I .operation_mode = "normal";
defparam \rclk_cnt[4]~I .output_mode = "reg_only";
defparam \rclk_cnt[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_J22
flex10ke_lcell \Add4|adder|unreg_res_node[5]~I (
// Equation(s):
// \Add4|adder|unreg_res_node [5] = \Add4|adder|result_node|cout [4] $ rclk_cnt[5]

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(rclk_cnt[5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add4|adder|result_node|cout [4]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add4|adder|unreg_res_node [5]),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Add4|adder|unreg_res_node[5]~I .cin_used = "true";
defparam \Add4|adder|unreg_res_node[5]~I .clock_enable_mode = "false";
defparam \Add4|adder|unreg_res_node[5]~I .lut_mask = "0ff0";
defparam \Add4|adder|unreg_res_node[5]~I .operation_mode = "normal";
defparam \Add4|adder|unreg_res_node[5]~I .output_mode = "comb_only";
defparam \Add4|adder|unreg_res_node[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J31
flex10ke_lcell \rclk_cnt[5]~I (
// Equation(s):
// rclk_cnt[5] = DFFEA(!\Add4|adder|unreg_res_node [5] & (rdat_edge2 # !rdat_edge1), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(\Add4|adder|unreg_res_node [5]),
        .datac(rdat_edge1),
        .datad(rdat_edge2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(rclk_cnt[5]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rclk_cnt[5]~I .clock_enable_mode = "false";
defparam \rclk_cnt[5]~I .lut_mask = "3303";
defparam \rclk_cnt[5]~I .operation_mode = "normal";
defparam \rclk_cnt[5]~I .output_mode = "reg_only";
defparam \rclk_cnt[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_J22
flex10ke_lcell \Equal3~51_I (
// Equation(s):
// \Equal3~51  = !rclk_cnt[2] & !rclk_cnt[3] & !rclk_cnt[4] & !rclk_cnt[5]

        .dataa(rclk_cnt[2]),
        .datab(rclk_cnt[3]),
        .datac(rclk_cnt[4]),
        .datad(rclk_cnt[5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal3~51 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal3~51_I .clock_enable_mode = "false";
defparam \Equal3~51_I .lut_mask = "0001";
defparam \Equal3~51_I .operation_mode = "normal";
defparam \Equal3~51_I .output_mode = "comb_only";
defparam \Equal3~51_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J31
flex10ke_lcell \Equal3~52_I (
// Equation(s):
// \Equal3~52  = !rclk_cnt[0] & !rclk_cnt[1] & \Equal3~51 

        .dataa(vcc),
        .datab(rclk_cnt[0]),
        .datac(rclk_cnt[1]),
        .datad(\Equal3~51 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal3~52 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal3~52_I .clock_enable_mode = "false";
defparam \Equal3~52_I .lut_mask = "0300";
defparam \Equal3~52_I .operation_mode = "normal";
defparam \Equal3~52_I .output_mode = "comb_only";
defparam \Equal3~52_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_J32
flex10ke_lcell \rwidth_ena~I (
// Equation(s):
// rwidth_ena = !rdat_edge2 & rdat_edge1 # !\rwidth_cnt_rtl_6|wysi_counter|q [2]

        .dataa(vcc),
        .datab(\rwidth_cnt_rtl_6|wysi_counter|q [2]),
        .datac(rdat_edge2),
        .datad(rdat_edge1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(rwidth_ena),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rwidth_ena~I .clock_enable_mode = "false";
defparam \rwidth_ena~I .lut_mask = "3f33";
defparam \rwidth_ena~I .operation_mode = "normal";
defparam \rwidth_ena~I .output_mode = "comb_only";
defparam \rwidth_ena~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J32
flex10ke_lcell \rwidth_cnt_rtl_6|wysi_counter|counter_cell[0] (
// Equation(s):
// \rwidth_cnt_rtl_6|wysi_counter|counter_cell[0]~COUT  = CARRY()

        .dataa(rwidth_ena),
        .datab(rdat),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\rwidth_cnt_rtl_6|wysi_counter|q [0]),
        .cout(\rwidth_cnt_rtl_6|wysi_counter|counter_cell[0]~COUT ),
        .cascout());
// synopsys translate_off
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[0] .clock_enable_mode = "true";
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[0] .lut_mask = "66aa";
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[0] .operation_mode = "clrb_cntr";
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[0] .output_mode = "none";
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[0] .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J32
flex10ke_lcell \rwidth_cnt_rtl_6|wysi_counter|counter_cell[1] (
// Equation(s):
// \rwidth_cnt_rtl_6|wysi_counter|counter_cell[1]~COUT  = CARRY( & (\rwidth_cnt_rtl_6|wysi_counter|counter_cell[0]~COUT ))

        .dataa(rwidth_ena),
        .datab(rdat),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(\rwidth_cnt_rtl_6|wysi_counter|counter_cell[0]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\rwidth_cnt_rtl_6|wysi_counter|q [1]),
        .cout(\rwidth_cnt_rtl_6|wysi_counter|counter_cell[1]~COUT ),
        .cascout());
// synopsys translate_off
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[1] .cin_used = "true";
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[1] .clock_enable_mode = "true";
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[1] .lut_mask = "6ca0";
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[1] .operation_mode = "clrb_cntr";
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[1] .output_mode = "none";
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[1] .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J32
flex10ke_lcell \rwidth_cnt_rtl_6|wysi_counter|counter_cell[2] (
// Equation(s):
// \rwidth_cnt_rtl_6|wysi_counter|q [2] = DFFEA((\rwidth_cnt_rtl_6|wysi_counter|q [2] $ (rwidth_ena & \rwidth_cnt_rtl_6|wysi_counter|counter_cell[1]~COUT )) & rdat, GLOBAL(\fclk~dataout ), , , rwidth_ena, , )

        .dataa(rwidth_ena),
        .datab(rdat),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(\rwidth_cnt_rtl_6|wysi_counter|counter_cell[1]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\rwidth_cnt_rtl_6|wysi_counter|q [2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[2] .cin_used = "true";
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[2] .clock_enable_mode = "true";
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[2] .lut_mask = "6c6c";
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[2] .operation_mode = "clrb_cntr";
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[2] .output_mode = "reg_only";
defparam \rwidth_cnt_rtl_6|wysi_counter|counter_cell[2] .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F24
flex10ke_lcell \wd_sync[0]~I (
// Equation(s):
// wd_sync[0] = DFFEA(\vg_wd~dataout , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(vg_wd),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wd_sync[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wd_sync[0]~I .clock_enable_mode = "false";
defparam \wd_sync[0]~I .lut_mask = "ff00";
defparam \wd_sync[0]~I .operation_mode = "normal";
defparam \wd_sync[0]~I .output_mode = "reg_only";
defparam \wd_sync[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F24
flex10ke_lcell \wd_sync[1]~I (
// Equation(s):
// wd_sync[1] = DFFEA(wd_sync[0], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(wd_sync[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wd_sync[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wd_sync[1]~I .clock_enable_mode = "false";
defparam \wd_sync[1]~I .lut_mask = "ff00";
defparam \wd_sync[1]~I .operation_mode = "normal";
defparam \wd_sync[1]~I .output_mode = "reg_only";
defparam \wd_sync[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_F26
flex10ke_lcell \wd_sync[2]~I (
// Equation(s):
// wd_sync[2] = DFFEA(wd_sync[1], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(wd_sync[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wd_sync[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wd_sync[2]~I .clock_enable_mode = "false";
defparam \wd_sync[2]~I .lut_mask = "ff00";
defparam \wd_sync[2]~I .operation_mode = "normal";
defparam \wd_sync[2]~I .output_mode = "reg_only";
defparam \wd_sync[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_F26
flex10ke_lcell \wd~I (
// Equation(s):
// wd = wd_sync[2] # !wd_sync[1]

        .dataa(vcc),
        .datab(vcc),
        .datac(wd_sync[2]),
        .datad(wd_sync[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(wd),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wd~I .clock_enable_mode = "false";
defparam \wd~I .lut_mask = "f0ff";
defparam \wd~I .operation_mode = "normal";
defparam \wd~I .output_mode = "comb_only";
defparam \wd~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F26
flex10ke_lcell \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[0] (
// Equation(s):
// \wrwidth_cnt_rtl_7|wysi_counter|q [0] = DFFEA((wrwidth_ena $ \wrwidth_cnt_rtl_7|wysi_counter|q [0]) & wd, GLOBAL(\fclk~dataout ), , , wrwidth_ena, , )
// \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[0]~COUT  = CARRY(\wrwidth_cnt_rtl_7|wysi_counter|q [0])

        .dataa(wrwidth_ena),
        .datab(wd),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\wrwidth_cnt_rtl_7|wysi_counter|q [0]),
        .cout(\wrwidth_cnt_rtl_7|wysi_counter|counter_cell[0]~COUT ),
        .cascout());
// synopsys translate_off
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[0] .clock_enable_mode = "true";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[0] .lut_mask = "66aa";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[0] .operation_mode = "clrb_cntr";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[0] .output_mode = "reg_only";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[0] .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F26
flex10ke_lcell \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[1] (
// Equation(s):
// \wrwidth_cnt_rtl_7|wysi_counter|q [1] = DFFEA((\wrwidth_cnt_rtl_7|wysi_counter|q [1] $ (wrwidth_ena & \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[0]~COUT )) & wd, GLOBAL(\fclk~dataout ), , , wrwidth_ena, , )
// \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[1]~COUT  = CARRY(\wrwidth_cnt_rtl_7|wysi_counter|q [1] & (\wrwidth_cnt_rtl_7|wysi_counter|counter_cell[0]~COUT ))

        .dataa(wrwidth_ena),
        .datab(wd),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(\wrwidth_cnt_rtl_7|wysi_counter|counter_cell[0]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\wrwidth_cnt_rtl_7|wysi_counter|q [1]),
        .cout(\wrwidth_cnt_rtl_7|wysi_counter|counter_cell[1]~COUT ),
        .cascout());
// synopsys translate_off
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[1] .cin_used = "true";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[1] .clock_enable_mode = "true";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[1] .lut_mask = "6ca0";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[1] .operation_mode = "clrb_cntr";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[1] .output_mode = "reg_only";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[1] .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_F26
flex10ke_lcell \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[2] (
// Equation(s):
// \wrwidth_cnt_rtl_7|wysi_counter|q [2] = DFFEA((\wrwidth_cnt_rtl_7|wysi_counter|q [2] $ (wrwidth_ena & \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[1]~COUT )) & wd, GLOBAL(\fclk~dataout ), , , wrwidth_ena, , )
// \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[2]~COUT  = CARRY(\wrwidth_cnt_rtl_7|wysi_counter|q [2] & (\wrwidth_cnt_rtl_7|wysi_counter|counter_cell[1]~COUT ))

        .dataa(wrwidth_ena),
        .datab(wd),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(\wrwidth_cnt_rtl_7|wysi_counter|counter_cell[1]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\wrwidth_cnt_rtl_7|wysi_counter|q [2]),
        .cout(\wrwidth_cnt_rtl_7|wysi_counter|counter_cell[2]~COUT ),
        .cascout());
// synopsys translate_off
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[2] .cin_used = "true";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[2] .clock_enable_mode = "true";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[2] .lut_mask = "6ca0";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[2] .operation_mode = "clrb_cntr";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[2] .output_mode = "reg_only";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[2] .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F26
flex10ke_lcell \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[3] (
// Equation(s):
// \wrwidth_cnt_rtl_7|wysi_counter|q [3] = DFFEA((\wrwidth_cnt_rtl_7|wysi_counter|q [3] $ (wrwidth_ena & \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[2]~COUT )) & wd, GLOBAL(\fclk~dataout ), , , wrwidth_ena, , )

        .dataa(wrwidth_ena),
        .datab(wd),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(\wrwidth_cnt_rtl_7|wysi_counter|counter_cell[2]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\wrwidth_cnt_rtl_7|wysi_counter|q [3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[3] .cin_used = "true";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[3] .clock_enable_mode = "true";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[3] .lut_mask = "6c6c";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[3] .operation_mode = "clrb_cntr";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[3] .output_mode = "reg_only";
defparam \wrwidth_cnt_rtl_7|wysi_counter|counter_cell[3] .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_J35
flex10ke_lcell \sl_sync[0]~I (
// Equation(s):
// sl_sync[0] = DFFEA(\vg_sl~dataout , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(vg_sl),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(sl_sync[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sl_sync[0]~I .clock_enable_mode = "false";
defparam \sl_sync[0]~I .lut_mask = "ff00";
defparam \sl_sync[0]~I .operation_mode = "normal";
defparam \sl_sync[0]~I .output_mode = "reg_only";
defparam \sl_sync[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J35
flex10ke_lcell \sl_sync[1]~I (
// Equation(s):
// sl_sync[1] = DFFEA(sl_sync[0], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(sl_sync[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(sl_sync[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sl_sync[1]~I .clock_enable_mode = "false";
defparam \sl_sync[1]~I .lut_mask = "ff00";
defparam \sl_sync[1]~I .operation_mode = "normal";
defparam \sl_sync[1]~I .output_mode = "reg_only";
defparam \sl_sync[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F29
flex10ke_lcell \tr43_sync[0]~I (
// Equation(s):
// tr43_sync[0] = DFFEA(\vg_tr43~dataout , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(vg_tr43),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(tr43_sync[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \tr43_sync[0]~I .clock_enable_mode = "false";
defparam \tr43_sync[0]~I .lut_mask = "ff00";
defparam \tr43_sync[0]~I .operation_mode = "normal";
defparam \tr43_sync[0]~I .output_mode = "reg_only";
defparam \tr43_sync[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_F29
flex10ke_lcell \tr43_sync[1]~I (
// Equation(s):
// tr43_sync[1] = DFFEA(tr43_sync[0], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(tr43_sync[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(tr43_sync[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \tr43_sync[1]~I .clock_enable_mode = "false";
defparam \tr43_sync[1]~I .lut_mask = "ff00";
defparam \tr43_sync[1]~I .operation_mode = "normal";
defparam \tr43_sync[1]~I .output_mode = "reg_only";
defparam \tr43_sync[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F29
flex10ke_lcell \sr_sync[0]~I (
// Equation(s):
// sr_sync[0] = DFFEA(\vg_sr~dataout , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(vg_sr),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(sr_sync[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sr_sync[0]~I .clock_enable_mode = "false";
defparam \sr_sync[0]~I .lut_mask = "ff00";
defparam \sr_sync[0]~I .operation_mode = "normal";
defparam \sr_sync[0]~I .output_mode = "reg_only";
defparam \sr_sync[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_F29
flex10ke_lcell \sr_sync[1]~I (
// Equation(s):
// sr_sync[1] = DFFEA(sr_sync[0], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(sr_sync[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(sr_sync[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sr_sync[1]~I .clock_enable_mode = "false";
defparam \sr_sync[1]~I .lut_mask = "ff00";
defparam \sr_sync[1]~I .operation_mode = "normal";
defparam \sr_sync[1]~I .output_mode = "reg_only";
defparam \sr_sync[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_F32
flex10ke_lcell \wrdelay_cnt~750_I (
// Equation(s):
// \wrdelay_cnt~750  = sl_sync[1] & (sr_sync[1]) # !sl_sync[1] & (!sr_sync[1] # !tr43_sync[1])

        .dataa(vcc),
        .datab(tr43_sync[1]),
        .datac(sl_sync[1]),
        .datad(sr_sync[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\wrdelay_cnt~750 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wrdelay_cnt~750_I .clock_enable_mode = "false";
defparam \wrdelay_cnt~750_I .lut_mask = "f30f";
defparam \wrdelay_cnt~750_I .operation_mode = "normal";
defparam \wrdelay_cnt~750_I .output_mode = "comb_only";
defparam \wrdelay_cnt~750_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F32
flex10ke_lcell \wrdelay_cnt[0]~I (
// Equation(s):
// wrdelay_cnt[0] = DFFEA(wd & !\Equal1~24  & !wrdelay_cnt[0] # !wd & (\wrdelay_cnt~750 ), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\Equal1~24 ),
        .datab(wrdelay_cnt[0]),
        .datac(wd),
        .datad(\wrdelay_cnt~750 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wrdelay_cnt[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wrdelay_cnt[0]~I .clock_enable_mode = "false";
defparam \wrdelay_cnt[0]~I .lut_mask = "1f10";
defparam \wrdelay_cnt[0]~I .operation_mode = "normal";
defparam \wrdelay_cnt[0]~I .output_mode = "reg_only";
defparam \wrdelay_cnt[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_F32
flex10ke_lcell \Equal1~25_I (
// Equation(s):
// \Equal1~25  = !wrdelay_cnt[0] & !wrdelay_cnt[1]

        .dataa(vcc),
        .datab(vcc),
        .datac(wrdelay_cnt[0]),
        .datad(wrdelay_cnt[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal1~25 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal1~25_I .clock_enable_mode = "false";
defparam \Equal1~25_I .lut_mask = "000f";
defparam \Equal1~25_I .operation_mode = "normal";
defparam \Equal1~25_I .output_mode = "comb_only";
defparam \Equal1~25_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_F29
flex10ke_lcell \wrdelay_cnt~755_I (
// Equation(s):
// \wrdelay_cnt~768  = wd # tr43_sync[1] & (sr_sync[1] # !sl_sync[1]) # !tr43_sync[1] & (sl_sync[1] # !sr_sync[1])

        .dataa(wd),
        .datab(tr43_sync[1]),
        .datac(sl_sync[1]),
        .datad(sr_sync[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\wrdelay_cnt~755 ),
        .regout(),
        .cout(),
        .cascout(\wrdelay_cnt~768 ));
// synopsys translate_off
defparam \wrdelay_cnt~755_I .clock_enable_mode = "false";
defparam \wrdelay_cnt~755_I .lut_mask = "febf";
defparam \wrdelay_cnt~755_I .operation_mode = "normal";
defparam \wrdelay_cnt~755_I .output_mode = "none";
defparam \wrdelay_cnt~755_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_F29
flex10ke_lcell \wrdelay_cnt~758_I (
// Equation(s):
// \wrdelay_cnt~758  = (!\Equal1~24  & (\Equal1~25  $ wrdelay_cnt[2]) # !wd) & CASCADE(\wrdelay_cnt~768 )

        .dataa(\Equal1~24 ),
        .datab(\Equal1~25 ),
        .datac(wrdelay_cnt[2]),
        .datad(wd),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\wrdelay_cnt~768 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\wrdelay_cnt~758 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wrdelay_cnt~758_I .clock_enable_mode = "false";
defparam \wrdelay_cnt~758_I .lut_mask = "14ff";
defparam \wrdelay_cnt~758_I .operation_mode = "normal";
defparam \wrdelay_cnt~758_I .output_mode = "comb_only";
defparam \wrdelay_cnt~758_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F29
flex10ke_lcell \wrdelay_cnt[2]~I (
// Equation(s):
// wrdelay_cnt[2] = DFFEA(\wrdelay_cnt~758 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(\wrdelay_cnt~758 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wrdelay_cnt[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wrdelay_cnt[2]~I .clock_enable_mode = "false";
defparam \wrdelay_cnt[2]~I .lut_mask = "ff00";
defparam \wrdelay_cnt[2]~I .operation_mode = "normal";
defparam \wrdelay_cnt[2]~I .output_mode = "reg_only";
defparam \wrdelay_cnt[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_F32
flex10ke_lcell \wrdelay_cnt~745_I (
// Equation(s):
// \wrdelay_cnt~745  = wd & wrdelay_cnt[3] & (wrdelay_cnt[2] # !\Equal1~25 )

        .dataa(wd),
        .datab(\Equal1~25 ),
        .datac(wrdelay_cnt[2]),
        .datad(wrdelay_cnt[3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\wrdelay_cnt~745 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wrdelay_cnt~745_I .clock_enable_mode = "false";
defparam \wrdelay_cnt~745_I .lut_mask = "a200";
defparam \wrdelay_cnt~745_I .operation_mode = "normal";
defparam \wrdelay_cnt~745_I .output_mode = "comb_only";
defparam \wrdelay_cnt~745_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F32
flex10ke_lcell \wrdelay_cnt[3]~I (
// Equation(s):
// wrdelay_cnt[3] = DFFEA(\wrdelay_cnt~745  # !sl_sync[1] & sr_sync[1] & !wd, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(sl_sync[1]),
        .datab(sr_sync[1]),
        .datac(wd),
        .datad(\wrdelay_cnt~745 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wrdelay_cnt[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wrdelay_cnt[3]~I .clock_enable_mode = "false";
defparam \wrdelay_cnt[3]~I .lut_mask = "ff04";
defparam \wrdelay_cnt[3]~I .operation_mode = "normal";
defparam \wrdelay_cnt[3]~I .output_mode = "reg_only";
defparam \wrdelay_cnt[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_F32
flex10ke_lcell \wrdelay_cnt~748_I (
// Equation(s):
// \wrdelay_cnt~748  = wrdelay_cnt[0] & !wrdelay_cnt[1] # !wrdelay_cnt[0] & (wrdelay_cnt[1] # !wrdelay_cnt[2] & !wrdelay_cnt[3])

        .dataa(wrdelay_cnt[0]),
        .datab(wrdelay_cnt[1]),
        .datac(wrdelay_cnt[2]),
        .datad(wrdelay_cnt[3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\wrdelay_cnt~748 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wrdelay_cnt~748_I .clock_enable_mode = "false";
defparam \wrdelay_cnt~748_I .lut_mask = "6667";
defparam \wrdelay_cnt~748_I .operation_mode = "normal";
defparam \wrdelay_cnt~748_I .output_mode = "comb_only";
defparam \wrdelay_cnt~748_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_F32
flex10ke_lcell \wrdelay_cnt[1]~I (
// Equation(s):
// wrdelay_cnt[1] = DFFEA(wd & (!\wrdelay_cnt~748 ) # !wd & (sr_sync[1] # !sl_sync[1]), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(sr_sync[1]),
        .datab(wd),
        .datac(sl_sync[1]),
        .datad(\wrdelay_cnt~748 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wrdelay_cnt[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wrdelay_cnt[1]~I .clock_enable_mode = "false";
defparam \wrdelay_cnt[1]~I .lut_mask = "23ef";
defparam \wrdelay_cnt[1]~I .operation_mode = "normal";
defparam \wrdelay_cnt[1]~I .output_mode = "reg_only";
defparam \wrdelay_cnt[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F32
flex10ke_lcell \Equal1~24_I (
// Equation(s):
// \Equal1~24  = !wrdelay_cnt[0] & !wrdelay_cnt[1] & !wrdelay_cnt[2] & !wrdelay_cnt[3]

        .dataa(wrdelay_cnt[0]),
        .datab(wrdelay_cnt[1]),
        .datac(wrdelay_cnt[2]),
        .datad(wrdelay_cnt[3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal1~24 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal1~24_I .clock_enable_mode = "false";
defparam \Equal1~24_I .lut_mask = "0001";
defparam \Equal1~24_I .operation_mode = "normal";
defparam \Equal1~24_I .output_mode = "comb_only";
defparam \Equal1~24_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_F26
flex10ke_lcell \wrwidth_ena~I (
// Equation(s):
// wrwidth_ena = wd_sync[2] & !\wrwidth_cnt_rtl_7|wysi_counter|q [3] & (\Equal1~24 ) # !wd_sync[2] & (wd_sync[1] # !\wrwidth_cnt_rtl_7|wysi_counter|q [3] & \Equal1~24 )

        .dataa(wd_sync[2]),
        .datab(\wrwidth_cnt_rtl_7|wysi_counter|q [3]),
        .datac(wd_sync[1]),
        .datad(\Equal1~24 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(wrwidth_ena),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wrwidth_ena~I .clock_enable_mode = "false";
defparam \wrwidth_ena~I .lut_mask = "7350";
defparam \wrwidth_ena~I .operation_mode = "normal";
defparam \wrwidth_ena~I .output_mode = "comb_only";
defparam \wrwidth_ena~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_E33
flex10ke_lcell \drq_sync[0]~I (
// Equation(s):
// drq_sync[0] = DFFEA(\vg_drq~dataout , GLOBAL(\clkz_in~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(vg_drq),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(drq_sync[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \drq_sync[0]~I .clock_enable_mode = "false";
defparam \drq_sync[0]~I .lut_mask = "ff00";
defparam \drq_sync[0]~I .operation_mode = "normal";
defparam \drq_sync[0]~I .output_mode = "reg_only";
defparam \drq_sync[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H24
flex10ke_lcell \intrq_sync[0]~I (
// Equation(s):
// intrq_sync[0] = DFFEA(\vg_irq~dataout , GLOBAL(\clkz_in~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(vg_irq),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(intrq_sync[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \intrq_sync[0]~I .clock_enable_mode = "false";
defparam \intrq_sync[0]~I .lut_mask = "ff00";
defparam \intrq_sync[0]~I .operation_mode = "normal";
defparam \intrq_sync[0]~I .output_mode = "reg_only";
defparam \intrq_sync[0]~I .packed_mode = "false";
// synopsys translate_on

endmodule

module vga_synch (
        vga_hsync,
        scanout_start,
        hsync_start,
        clk,
        devpor,
        devclrn,
        devoe);
output  vga_hsync;
output  scanout_start;
input   hsync_start;
input   clk;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \Equal0~61 ;
wire \Equal1~50 ;
wire \Equal0~60 ;
wire \hcount~429 ;
wire \Equal1~49 ;
wire \Equal1~47 ;
wire \Equal1~48 ;
wire \hcount[9]~428 ;
wire \Equal2~35 ;
wire [9:0] hcount;
wire [9:0] \Add0|adder|result_node|cs_buffer ;
wire [9:0] \Add0|adder|result_node|cout ;
wire [9:0] \Add0|adder|unreg_res_node ;


// atom is at LC3_I6
flex10ke_lcell \Equal0~61_I (
// Equation(s):
// \Equal0~61  = !hcount[7] & hcount[8] & hcount[5] & hcount[6]

        .dataa(hcount[7]),
        .datab(hcount[8]),
        .datac(hcount[5]),
        .datad(hcount[6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal0~61 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal0~61_I .clock_enable_mode = "false";
defparam \Equal0~61_I .lut_mask = "4000";
defparam \Equal0~61_I .operation_mode = "normal";
defparam \Equal0~61_I .output_mode = "comb_only";
defparam \Equal0~61_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I12
flex10ke_lcell \vga_hsync~I (
// Equation(s):
// vga_hsync = DFFEA(\Equal1~48  & (\hcount[9]~428  # !\Equal1~49  & vga_hsync) # !\Equal1~48  & (vga_hsync), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(\Equal1~49 ),
        .datab(\Equal1~48 ),
        .datac(vga_hsync),
        .datad(\hcount[9]~428 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vga_hsync),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vga_hsync~I .clock_enable_mode = "false";
defparam \vga_hsync~I .lut_mask = "fc70";
defparam \vga_hsync~I .operation_mode = "normal";
defparam \vga_hsync~I .output_mode = "reg_only";
defparam \vga_hsync~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I6
flex10ke_lcell \scanout_start~I (
// Equation(s):
// scanout_start = DFFEA(\Equal2~35  & hcount[7] & \Equal0~60 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(\Equal2~35 ),
        .datac(hcount[7]),
        .datad(\Equal0~60 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(scanout_start),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \scanout_start~I .clock_enable_mode = "false";
defparam \scanout_start~I .lut_mask = "c000";
defparam \scanout_start~I .operation_mode = "normal";
defparam \scanout_start~I .output_mode = "reg_only";
defparam \scanout_start~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I7
flex10ke_lcell \hcount[0]~I (
// Equation(s):
// hcount[0] = DFFEA(!\hcount~429  & !hcount[0], GLOBAL(\fclk~dataout ), , , , , )
// \Add0|adder|result_node|cout [0] = CARRY(hcount[0])

        .dataa(\hcount~429 ),
        .datab(hcount[0]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[0]),
        .cout(\Add0|adder|result_node|cout [0]),
        .cascout());
// synopsys translate_off
defparam \hcount[0]~I .clock_enable_mode = "false";
defparam \hcount[0]~I .lut_mask = "11cc";
defparam \hcount[0]~I .operation_mode = "arithmetic";
defparam \hcount[0]~I .output_mode = "reg_only";
defparam \hcount[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I7
flex10ke_lcell \Add0|adder|result_node|cs_buffer[1]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [1] = hcount[1] $ \Add0|adder|result_node|cout [0]
// \Add0|adder|result_node|cout [1] = CARRY(hcount[1] & \Add0|adder|result_node|cout [0])

        .dataa(vcc),
        .datab(hcount[1]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [0]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [1]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [1]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[1]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[1]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[1]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[1]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[1]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I12
flex10ke_lcell \hcount[1]~I (
// Equation(s):
// hcount[1] = DFFEA(\Add0|adder|result_node|cs_buffer [1] # hsync_start, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(\Add0|adder|result_node|cs_buffer [1]),
        .datad(hsync_start),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[1]~I .clock_enable_mode = "false";
defparam \hcount[1]~I .lut_mask = "fff0";
defparam \hcount[1]~I .operation_mode = "normal";
defparam \hcount[1]~I .output_mode = "reg_only";
defparam \hcount[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I7
flex10ke_lcell \Add0|adder|result_node|cs_buffer[2]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [2] = hcount[2] $ \Add0|adder|result_node|cout [1]
// \Add0|adder|result_node|cout [2] = CARRY(hcount[2] & \Add0|adder|result_node|cout [1])

        .dataa(vcc),
        .datab(hcount[2]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [1]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [2]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [2]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[2]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[2]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[2]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[2]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[2]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I7
flex10ke_lcell \hcount[2]~I (
// Equation(s):
// hcount[2] = DFFEA(!\hcount~429  & \Add0|adder|result_node|cs_buffer [2], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(\hcount~429 ),
        .datad(\Add0|adder|result_node|cs_buffer [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[2]~I .clock_enable_mode = "false";
defparam \hcount[2]~I .lut_mask = "0f00";
defparam \hcount[2]~I .operation_mode = "normal";
defparam \hcount[2]~I .output_mode = "reg_only";
defparam \hcount[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I7
flex10ke_lcell \Add0|adder|result_node|cs_buffer[3]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [3] = hcount[3] $ \Add0|adder|result_node|cout [2]
// \Add0|adder|result_node|cout [3] = CARRY(hcount[3] & \Add0|adder|result_node|cout [2])

        .dataa(vcc),
        .datab(hcount[3]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [2]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [3]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [3]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[3]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[3]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[3]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[3]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[3]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_I7
flex10ke_lcell \Add0|adder|result_node|cs_buffer[4]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [4] = hcount[4] $ \Add0|adder|result_node|cout [3]
// \Add0|adder|result_node|cout [4] = CARRY(hcount[4] & \Add0|adder|result_node|cout [3])

        .dataa(vcc),
        .datab(hcount[4]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [3]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [4]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [4]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[4]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[4]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[4]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[4]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[4]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I7
flex10ke_lcell \hcount[4]~I (
// Equation(s):
// hcount[4] = DFFEA(!\hcount~429  & \Add0|adder|result_node|cs_buffer [4], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(\hcount~429 ),
        .datad(\Add0|adder|result_node|cs_buffer [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[4]~I .clock_enable_mode = "false";
defparam \hcount[4]~I .lut_mask = "0f00";
defparam \hcount[4]~I .operation_mode = "normal";
defparam \hcount[4]~I .output_mode = "reg_only";
defparam \hcount[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I9
flex10ke_lcell \Add0|adder|result_node|cs_buffer[5]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [5] = hcount[5] $ \Add0|adder|result_node|cout [4]
// \Add0|adder|result_node|cout [5] = CARRY(hcount[5] & \Add0|adder|result_node|cout [4])

        .dataa(vcc),
        .datab(hcount[5]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [4]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [5]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [5]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[5]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[5]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[5]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[5]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[5]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_I9
flex10ke_lcell \hcount[5]~I (
// Equation(s):
// hcount[5] = DFFEA(!\hcount~429  & \Add0|adder|result_node|cs_buffer [5], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(\hcount~429 ),
        .datad(\Add0|adder|result_node|cs_buffer [5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[5]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[5]~I .clock_enable_mode = "false";
defparam \hcount[5]~I .lut_mask = "0f00";
defparam \hcount[5]~I .operation_mode = "normal";
defparam \hcount[5]~I .output_mode = "reg_only";
defparam \hcount[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I9
flex10ke_lcell \Add0|adder|result_node|cs_buffer[6]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [6] = hcount[6] $ \Add0|adder|result_node|cout [5]
// \Add0|adder|result_node|cout [6] = CARRY(hcount[6] & \Add0|adder|result_node|cout [5])

        .dataa(vcc),
        .datab(hcount[6]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [5]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [6]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [6]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[6]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[6]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[6]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[6]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[6]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I9
flex10ke_lcell \hcount[6]~I (
// Equation(s):
// hcount[6] = DFFEA(!\hcount~429  & \Add0|adder|result_node|cs_buffer [6], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(\hcount~429 ),
        .datad(\Add0|adder|result_node|cs_buffer [6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[6]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[6]~I .clock_enable_mode = "false";
defparam \hcount[6]~I .lut_mask = "0f00";
defparam \hcount[6]~I .operation_mode = "normal";
defparam \hcount[6]~I .output_mode = "reg_only";
defparam \hcount[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I9
flex10ke_lcell \Add0|adder|result_node|cs_buffer[7]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [7] = hcount[7] $ \Add0|adder|result_node|cout [6]
// \Add0|adder|result_node|cout [7] = CARRY(hcount[7] & \Add0|adder|result_node|cout [6])

        .dataa(vcc),
        .datab(hcount[7]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [6]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [7]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [7]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[7]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[7]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[7]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[7]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[7]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I6
flex10ke_lcell \hcount[7]~I (
// Equation(s):
// hcount[7] = DFFEA(!\hcount~429  & \Add0|adder|result_node|cs_buffer [7], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(\hcount~429 ),
        .datad(\Add0|adder|result_node|cs_buffer [7]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[7]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[7]~I .clock_enable_mode = "false";
defparam \hcount[7]~I .lut_mask = "0f00";
defparam \hcount[7]~I .operation_mode = "normal";
defparam \hcount[7]~I .output_mode = "reg_only";
defparam \hcount[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I9
flex10ke_lcell \Add0|adder|result_node|cs_buffer[8]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [8] = hcount[8] $ \Add0|adder|result_node|cout [7]
// \Add0|adder|result_node|cout [8] = CARRY(hcount[8] & \Add0|adder|result_node|cout [7])

        .dataa(vcc),
        .datab(hcount[8]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [7]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [8]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [8]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[8]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[8]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[8]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[8]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[8]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I6
flex10ke_lcell \hcount[8]~I (
// Equation(s):
// hcount[8] = DFFEA(!\hcount~429  & \Add0|adder|result_node|cs_buffer [8], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(\hcount~429 ),
        .datad(\Add0|adder|result_node|cs_buffer [8]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[8]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[8]~I .clock_enable_mode = "false";
defparam \hcount[8]~I .lut_mask = "0f00";
defparam \hcount[8]~I .operation_mode = "normal";
defparam \hcount[8]~I .output_mode = "reg_only";
defparam \hcount[8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I9
flex10ke_lcell \Add0|adder|unreg_res_node[9]~I (
// Equation(s):
// \Add0|adder|unreg_res_node [9] = \Add0|adder|result_node|cout [8] $ hcount[9]

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(hcount[9]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [8]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|unreg_res_node [9]),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|unreg_res_node[9]~I .cin_used = "true";
defparam \Add0|adder|unreg_res_node[9]~I .clock_enable_mode = "false";
defparam \Add0|adder|unreg_res_node[9]~I .lut_mask = "0ff0";
defparam \Add0|adder|unreg_res_node[9]~I .operation_mode = "normal";
defparam \Add0|adder|unreg_res_node[9]~I .output_mode = "comb_only";
defparam \Add0|adder|unreg_res_node[9]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I9
flex10ke_lcell \hcount[9]~I (
// Equation(s):
// hcount[9] = DFFEA(!\hcount~429  & \Add0|adder|unreg_res_node [9], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(\hcount~429 ),
        .datad(\Add0|adder|unreg_res_node [9]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[9]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[9]~I .clock_enable_mode = "false";
defparam \hcount[9]~I .lut_mask = "0f00";
defparam \hcount[9]~I .operation_mode = "normal";
defparam \hcount[9]~I .output_mode = "reg_only";
defparam \hcount[9]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_I12
flex10ke_lcell \Equal1~50_I (
// Equation(s):
// \Equal1~50  = hcount[1] & hcount[3]

        .dataa(vcc),
        .datab(vcc),
        .datac(hcount[1]),
        .datad(hcount[3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal1~50 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal1~50_I .clock_enable_mode = "false";
defparam \Equal1~50_I .lut_mask = "f000";
defparam \Equal1~50_I .operation_mode = "normal";
defparam \Equal1~50_I .output_mode = "comb_only";
defparam \Equal1~50_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I12
flex10ke_lcell \Equal0~60_I (
// Equation(s):
// \Equal0~60  = hcount[2] & hcount[4] & \Equal1~50  & hcount[0]

        .dataa(hcount[2]),
        .datab(hcount[4]),
        .datac(\Equal1~50 ),
        .datad(hcount[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal0~60 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal0~60_I .clock_enable_mode = "false";
defparam \Equal0~60_I .lut_mask = "8000";
defparam \Equal0~60_I .operation_mode = "normal";
defparam \Equal0~60_I .output_mode = "comb_only";
defparam \Equal0~60_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I6
flex10ke_lcell \hcount~429_I (
// Equation(s):
// \hcount~429  = hsync_start # \Equal0~61  & hcount[9] & \Equal0~60 

        .dataa(\Equal0~61 ),
        .datab(hcount[9]),
        .datac(\Equal0~60 ),
        .datad(hsync_start),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\hcount~429 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount~429_I .clock_enable_mode = "false";
defparam \hcount~429_I .lut_mask = "ff80";
defparam \hcount~429_I .operation_mode = "normal";
defparam \hcount~429_I .output_mode = "comb_only";
defparam \hcount~429_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I7
flex10ke_lcell \hcount[3]~I (
// Equation(s):
// hcount[3] = DFFEA(!\hcount~429  & \Add0|adder|result_node|cs_buffer [3], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(\hcount~429 ),
        .datad(\Add0|adder|result_node|cs_buffer [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(clk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(hcount[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[3]~I .clock_enable_mode = "false";
defparam \hcount[3]~I .lut_mask = "0f00";
defparam \hcount[3]~I .operation_mode = "normal";
defparam \hcount[3]~I .output_mode = "reg_only";
defparam \hcount[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I12
flex10ke_lcell \Equal1~49_I (
// Equation(s):
// \Equal1~49  = hcount[1] & hcount[3] & hcount[5] & hcount[6]

        .dataa(hcount[1]),
        .datab(hcount[3]),
        .datac(hcount[5]),
        .datad(hcount[6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal1~49 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal1~49_I .clock_enable_mode = "false";
defparam \Equal1~49_I .lut_mask = "8000";
defparam \Equal1~49_I .operation_mode = "normal";
defparam \Equal1~49_I .output_mode = "comb_only";
defparam \Equal1~49_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_I6
flex10ke_lcell \Equal1~47_I (
// Equation(s):
// \Equal1~47  = !hcount[4] & !hcount[7] & !hcount[9] & !hcount[8]

        .dataa(hcount[4]),
        .datab(hcount[7]),
        .datac(hcount[9]),
        .datad(hcount[8]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal1~47 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal1~47_I .clock_enable_mode = "false";
defparam \Equal1~47_I .lut_mask = "0001";
defparam \Equal1~47_I .operation_mode = "normal";
defparam \Equal1~47_I .output_mode = "comb_only";
defparam \Equal1~47_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I12
flex10ke_lcell \Equal1~48_I (
// Equation(s):
// \Equal1~48  = !hcount[0] & !hcount[2] & \Equal1~47 

        .dataa(vcc),
        .datab(hcount[0]),
        .datac(hcount[2]),
        .datad(\Equal1~47 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal1~48 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal1~48_I .clock_enable_mode = "false";
defparam \Equal1~48_I .lut_mask = "0300";
defparam \Equal1~48_I .operation_mode = "normal";
defparam \Equal1~48_I .output_mode = "comb_only";
defparam \Equal1~48_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I12
flex10ke_lcell \hcount[9]~428_I (
// Equation(s):
// \hcount[9]~428  = !hcount[1] & !hcount[3] & !hcount[5] & !hcount[6]

        .dataa(hcount[1]),
        .datab(hcount[3]),
        .datac(hcount[5]),
        .datad(hcount[6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\hcount[9]~428 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \hcount[9]~428_I .clock_enable_mode = "false";
defparam \hcount[9]~428_I .lut_mask = "0001";
defparam \hcount[9]~428_I .operation_mode = "normal";
defparam \hcount[9]~428_I .output_mode = "comb_only";
defparam \hcount[9]~428_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I6
flex10ke_lcell \Equal2~35_I (
// Equation(s):
// \Equal2~35  = !hcount[5] & !hcount[6] & !hcount[9] & !hcount[8]

        .dataa(hcount[5]),
        .datab(hcount[6]),
        .datac(hcount[9]),
        .datad(hcount[8]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal2~35 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal2~35_I .clock_enable_mode = "false";
defparam \Equal2~35_I .lut_mask = "0001";
defparam \Equal2~35_I .operation_mode = "normal";
defparam \Equal2~35_I .output_mode = "comb_only";
defparam \Equal2~35_I .packed_mode = "false";
// synopsys translate_on

endmodule

module videoout (
        vred_0,
        vred_1,
        vgrn_0,
        vgrn_1,
        vblu_0,
        vblu_1,
        vhsync,
        vvsync,
        vcsync,
        vpix,
        hpix,
        vblank,
        hblank,
        Mux10,
        zxcolor_3,
        peff7_int_0,
        Mux15,
        zxcolor,
        cfg0_reg_out_0,
        zxcolor_1,
        border_1,
        Mux14,
        zxcolor1,
        border_2,
        zxcolor_2,
        Mux16,
        zxcolor2,
        border_0,
        zxcolor_0,
        vga_hsync,
        hsync,
        vsync,
        line_start,
        scanout_start,
        hsync_start,
        fclk,
        devpor,
        devclrn,
        devoe);
output  vred_0;
output  vred_1;
output  vgrn_0;
output  vgrn_1;
output  vblu_0;
output  vblu_1;
output  vhsync;
output  vvsync;
output  vcsync;
input   vpix;
input   hpix;
input   vblank;
input   hblank;
input   Mux10;
input   zxcolor_3;
input   peff7_int_0;
input   Mux15;
input   zxcolor;
input   cfg0_reg_out_0;
input   zxcolor_1;
input   border_1;
input   Mux14;
input   zxcolor1;
input   border_2;
input   zxcolor_2;
input   Mux16;
input   zxcolor2;
input   border_0;
input   zxcolor_0;
input   vga_hsync;
input   hsync;
input   vsync;
input   line_start;
input   scanout_start;
input   hsync_start;
input   fclk;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \color[0]~362 ;
wire \color[0]~363 ;
wire \color[4]~364 ;
wire \color[5]~365 ;
wire \color[5]~366 ;
wire \color[2]~367 ;
wire \color[3]~368 ;
wire \color[0]~369 ;
wire \color[1]~370 ;
wire [5:0] \vga_double|pix_out ;


vga_double vga_double_1(
        .pix_out_4(\vga_double|pix_out [4]),
        .color_4(\color[4]~364 ),
        .pix_out_5(\vga_double|pix_out [5]),
        .color_5(\color[5]~366 ),
        .pix_out_2(\vga_double|pix_out [2]),
        .color_2(\color[2]~367 ),
        .pix_out_3(\vga_double|pix_out [3]),
        .color_3(\color[3]~368 ),
        .pix_out_0(\vga_double|pix_out [0]),
        .color_0(\color[0]~369 ),
        .pix_out_1(\vga_double|pix_out [1]),
        .color_1(\color[1]~370 ),
        .line_start(line_start),
        .scanout_start(scanout_start),
        .hsync_start(hsync_start),
        .fclk(fclk),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

// atom is at LC8_F2
flex10ke_lcell \vred[0]~COMB_I (
// Equation(s):
// vred_0 = cfg0_reg_out_0 & (pix_out_4) # !cfg0_reg_out_0 & \color[4]~364 

        .dataa(vcc),
        .datab(cfg0_reg_out_0),
        .datac(\color[4]~364 ),
        .datad(\vga_double|pix_out [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(vred_0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vred[0]~COMB_I .clock_enable_mode = "false";
defparam \vred[0]~COMB_I .lut_mask = "fc30";
defparam \vred[0]~COMB_I .operation_mode = "normal";
defparam \vred[0]~COMB_I .output_mode = "comb_only";
defparam \vred[0]~COMB_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_F2
flex10ke_lcell \vred[1]~COMB_I (
// Equation(s):
// vred_1 = cfg0_reg_out_0 & (pix_out_5) # !cfg0_reg_out_0 & \color[5]~366 

        .dataa(vcc),
        .datab(cfg0_reg_out_0),
        .datac(\color[5]~366 ),
        .datad(\vga_double|pix_out [5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(vred_1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vred[1]~COMB_I .clock_enable_mode = "false";
defparam \vred[1]~COMB_I .lut_mask = "fc30";
defparam \vred[1]~COMB_I .operation_mode = "normal";
defparam \vred[1]~COMB_I .output_mode = "comb_only";
defparam \vred[1]~COMB_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_F4
flex10ke_lcell \vgrn[0]~COMB_I (
// Equation(s):
// vgrn_0 = cfg0_reg_out_0 & (pix_out_2) # !cfg0_reg_out_0 & \color[2]~367 

        .dataa(vcc),
        .datab(cfg0_reg_out_0),
        .datac(\color[2]~367 ),
        .datad(\vga_double|pix_out [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(vgrn_0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vgrn[0]~COMB_I .clock_enable_mode = "false";
defparam \vgrn[0]~COMB_I .lut_mask = "fc30";
defparam \vgrn[0]~COMB_I .operation_mode = "normal";
defparam \vgrn[0]~COMB_I .output_mode = "comb_only";
defparam \vgrn[0]~COMB_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F4
flex10ke_lcell \vgrn[1]~COMB_I (
// Equation(s):
// vgrn_1 = cfg0_reg_out_0 & (pix_out_3) # !cfg0_reg_out_0 & \color[3]~368 

        .dataa(vcc),
        .datab(cfg0_reg_out_0),
        .datac(\color[3]~368 ),
        .datad(\vga_double|pix_out [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(vgrn_1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vgrn[1]~COMB_I .clock_enable_mode = "false";
defparam \vgrn[1]~COMB_I .lut_mask = "fc30";
defparam \vgrn[1]~COMB_I .operation_mode = "normal";
defparam \vgrn[1]~COMB_I .output_mode = "comb_only";
defparam \vgrn[1]~COMB_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F1
flex10ke_lcell \vblu[0]~COMB_I (
// Equation(s):
// vblu_0 = cfg0_reg_out_0 & (pix_out_0) # !cfg0_reg_out_0 & \color[0]~369 

        .dataa(vcc),
        .datab(cfg0_reg_out_0),
        .datac(\color[0]~369 ),
        .datad(\vga_double|pix_out [0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(vblu_0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vblu[0]~COMB_I .clock_enable_mode = "false";
defparam \vblu[0]~COMB_I .lut_mask = "fc30";
defparam \vblu[0]~COMB_I .operation_mode = "normal";
defparam \vblu[0]~COMB_I .output_mode = "comb_only";
defparam \vblu[0]~COMB_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F1
flex10ke_lcell \vblu[1]~COMB_I (
// Equation(s):
// vblu_1 = cfg0_reg_out_0 & (pix_out_1) # !cfg0_reg_out_0 & \color[1]~370 

        .dataa(vcc),
        .datab(cfg0_reg_out_0),
        .datac(\color[1]~370 ),
        .datad(\vga_double|pix_out [1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(vblu_1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vblu[1]~COMB_I .clock_enable_mode = "false";
defparam \vblu[1]~COMB_I .lut_mask = "fc30";
defparam \vblu[1]~COMB_I .operation_mode = "normal";
defparam \vblu[1]~COMB_I .output_mode = "comb_only";
defparam \vblu[1]~COMB_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I12
flex10ke_lcell \vhsync~I (
// Equation(s):
// vhsync = DFFEA(cfg0_reg_out_0 & (vga_hsync) # !cfg0_reg_out_0 & hsync, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(cfg0_reg_out_0),
        .datac(hsync),
        .datad(vga_hsync),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vhsync),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vhsync~I .clock_enable_mode = "false";
defparam \vhsync~I .lut_mask = "fc30";
defparam \vhsync~I .operation_mode = "normal";
defparam \vhsync~I .output_mode = "reg_only";
defparam \vhsync~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H2
flex10ke_lcell \vvsync~I (
// Equation(s):
// vvsync = DFFEA(vsync, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(vsync),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vvsync),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vvsync~I .clock_enable_mode = "false";
defparam \vvsync~I .lut_mask = "ff00";
defparam \vvsync~I .operation_mode = "normal";
defparam \vvsync~I .output_mode = "reg_only";
defparam \vvsync~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H2
flex10ke_lcell \vcsync~I (
// Equation(s):
// vcsync = DFFEA(vsync $ !hsync, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vsync),
        .datad(hsync),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(vcsync),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vcsync~I .clock_enable_mode = "false";
defparam \vcsync~I .lut_mask = "f00f";
defparam \vcsync~I .operation_mode = "normal";
defparam \vcsync~I .output_mode = "reg_only";
defparam \vcsync~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H13
flex10ke_lcell \color[0]~362_I (
// Equation(s):
// \color[0]~362  = !hblank & !vblank & hpix & vpix

        .dataa(hblank),
        .datab(vblank),
        .datac(hpix),
        .datad(vpix),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\color[0]~362 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \color[0]~362_I .clock_enable_mode = "false";
defparam \color[0]~362_I .lut_mask = "1000";
defparam \color[0]~362_I .operation_mode = "normal";
defparam \color[0]~362_I .output_mode = "comb_only";
defparam \color[0]~362_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_F2
flex10ke_lcell \color[0]~363_I (
// Equation(s):
// \color[0]~363  = \color[0]~362  & (peff7_int_0 & (Mux10) # !peff7_int_0 & zxcolor_3)

        .dataa(peff7_int_0),
        .datab(zxcolor_3),
        .datac(Mux10),
        .datad(\color[0]~362 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\color[0]~363 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \color[0]~363_I .clock_enable_mode = "false";
defparam \color[0]~363_I .lut_mask = "e400";
defparam \color[0]~363_I .operation_mode = "normal";
defparam \color[0]~363_I .output_mode = "comb_only";
defparam \color[0]~363_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F2
flex10ke_lcell \color[4]~364_I (
// Equation(s):
// \color[4]~364  = \color[0]~363  & (peff7_int_0 & (Mux15) # !peff7_int_0 & zxcolor)

        .dataa(peff7_int_0),
        .datab(zxcolor),
        .datac(Mux15),
        .datad(\color[0]~363 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\color[4]~364 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \color[4]~364_I .clock_enable_mode = "false";
defparam \color[4]~364_I .lut_mask = "e400";
defparam \color[4]~364_I .operation_mode = "normal";
defparam \color[4]~364_I .output_mode = "comb_only";
defparam \color[4]~364_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H13
flex10ke_lcell \color[5]~365_I (
// Equation(s):
// \color[5]~365  = !hblank & !vblank & (!vpix # !hpix)

        .dataa(hblank),
        .datab(vblank),
        .datac(hpix),
        .datad(vpix),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\color[5]~365 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \color[5]~365_I .clock_enable_mode = "false";
defparam \color[5]~365_I .lut_mask = "0111";
defparam \color[5]~365_I .operation_mode = "normal";
defparam \color[5]~365_I .output_mode = "comb_only";
defparam \color[5]~365_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_F2
flex10ke_lcell \color[5]~366_I (
// Equation(s):
// \color[5]~366  = \color[0]~362  & (zxcolor_1 # \color[5]~365  & border_1) # !\color[0]~362  & \color[5]~365  & border_1

        .dataa(\color[0]~362 ),
        .datab(\color[5]~365 ),
        .datac(border_1),
        .datad(zxcolor_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\color[5]~366 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \color[5]~366_I .clock_enable_mode = "false";
defparam \color[5]~366_I .lut_mask = "eac0";
defparam \color[5]~366_I .operation_mode = "normal";
defparam \color[5]~366_I .output_mode = "comb_only";
defparam \color[5]~366_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F4
flex10ke_lcell \color[2]~367_I (
// Equation(s):
// \color[2]~367  = \color[0]~363  & (peff7_int_0 & (Mux14) # !peff7_int_0 & zxcolor1)

        .dataa(peff7_int_0),
        .datab(zxcolor1),
        .datac(Mux14),
        .datad(\color[0]~363 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\color[2]~367 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \color[2]~367_I .clock_enable_mode = "false";
defparam \color[2]~367_I .lut_mask = "e400";
defparam \color[2]~367_I .operation_mode = "normal";
defparam \color[2]~367_I .output_mode = "comb_only";
defparam \color[2]~367_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_F4
flex10ke_lcell \color[3]~368_I (
// Equation(s):
// \color[3]~368  = zxcolor_2 & (\color[0]~362  # border_2 & \color[5]~365 ) # !zxcolor_2 & border_2 & \color[5]~365 

        .dataa(zxcolor_2),
        .datab(border_2),
        .datac(\color[5]~365 ),
        .datad(\color[0]~362 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\color[3]~368 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \color[3]~368_I .clock_enable_mode = "false";
defparam \color[3]~368_I .lut_mask = "eac0";
defparam \color[3]~368_I .operation_mode = "normal";
defparam \color[3]~368_I .output_mode = "comb_only";
defparam \color[3]~368_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_F1
flex10ke_lcell \color[0]~369_I (
// Equation(s):
// \color[0]~369  = \color[0]~363  & (peff7_int_0 & (Mux16) # !peff7_int_0 & zxcolor2)

        .dataa(peff7_int_0),
        .datab(zxcolor2),
        .datac(Mux16),
        .datad(\color[0]~363 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\color[0]~369 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \color[0]~369_I .clock_enable_mode = "false";
defparam \color[0]~369_I .lut_mask = "e400";
defparam \color[0]~369_I .operation_mode = "normal";
defparam \color[0]~369_I .output_mode = "comb_only";
defparam \color[0]~369_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_F1
flex10ke_lcell \color[1]~370_I (
// Equation(s):
// \color[1]~370  = zxcolor_0 & (\color[0]~362  # border_0 & \color[5]~365 ) # !zxcolor_0 & border_0 & \color[5]~365 

        .dataa(zxcolor_0),
        .datab(border_0),
        .datac(\color[5]~365 ),
        .datad(\color[0]~362 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\color[1]~370 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \color[1]~370_I .clock_enable_mode = "false";
defparam \color[1]~370_I .lut_mask = "eac0";
defparam \color[1]~370_I .operation_mode = "normal";
defparam \color[1]~370_I .output_mode = "comb_only";
defparam \color[1]~370_I .packed_mode = "false";
// synopsys translate_on

endmodule

module vga_double (
        pix_out_4,
        color_4,
        pix_out_5,
        color_5,
        pix_out_2,
        color_2,
        pix_out_3,
        color_3,
        pix_out_0,
        color_0,
        pix_out_1,
        color_1,
        line_start,
        scanout_start,
        hsync_start,
        fclk,
        devpor,
        devclrn,
        devoe);
output  pix_out_4;
input   color_4;
output  pix_out_5;
input   color_5;
output  pix_out_2;
input   color_2;
output  pix_out_3;
input   color_3;
output  pix_out_0;
input   color_0;
output  pix_out_1;
input   color_1;
input   line_start;
input   scanout_start;
input   hsync_start;
input   fclk;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire wr_stb;
wire pages;
wire \wr_stb~40 ;
wire \ptr_in[5]~495 ;
wire \ptr_out[0]~276 ;
wire \Equal1~11 ;
wire [9:0] ptr_in;
wire [9:0] ptr_out;
wire [9:0] \Add1|adder|result_node|cout ;
wire [9:0] \Add1|adder|result_node|cs_buffer ;
wire [9:0] \Add1|adder|unreg_res_node ;
wire [5:0] \line_buf|mem_rtl_12|q ;
wire [9:0] \Add0|adder|result_node|cs_buffer ;
wire [9:0] \Add0|adder|result_node|cout ;
wire [9:0] \Add0|adder|unreg_res_node ;


mem1536 line_buf(
        .color_4(color_4),
        .color_5(color_5),
        .color_2(color_2),
        .color_3(color_3),
        .color_0(color_0),
        .color_1(color_1),
        .q_4(\line_buf|mem_rtl_12|q [4]),
        .ptr_out_8(ptr_out[8]),
        .ptr_out_9(ptr_out[9]),
        .q_5(\line_buf|mem_rtl_12|q [5]),
        .q_2(\line_buf|mem_rtl_12|q [2]),
        .q_3(\line_buf|mem_rtl_12|q [3]),
        .q_0(\line_buf|mem_rtl_12|q [0]),
        .q_1(\line_buf|mem_rtl_12|q [1]),
        .wr_stb(wr_stb),
        .ptr_in_0(ptr_in[0]),
        .ptr_in_1(ptr_in[1]),
        .ptr_in_2(ptr_in[2]),
        .ptr_in_3(ptr_in[3]),
        .ptr_in_4(ptr_in[4]),
        .ptr_in_5(ptr_in[5]),
        .ptr_in_6(ptr_in[6]),
        .ptr_in_7(ptr_in[7]),
        .pages(pages),
        .ptr_in_8(ptr_in[8]),
        .ptr_in_9(ptr_in[9]),
        .ptr_out_0(ptr_out[0]),
        .ptr_out_1(ptr_out[1]),
        .ptr_out_2(ptr_out[2]),
        .ptr_out_3(ptr_out[3]),
        .ptr_out_4(ptr_out[4]),
        .ptr_out_5(ptr_out[5]),
        .ptr_out_6(ptr_out[6]),
        .ptr_out_7(ptr_out[7]),
        .fclk(fclk),
        .devpor(devpor),
        .devclrn(devclrn),
        .devoe(devoe));

// atom is at LC1_J12
flex10ke_lcell \wr_stb~I (
// Equation(s):
// wr_stb = DFFEA(wr_stb $ (!line_start & (!ptr_in[8] # !ptr_in[9])), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(wr_stb),
        .datab(line_start),
        .datac(ptr_in[9]),
        .datad(ptr_in[8]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wr_stb),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wr_stb~I .clock_enable_mode = "false";
defparam \wr_stb~I .lut_mask = "a999";
defparam \wr_stb~I .operation_mode = "normal";
defparam \wr_stb~I .output_mode = "reg_only";
defparam \wr_stb~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J5
flex10ke_lcell \ptr_in[0]~I (
// Equation(s):
// ptr_in[0] = DFFEA(\Add0|adder|result_node|cs_buffer [0], GLOBAL(\fclk~dataout ), , , \wr_stb~40 , , )

        .dataa(\wr_stb~40 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_in[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_in[0]~I .clock_enable_mode = "true";
defparam \ptr_in[0]~I .lut_mask = "ff00";
defparam \ptr_in[0]~I .operation_mode = "normal";
defparam \ptr_in[0]~I .output_mode = "reg_only";
defparam \ptr_in[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_J7
flex10ke_lcell \ptr_in[1]~I (
// Equation(s):
// ptr_in[1] = DFFEA(\Add0|adder|result_node|cs_buffer [1], GLOBAL(\fclk~dataout ), , , \wr_stb~40 , , )

        .dataa(\wr_stb~40 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_in[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_in[1]~I .clock_enable_mode = "true";
defparam \ptr_in[1]~I .lut_mask = "ff00";
defparam \ptr_in[1]~I .operation_mode = "normal";
defparam \ptr_in[1]~I .output_mode = "reg_only";
defparam \ptr_in[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J5
flex10ke_lcell \ptr_in[2]~I (
// Equation(s):
// ptr_in[2] = DFFEA(\Add0|adder|result_node|cs_buffer [2], GLOBAL(\fclk~dataout ), , , \wr_stb~40 , , )

        .dataa(\wr_stb~40 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_in[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_in[2]~I .clock_enable_mode = "true";
defparam \ptr_in[2]~I .lut_mask = "ff00";
defparam \ptr_in[2]~I .operation_mode = "normal";
defparam \ptr_in[2]~I .output_mode = "reg_only";
defparam \ptr_in[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J5
flex10ke_lcell \ptr_in[3]~I (
// Equation(s):
// ptr_in[3] = DFFEA(\Add0|adder|result_node|cs_buffer [3], GLOBAL(\fclk~dataout ), , , \wr_stb~40 , , )

        .dataa(\wr_stb~40 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_in[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_in[3]~I .clock_enable_mode = "true";
defparam \ptr_in[3]~I .lut_mask = "ff00";
defparam \ptr_in[3]~I .operation_mode = "normal";
defparam \ptr_in[3]~I .output_mode = "reg_only";
defparam \ptr_in[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J12
flex10ke_lcell \ptr_in[4]~I (
// Equation(s):
// ptr_in[4] = DFFEA(line_start # \Add0|adder|result_node|cs_buffer [4], GLOBAL(\fclk~dataout ), , , \ptr_in[5]~495 , , )

        .dataa(\ptr_in[5]~495 ),
        .datab(vcc),
        .datac(line_start),
        .datad(\Add0|adder|result_node|cs_buffer [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_in[4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_in[4]~I .clock_enable_mode = "true";
defparam \ptr_in[4]~I .lut_mask = "fff0";
defparam \ptr_in[4]~I .operation_mode = "normal";
defparam \ptr_in[4]~I .output_mode = "reg_only";
defparam \ptr_in[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J12
flex10ke_lcell \ptr_in[5]~I (
// Equation(s):
// ptr_in[5] = DFFEA(line_start # \Add0|adder|result_node|cs_buffer [5], GLOBAL(\fclk~dataout ), , , \ptr_in[5]~495 , , )

        .dataa(\ptr_in[5]~495 ),
        .datab(vcc),
        .datac(line_start),
        .datad(\Add0|adder|result_node|cs_buffer [5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_in[5]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_in[5]~I .clock_enable_mode = "true";
defparam \ptr_in[5]~I .lut_mask = "fff0";
defparam \ptr_in[5]~I .operation_mode = "normal";
defparam \ptr_in[5]~I .output_mode = "reg_only";
defparam \ptr_in[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_J7
flex10ke_lcell \ptr_in[6]~I (
// Equation(s):
// ptr_in[6] = DFFEA(\Add0|adder|result_node|cs_buffer [6], GLOBAL(\fclk~dataout ), , , \wr_stb~40 , , )

        .dataa(\wr_stb~40 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_in[6]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_in[6]~I .clock_enable_mode = "true";
defparam \ptr_in[6]~I .lut_mask = "ff00";
defparam \ptr_in[6]~I .operation_mode = "normal";
defparam \ptr_in[6]~I .output_mode = "reg_only";
defparam \ptr_in[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_J7
flex10ke_lcell \ptr_in[7]~I (
// Equation(s):
// ptr_in[7] = DFFEA(\Add0|adder|result_node|cs_buffer [7], GLOBAL(\fclk~dataout ), , , \wr_stb~40 , , )

        .dataa(\wr_stb~40 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add0|adder|result_node|cs_buffer [7]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_in[7]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_in[7]~I .clock_enable_mode = "true";
defparam \ptr_in[7]~I .lut_mask = "ff00";
defparam \ptr_in[7]~I .operation_mode = "normal";
defparam \ptr_in[7]~I .output_mode = "reg_only";
defparam \ptr_in[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B7
flex10ke_lcell \pages~I (
// Equation(s):
// pages = DFFEA(!pages, GLOBAL(\fclk~dataout ), , , hsync_start, , )

        .dataa(hsync_start),
        .datab(vcc),
        .datac(vcc),
        .datad(pages),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(pages),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pages~I .clock_enable_mode = "true";
defparam \pages~I .lut_mask = "00ff";
defparam \pages~I .operation_mode = "normal";
defparam \pages~I .output_mode = "reg_only";
defparam \pages~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J2
flex10ke_lcell \ptr_in[8]~I (
// Equation(s):
// ptr_in[8] = DFFEA(!line_start & (\Add0|adder|result_node|cs_buffer [8] # ptr_in[9] & ptr_in[8]), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(line_start),
        .datab(ptr_in[9]),
        .datac(ptr_in[8]),
        .datad(\Add0|adder|result_node|cs_buffer [8]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_in[8]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_in[8]~I .clock_enable_mode = "false";
defparam \ptr_in[8]~I .lut_mask = "5540";
defparam \ptr_in[8]~I .operation_mode = "normal";
defparam \ptr_in[8]~I .output_mode = "reg_only";
defparam \ptr_in[8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_J12
flex10ke_lcell \ptr_in[9]~I (
// Equation(s):
// ptr_in[9] = DFFEA(!line_start & (\Add0|adder|unreg_res_node [9] # ptr_in[9] & ptr_in[8]), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(line_start),
        .datab(ptr_in[9]),
        .datac(ptr_in[8]),
        .datad(\Add0|adder|unreg_res_node [9]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_in[9]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_in[9]~I .clock_enable_mode = "false";
defparam \ptr_in[9]~I .lut_mask = "5540";
defparam \ptr_in[9]~I .operation_mode = "normal";
defparam \ptr_in[9]~I .output_mode = "reg_only";
defparam \ptr_in[9]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_C17
flex10ke_lcell \ptr_out[0]~I (
// Equation(s):
// ptr_out[0] = DFFEA(!\Add1|adder|result_node|cs_buffer [0], GLOBAL(\fclk~dataout ), , , \ptr_out[0]~276 , , )

        .dataa(\ptr_out[0]~276 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add1|adder|result_node|cs_buffer [0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_out[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_out[0]~I .clock_enable_mode = "true";
defparam \ptr_out[0]~I .lut_mask = "00ff";
defparam \ptr_out[0]~I .operation_mode = "normal";
defparam \ptr_out[0]~I .output_mode = "reg_only";
defparam \ptr_out[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J5
flex10ke_lcell \Add0|adder|result_node|cs_buffer[0]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [0] = ptr_in[0] $ wr_stb
// \Add0|adder|result_node|cout [0] = CARRY(ptr_in[0] & wr_stb)

        .dataa(ptr_in[0]),
        .datab(wr_stb),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [0]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [0]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[0]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[0]~I .lut_mask = "6688";
defparam \Add0|adder|result_node|cs_buffer[0]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[0]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J12
flex10ke_lcell \wr_stb~40_I (
// Equation(s):
// \wr_stb~40  = !line_start & (!ptr_in[8] # !ptr_in[9])

        .dataa(vcc),
        .datab(ptr_in[9]),
        .datac(ptr_in[8]),
        .datad(line_start),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\wr_stb~40 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wr_stb~40_I .clock_enable_mode = "false";
defparam \wr_stb~40_I .lut_mask = "003f";
defparam \wr_stb~40_I .operation_mode = "normal";
defparam \wr_stb~40_I .output_mode = "comb_only";
defparam \wr_stb~40_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J5
flex10ke_lcell \Add0|adder|result_node|cs_buffer[1]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [1] = ptr_in[1] $ \Add0|adder|result_node|cout [0]
// \Add0|adder|result_node|cout [1] = CARRY(ptr_in[1] & \Add0|adder|result_node|cout [0])

        .dataa(vcc),
        .datab(ptr_in[1]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [0]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [1]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [1]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[1]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[1]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[1]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[1]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[1]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_J5
flex10ke_lcell \Add0|adder|result_node|cs_buffer[2]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [2] = ptr_in[2] $ \Add0|adder|result_node|cout [1]
// \Add0|adder|result_node|cout [2] = CARRY(ptr_in[2] & \Add0|adder|result_node|cout [1])

        .dataa(vcc),
        .datab(ptr_in[2]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [1]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [2]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [2]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[2]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[2]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[2]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[2]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[2]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_J5
flex10ke_lcell \Add0|adder|result_node|cs_buffer[3]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [3] = ptr_in[3] $ \Add0|adder|result_node|cout [2]
// \Add0|adder|result_node|cout [3] = CARRY(ptr_in[3] & \Add0|adder|result_node|cout [2])

        .dataa(vcc),
        .datab(ptr_in[3]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [2]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [3]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [3]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[3]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[3]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[3]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[3]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[3]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_J5
flex10ke_lcell \Add0|adder|result_node|cs_buffer[4]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [4] = ptr_in[4] $ \Add0|adder|result_node|cout [3]
// \Add0|adder|result_node|cout [4] = CARRY(ptr_in[4] & \Add0|adder|result_node|cout [3])

        .dataa(vcc),
        .datab(ptr_in[4]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [3]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [4]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [4]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[4]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[4]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[4]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[4]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[4]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J12
flex10ke_lcell \ptr_in[5]~495_I (
// Equation(s):
// \ptr_in[5]~495  = line_start # !ptr_in[8] # !ptr_in[9]

        .dataa(vcc),
        .datab(ptr_in[9]),
        .datac(ptr_in[8]),
        .datad(line_start),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ptr_in[5]~495 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_in[5]~495_I .clock_enable_mode = "false";
defparam \ptr_in[5]~495_I .lut_mask = "ff3f";
defparam \ptr_in[5]~495_I .operation_mode = "normal";
defparam \ptr_in[5]~495_I .output_mode = "comb_only";
defparam \ptr_in[5]~495_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J7
flex10ke_lcell \Add0|adder|result_node|cs_buffer[5]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [5] = ptr_in[5] $ \Add0|adder|result_node|cout [4]
// \Add0|adder|result_node|cout [5] = CARRY(ptr_in[5] & \Add0|adder|result_node|cout [4])

        .dataa(vcc),
        .datab(ptr_in[5]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [4]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [5]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [5]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[5]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[5]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[5]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[5]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[5]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J7
flex10ke_lcell \Add0|adder|result_node|cs_buffer[6]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [6] = ptr_in[6] $ \Add0|adder|result_node|cout [5]
// \Add0|adder|result_node|cout [6] = CARRY(ptr_in[6] & \Add0|adder|result_node|cout [5])

        .dataa(vcc),
        .datab(ptr_in[6]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [5]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [6]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [6]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[6]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[6]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[6]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[6]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[6]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J7
flex10ke_lcell \Add0|adder|result_node|cs_buffer[7]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [7] = ptr_in[7] $ \Add0|adder|result_node|cout [6]
// \Add0|adder|result_node|cout [7] = CARRY(ptr_in[7] & \Add0|adder|result_node|cout [6])

        .dataa(vcc),
        .datab(ptr_in[7]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [6]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [7]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [7]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[7]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[7]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[7]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[7]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[7]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_J7
flex10ke_lcell \Add0|adder|result_node|cs_buffer[8]~I (
// Equation(s):
// \Add0|adder|result_node|cs_buffer [8] = ptr_in[8] $ \Add0|adder|result_node|cout [7]
// \Add0|adder|result_node|cout [8] = CARRY(ptr_in[8] & \Add0|adder|result_node|cout [7])

        .dataa(vcc),
        .datab(ptr_in[8]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [7]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|result_node|cs_buffer [8]),
        .regout(),
        .cout(\Add0|adder|result_node|cout [8]),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|result_node|cs_buffer[8]~I .cin_used = "true";
defparam \Add0|adder|result_node|cs_buffer[8]~I .clock_enable_mode = "false";
defparam \Add0|adder|result_node|cs_buffer[8]~I .lut_mask = "3cc0";
defparam \Add0|adder|result_node|cs_buffer[8]~I .operation_mode = "arithmetic";
defparam \Add0|adder|result_node|cs_buffer[8]~I .output_mode = "comb_only";
defparam \Add0|adder|result_node|cs_buffer[8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_C3
flex10ke_lcell \Add1|adder|result_node|cs_buffer[0]~I (
// Equation(s):
// \Add1|adder|result_node|cs_buffer [0] = ptr_out[0] $ \Equal1~11 
// \Add1|adder|result_node|cout [0] = CARRY(ptr_out[0] & !\Equal1~11 )

        .dataa(ptr_out[0]),
        .datab(\Equal1~11 ),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add1|adder|result_node|cs_buffer [0]),
        .regout(),
        .cout(\Add1|adder|result_node|cout [0]),
        .cascout());
// synopsys translate_off
defparam \Add1|adder|result_node|cs_buffer[0]~I .clock_enable_mode = "false";
defparam \Add1|adder|result_node|cs_buffer[0]~I .lut_mask = "6622";
defparam \Add1|adder|result_node|cs_buffer[0]~I .operation_mode = "arithmetic";
defparam \Add1|adder|result_node|cs_buffer[0]~I .output_mode = "comb_only";
defparam \Add1|adder|result_node|cs_buffer[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_J7
flex10ke_lcell \Add0|adder|unreg_res_node[9]~I (
// Equation(s):
// \Add0|adder|unreg_res_node [9] = \Add0|adder|result_node|cout [8] $ ptr_in[9]

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(ptr_in[9]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add0|adder|result_node|cout [8]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add0|adder|unreg_res_node [9]),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Add0|adder|unreg_res_node[9]~I .cin_used = "true";
defparam \Add0|adder|unreg_res_node[9]~I .clock_enable_mode = "false";
defparam \Add0|adder|unreg_res_node[9]~I .lut_mask = "0ff0";
defparam \Add0|adder|unreg_res_node[9]~I .operation_mode = "normal";
defparam \Add0|adder|unreg_res_node[9]~I .output_mode = "comb_only";
defparam \Add0|adder|unreg_res_node[9]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_C17
flex10ke_lcell \ptr_out[0]~276_I (
// Equation(s):
// \ptr_out[0]~276  = !scanout_start

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(scanout_start),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ptr_out[0]~276 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_out[0]~276_I .clock_enable_mode = "false";
defparam \ptr_out[0]~276_I .lut_mask = "00ff";
defparam \ptr_out[0]~276_I .operation_mode = "normal";
defparam \ptr_out[0]~276_I .output_mode = "comb_only";
defparam \ptr_out[0]~276_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F2
flex10ke_lcell \pix_out[4]~I (
// Equation(s):
// pix_out_4 = DFFEA(q_4 & (!ptr_out[8] # !ptr_out[9]), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(ptr_out[9]),
        .datac(ptr_out[8]),
        .datad(\line_buf|mem_rtl_12|q [4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(pix_out_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pix_out[4]~I .clock_enable_mode = "false";
defparam \pix_out[4]~I .lut_mask = "3f00";
defparam \pix_out[4]~I .operation_mode = "normal";
defparam \pix_out[4]~I .output_mode = "reg_only";
defparam \pix_out[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_F2
flex10ke_lcell \pix_out[5]~I (
// Equation(s):
// pix_out_5 = DFFEA(q_5 & (!ptr_out[8] # !ptr_out[9]), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(ptr_out[9]),
        .datac(ptr_out[8]),
        .datad(\line_buf|mem_rtl_12|q [5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(pix_out_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pix_out[5]~I .clock_enable_mode = "false";
defparam \pix_out[5]~I .lut_mask = "3f00";
defparam \pix_out[5]~I .operation_mode = "normal";
defparam \pix_out[5]~I .output_mode = "reg_only";
defparam \pix_out[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F4
flex10ke_lcell \pix_out[2]~I (
// Equation(s):
// pix_out_2 = DFFEA(q_2 & (!ptr_out[8] # !ptr_out[9]), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(ptr_out[9]),
        .datac(ptr_out[8]),
        .datad(\line_buf|mem_rtl_12|q [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(pix_out_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pix_out[2]~I .clock_enable_mode = "false";
defparam \pix_out[2]~I .lut_mask = "3f00";
defparam \pix_out[2]~I .operation_mode = "normal";
defparam \pix_out[2]~I .output_mode = "reg_only";
defparam \pix_out[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F10
flex10ke_lcell \pix_out[3]~I (
// Equation(s):
// pix_out_3 = DFFEA(q_3 & (!ptr_out[8] # !ptr_out[9]), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(ptr_out[9]),
        .datac(ptr_out[8]),
        .datad(\line_buf|mem_rtl_12|q [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(pix_out_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pix_out[3]~I .clock_enable_mode = "false";
defparam \pix_out[3]~I .lut_mask = "3f00";
defparam \pix_out[3]~I .operation_mode = "normal";
defparam \pix_out[3]~I .output_mode = "reg_only";
defparam \pix_out[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F1
flex10ke_lcell \pix_out[0]~I (
// Equation(s):
// pix_out_0 = DFFEA(q_0 & (!ptr_out[8] # !ptr_out[9]), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(ptr_out[9]),
        .datac(ptr_out[8]),
        .datad(\line_buf|mem_rtl_12|q [0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(pix_out_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pix_out[0]~I .clock_enable_mode = "false";
defparam \pix_out[0]~I .lut_mask = "3f00";
defparam \pix_out[0]~I .operation_mode = "normal";
defparam \pix_out[0]~I .output_mode = "reg_only";
defparam \pix_out[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_F10
flex10ke_lcell \pix_out[1]~I (
// Equation(s):
// pix_out_1 = DFFEA(q_1 & (!ptr_out[8] # !ptr_out[9]), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(ptr_out[9]),
        .datac(ptr_out[8]),
        .datad(\line_buf|mem_rtl_12|q [1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(pix_out_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pix_out[1]~I .clock_enable_mode = "false";
defparam \pix_out[1]~I .lut_mask = "3f00";
defparam \pix_out[1]~I .operation_mode = "normal";
defparam \pix_out[1]~I .output_mode = "reg_only";
defparam \pix_out[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F10
flex10ke_lcell \Equal1~11_I (
// Equation(s):
// \Equal1~11  = ptr_out[9] & ptr_out[8]

        .dataa(vcc),
        .datab(vcc),
        .datac(ptr_out[9]),
        .datad(ptr_out[8]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal1~11 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal1~11_I .clock_enable_mode = "false";
defparam \Equal1~11_I .lut_mask = "f000";
defparam \Equal1~11_I .operation_mode = "normal";
defparam \Equal1~11_I .output_mode = "comb_only";
defparam \Equal1~11_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_C3
flex10ke_lcell \Add1|adder|result_node|cs_buffer[1]~I (
// Equation(s):
// \Add1|adder|result_node|cs_buffer [1] = ptr_out[1] $ \Add1|adder|result_node|cout [0]
// \Add1|adder|result_node|cout [1] = CARRY(ptr_out[1] & \Add1|adder|result_node|cout [0])

        .dataa(vcc),
        .datab(ptr_out[1]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add1|adder|result_node|cout [0]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add1|adder|result_node|cs_buffer [1]),
        .regout(),
        .cout(\Add1|adder|result_node|cout [1]),
        .cascout());
// synopsys translate_off
defparam \Add1|adder|result_node|cs_buffer[1]~I .cin_used = "true";
defparam \Add1|adder|result_node|cs_buffer[1]~I .clock_enable_mode = "false";
defparam \Add1|adder|result_node|cs_buffer[1]~I .lut_mask = "3cc0";
defparam \Add1|adder|result_node|cs_buffer[1]~I .operation_mode = "arithmetic";
defparam \Add1|adder|result_node|cs_buffer[1]~I .output_mode = "comb_only";
defparam \Add1|adder|result_node|cs_buffer[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_C17
flex10ke_lcell \ptr_out[1]~I (
// Equation(s):
// ptr_out[1] = DFFEA(\Add1|adder|result_node|cs_buffer [1], GLOBAL(\fclk~dataout ), , , \ptr_out[0]~276 , , )

        .dataa(\ptr_out[0]~276 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add1|adder|result_node|cs_buffer [1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_out[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_out[1]~I .clock_enable_mode = "true";
defparam \ptr_out[1]~I .lut_mask = "ff00";
defparam \ptr_out[1]~I .operation_mode = "normal";
defparam \ptr_out[1]~I .output_mode = "reg_only";
defparam \ptr_out[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_C3
flex10ke_lcell \Add1|adder|result_node|cs_buffer[2]~I (
// Equation(s):
// \Add1|adder|result_node|cs_buffer [2] = ptr_out[2] $ \Add1|adder|result_node|cout [1]
// \Add1|adder|result_node|cout [2] = CARRY(ptr_out[2] & \Add1|adder|result_node|cout [1])

        .dataa(vcc),
        .datab(ptr_out[2]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add1|adder|result_node|cout [1]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add1|adder|result_node|cs_buffer [2]),
        .regout(),
        .cout(\Add1|adder|result_node|cout [2]),
        .cascout());
// synopsys translate_off
defparam \Add1|adder|result_node|cs_buffer[2]~I .cin_used = "true";
defparam \Add1|adder|result_node|cs_buffer[2]~I .clock_enable_mode = "false";
defparam \Add1|adder|result_node|cs_buffer[2]~I .lut_mask = "3cc0";
defparam \Add1|adder|result_node|cs_buffer[2]~I .operation_mode = "arithmetic";
defparam \Add1|adder|result_node|cs_buffer[2]~I .output_mode = "comb_only";
defparam \Add1|adder|result_node|cs_buffer[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_C3
flex10ke_lcell \ptr_out[2]~I (
// Equation(s):
// ptr_out[2] = DFFEA(\Add1|adder|result_node|cs_buffer [2], GLOBAL(\fclk~dataout ), , , \ptr_out[0]~276 , , )

        .dataa(\ptr_out[0]~276 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add1|adder|result_node|cs_buffer [2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_out[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_out[2]~I .clock_enable_mode = "true";
defparam \ptr_out[2]~I .lut_mask = "ff00";
defparam \ptr_out[2]~I .operation_mode = "normal";
defparam \ptr_out[2]~I .output_mode = "reg_only";
defparam \ptr_out[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_C3
flex10ke_lcell \Add1|adder|result_node|cs_buffer[3]~I (
// Equation(s):
// \Add1|adder|result_node|cs_buffer [3] = ptr_out[3] $ \Add1|adder|result_node|cout [2]
// \Add1|adder|result_node|cout [3] = CARRY(ptr_out[3] & \Add1|adder|result_node|cout [2])

        .dataa(vcc),
        .datab(ptr_out[3]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add1|adder|result_node|cout [2]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add1|adder|result_node|cs_buffer [3]),
        .regout(),
        .cout(\Add1|adder|result_node|cout [3]),
        .cascout());
// synopsys translate_off
defparam \Add1|adder|result_node|cs_buffer[3]~I .cin_used = "true";
defparam \Add1|adder|result_node|cs_buffer[3]~I .clock_enable_mode = "false";
defparam \Add1|adder|result_node|cs_buffer[3]~I .lut_mask = "3cc0";
defparam \Add1|adder|result_node|cs_buffer[3]~I .operation_mode = "arithmetic";
defparam \Add1|adder|result_node|cs_buffer[3]~I .output_mode = "comb_only";
defparam \Add1|adder|result_node|cs_buffer[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_C3
flex10ke_lcell \ptr_out[3]~I (
// Equation(s):
// ptr_out[3] = DFFEA(\Add1|adder|result_node|cs_buffer [3], GLOBAL(\fclk~dataout ), , , \ptr_out[0]~276 , , )

        .dataa(\ptr_out[0]~276 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add1|adder|result_node|cs_buffer [3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_out[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_out[3]~I .clock_enable_mode = "true";
defparam \ptr_out[3]~I .lut_mask = "ff00";
defparam \ptr_out[3]~I .operation_mode = "normal";
defparam \ptr_out[3]~I .output_mode = "reg_only";
defparam \ptr_out[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_C3
flex10ke_lcell \Add1|adder|result_node|cs_buffer[4]~I (
// Equation(s):
// \Add1|adder|result_node|cs_buffer [4] = ptr_out[4] $ \Add1|adder|result_node|cout [3]
// \Add1|adder|result_node|cout [4] = CARRY(ptr_out[4] & \Add1|adder|result_node|cout [3])

        .dataa(vcc),
        .datab(ptr_out[4]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add1|adder|result_node|cout [3]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add1|adder|result_node|cs_buffer [4]),
        .regout(),
        .cout(\Add1|adder|result_node|cout [4]),
        .cascout());
// synopsys translate_off
defparam \Add1|adder|result_node|cs_buffer[4]~I .cin_used = "true";
defparam \Add1|adder|result_node|cs_buffer[4]~I .clock_enable_mode = "false";
defparam \Add1|adder|result_node|cs_buffer[4]~I .lut_mask = "3cc0";
defparam \Add1|adder|result_node|cs_buffer[4]~I .operation_mode = "arithmetic";
defparam \Add1|adder|result_node|cs_buffer[4]~I .output_mode = "comb_only";
defparam \Add1|adder|result_node|cs_buffer[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_C3
flex10ke_lcell \ptr_out[4]~I (
// Equation(s):
// ptr_out[4] = DFFEA(\Add1|adder|result_node|cs_buffer [4] # scanout_start, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(\Add1|adder|result_node|cs_buffer [4]),
        .datad(scanout_start),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_out[4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_out[4]~I .clock_enable_mode = "false";
defparam \ptr_out[4]~I .lut_mask = "fff0";
defparam \ptr_out[4]~I .operation_mode = "normal";
defparam \ptr_out[4]~I .output_mode = "reg_only";
defparam \ptr_out[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_C5
flex10ke_lcell \Add1|adder|result_node|cs_buffer[5]~I (
// Equation(s):
// \Add1|adder|result_node|cs_buffer [5] = ptr_out[5] $ \Add1|adder|result_node|cout [4]
// \Add1|adder|result_node|cout [5] = CARRY(ptr_out[5] & \Add1|adder|result_node|cout [4])

        .dataa(vcc),
        .datab(ptr_out[5]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add1|adder|result_node|cout [4]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add1|adder|result_node|cs_buffer [5]),
        .regout(),
        .cout(\Add1|adder|result_node|cout [5]),
        .cascout());
// synopsys translate_off
defparam \Add1|adder|result_node|cs_buffer[5]~I .cin_used = "true";
defparam \Add1|adder|result_node|cs_buffer[5]~I .clock_enable_mode = "false";
defparam \Add1|adder|result_node|cs_buffer[5]~I .lut_mask = "3cc0";
defparam \Add1|adder|result_node|cs_buffer[5]~I .operation_mode = "arithmetic";
defparam \Add1|adder|result_node|cs_buffer[5]~I .output_mode = "comb_only";
defparam \Add1|adder|result_node|cs_buffer[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_C5
flex10ke_lcell \ptr_out[5]~I (
// Equation(s):
// ptr_out[5] = DFFEA(\Add1|adder|result_node|cs_buffer [5] # scanout_start, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(\Add1|adder|result_node|cs_buffer [5]),
        .datad(scanout_start),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_out[5]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_out[5]~I .clock_enable_mode = "false";
defparam \ptr_out[5]~I .lut_mask = "fff0";
defparam \ptr_out[5]~I .operation_mode = "normal";
defparam \ptr_out[5]~I .output_mode = "reg_only";
defparam \ptr_out[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_C5
flex10ke_lcell \Add1|adder|result_node|cs_buffer[6]~I (
// Equation(s):
// \Add1|adder|result_node|cs_buffer [6] = ptr_out[6] $ \Add1|adder|result_node|cout [5]
// \Add1|adder|result_node|cout [6] = CARRY(ptr_out[6] & \Add1|adder|result_node|cout [5])

        .dataa(vcc),
        .datab(ptr_out[6]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add1|adder|result_node|cout [5]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add1|adder|result_node|cs_buffer [6]),
        .regout(),
        .cout(\Add1|adder|result_node|cout [6]),
        .cascout());
// synopsys translate_off
defparam \Add1|adder|result_node|cs_buffer[6]~I .cin_used = "true";
defparam \Add1|adder|result_node|cs_buffer[6]~I .clock_enable_mode = "false";
defparam \Add1|adder|result_node|cs_buffer[6]~I .lut_mask = "3cc0";
defparam \Add1|adder|result_node|cs_buffer[6]~I .operation_mode = "arithmetic";
defparam \Add1|adder|result_node|cs_buffer[6]~I .output_mode = "comb_only";
defparam \Add1|adder|result_node|cs_buffer[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_C17
flex10ke_lcell \ptr_out[6]~I (
// Equation(s):
// ptr_out[6] = DFFEA(\Add1|adder|result_node|cs_buffer [6], GLOBAL(\fclk~dataout ), , , \ptr_out[0]~276 , , )

        .dataa(\ptr_out[0]~276 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add1|adder|result_node|cs_buffer [6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_out[6]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_out[6]~I .clock_enable_mode = "true";
defparam \ptr_out[6]~I .lut_mask = "ff00";
defparam \ptr_out[6]~I .operation_mode = "normal";
defparam \ptr_out[6]~I .output_mode = "reg_only";
defparam \ptr_out[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_C5
flex10ke_lcell \Add1|adder|result_node|cs_buffer[7]~I (
// Equation(s):
// \Add1|adder|result_node|cs_buffer [7] = ptr_out[7] $ \Add1|adder|result_node|cout [6]
// \Add1|adder|result_node|cout [7] = CARRY(ptr_out[7] & \Add1|adder|result_node|cout [6])

        .dataa(vcc),
        .datab(ptr_out[7]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add1|adder|result_node|cout [6]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add1|adder|result_node|cs_buffer [7]),
        .regout(),
        .cout(\Add1|adder|result_node|cout [7]),
        .cascout());
// synopsys translate_off
defparam \Add1|adder|result_node|cs_buffer[7]~I .cin_used = "true";
defparam \Add1|adder|result_node|cs_buffer[7]~I .clock_enable_mode = "false";
defparam \Add1|adder|result_node|cs_buffer[7]~I .lut_mask = "3cc0";
defparam \Add1|adder|result_node|cs_buffer[7]~I .operation_mode = "arithmetic";
defparam \Add1|adder|result_node|cs_buffer[7]~I .output_mode = "comb_only";
defparam \Add1|adder|result_node|cs_buffer[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_C17
flex10ke_lcell \ptr_out[7]~I (
// Equation(s):
// ptr_out[7] = DFFEA(\Add1|adder|result_node|cs_buffer [7], GLOBAL(\fclk~dataout ), , , \ptr_out[0]~276 , , )

        .dataa(\ptr_out[0]~276 ),
        .datab(vcc),
        .datac(vcc),
        .datad(\Add1|adder|result_node|cs_buffer [7]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_out[7]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_out[7]~I .clock_enable_mode = "true";
defparam \ptr_out[7]~I .lut_mask = "ff00";
defparam \ptr_out[7]~I .operation_mode = "normal";
defparam \ptr_out[7]~I .output_mode = "reg_only";
defparam \ptr_out[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_C5
flex10ke_lcell \Add1|adder|result_node|cs_buffer[8]~I (
// Equation(s):
// \Add1|adder|result_node|cs_buffer [8] = ptr_out[8] $ \Add1|adder|result_node|cout [7]
// \Add1|adder|result_node|cout [8] = CARRY(ptr_out[8] & \Add1|adder|result_node|cout [7])

        .dataa(vcc),
        .datab(ptr_out[8]),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add1|adder|result_node|cout [7]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add1|adder|result_node|cs_buffer [8]),
        .regout(),
        .cout(\Add1|adder|result_node|cout [8]),
        .cascout());
// synopsys translate_off
defparam \Add1|adder|result_node|cs_buffer[8]~I .cin_used = "true";
defparam \Add1|adder|result_node|cs_buffer[8]~I .clock_enable_mode = "false";
defparam \Add1|adder|result_node|cs_buffer[8]~I .lut_mask = "3cc0";
defparam \Add1|adder|result_node|cs_buffer[8]~I .operation_mode = "arithmetic";
defparam \Add1|adder|result_node|cs_buffer[8]~I .output_mode = "comb_only";
defparam \Add1|adder|result_node|cs_buffer[8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_C5
flex10ke_lcell \ptr_out[8]~I (
// Equation(s):
// ptr_out[8] = DFFEA(!scanout_start & \Add1|adder|result_node|cs_buffer [8], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(scanout_start),
        .datad(\Add1|adder|result_node|cs_buffer [8]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_out[8]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_out[8]~I .clock_enable_mode = "false";
defparam \ptr_out[8]~I .lut_mask = "0f00";
defparam \ptr_out[8]~I .operation_mode = "normal";
defparam \ptr_out[8]~I .output_mode = "reg_only";
defparam \ptr_out[8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_C5
flex10ke_lcell \Add1|adder|unreg_res_node[9]~I (
// Equation(s):
// \Add1|adder|unreg_res_node [9] = \Add1|adder|result_node|cout [8] $ ptr_out[9]

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(ptr_out[9]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(\Add1|adder|result_node|cout [8]),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Add1|adder|unreg_res_node [9]),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Add1|adder|unreg_res_node[9]~I .cin_used = "true";
defparam \Add1|adder|unreg_res_node[9]~I .clock_enable_mode = "false";
defparam \Add1|adder|unreg_res_node[9]~I .lut_mask = "0ff0";
defparam \Add1|adder|unreg_res_node[9]~I .operation_mode = "normal";
defparam \Add1|adder|unreg_res_node[9]~I .output_mode = "comb_only";
defparam \Add1|adder|unreg_res_node[9]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_C5
flex10ke_lcell \ptr_out[9]~I (
// Equation(s):
// ptr_out[9] = DFFEA(!scanout_start & \Add1|adder|unreg_res_node [9], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(scanout_start),
        .datad(\Add1|adder|unreg_res_node [9]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ptr_out[9]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ptr_out[9]~I .clock_enable_mode = "false";
defparam \ptr_out[9]~I .lut_mask = "0f00";
defparam \ptr_out[9]~I .operation_mode = "normal";
defparam \ptr_out[9]~I .output_mode = "reg_only";
defparam \ptr_out[9]~I .packed_mode = "false";
// synopsys translate_on

endmodule

module mem1536 (
        color_4,
        color_5,
        color_2,
        color_3,
        color_0,
        color_1,
        q_4,
        ptr_out_8,
        ptr_out_9,
        q_5,
        q_2,
        q_3,
        q_0,
        q_1,
        wr_stb,
        ptr_in_0,
        ptr_in_1,
        ptr_in_2,
        ptr_in_3,
        ptr_in_4,
        ptr_in_5,
        ptr_in_6,
        ptr_in_7,
        pages,
        ptr_in_8,
        ptr_in_9,
        ptr_out_0,
        ptr_out_1,
        ptr_out_2,
        ptr_out_3,
        ptr_out_4,
        ptr_out_5,
        ptr_out_6,
        ptr_out_7,
        fclk,
        devpor,
        devclrn,
        devoe);
input   color_4;
input   color_5;
input   color_2;
input   color_3;
input   color_0;
input   color_1;
output  q_4;
input   ptr_out_8;
input   ptr_out_9;
output  q_5;
output  q_2;
output  q_3;
output  q_0;
output  q_1;
input   wr_stb;
input   ptr_in_0;
input   ptr_in_1;
input   ptr_in_2;
input   ptr_in_3;
input   ptr_in_4;
input   ptr_in_5;
input   ptr_in_6;
input   ptr_in_7;
input   pages;
input   ptr_in_8;
input   ptr_in_9;
input   ptr_out_0;
input   ptr_out_1;
input   ptr_out_2;
input   ptr_out_3;
input   ptr_out_4;
input   ptr_out_5;
input   ptr_out_6;
input   ptr_out_7;
input   fclk;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \mem_rtl_12|segment[0][4]~0 ;


// atom is at EC1_C
flex10ke_ram_slice \mem_rtl_12|segment[0][4] (
        .datain(color_4),
        .clk0(fclk),
        .clk1(fclk),
        .ena0(vcc),
        .ena1(vcc),
        .clr0(gnd),
        .we(wr_stb),
        .re(vcc),
        .waddr({ptr_in_9,ptr_in_8,pages,ptr_in_7,ptr_in_6,ptr_in_5,ptr_in_4,ptr_in_3,ptr_in_2,ptr_in_1,ptr_in_0}),
        .raddr({ptr_out_9,ptr_out_8,\mem_rtl_12|segment[0][4]~0 ,ptr_out_7,ptr_out_6,ptr_out_5,ptr_out_4,ptr_out_3,ptr_out_2,ptr_out_1,ptr_out_0}),
        .devclrn(devclrn),
        .devpor(devpor),
        .modesel(16'b0011000100000101),
        .dataout(q_4));
// synopsys translate_off
defparam \mem_rtl_12|segment[0][4] .address_width = 11;
defparam \mem_rtl_12|segment[0][4] .bit_number = 4;
defparam \mem_rtl_12|segment[0][4] .data_in_clear = "none";
defparam \mem_rtl_12|segment[0][4] .data_in_clock = "clock0";
defparam \mem_rtl_12|segment[0][4] .data_out_clear = "none";
defparam \mem_rtl_12|segment[0][4] .data_out_clock = "clock1";
defparam \mem_rtl_12|segment[0][4] .first_address = 0;
defparam \mem_rtl_12|segment[0][4] .init_file = "none";
defparam \mem_rtl_12|segment[0][4] .last_address = 1535;
defparam \mem_rtl_12|segment[0][4] .logical_ram_depth = 1536;
defparam \mem_rtl_12|segment[0][4] .logical_ram_name = "videoout:vidia|vga_double:vga_double|mem1536:line_buf|altdpram:mem_rtl_12|content";
defparam \mem_rtl_12|segment[0][4] .logical_ram_width = 6;
defparam \mem_rtl_12|segment[0][4] .operation_mode = "dual_port";
defparam \mem_rtl_12|segment[0][4] .read_address_clear = "none";
defparam \mem_rtl_12|segment[0][4] .read_address_clock = "none";
defparam \mem_rtl_12|segment[0][4] .read_enable_clear = "none";
defparam \mem_rtl_12|segment[0][4] .read_enable_clock = "none";
defparam \mem_rtl_12|segment[0][4] .write_address_clear = "none";
defparam \mem_rtl_12|segment[0][4] .write_enable_clear = "none";
defparam \mem_rtl_12|segment[0][4] .write_logic_clock = "clock0";
// synopsys translate_on

// atom is at EC1_F
flex10ke_ram_slice \mem_rtl_12|segment[0][5] (
        .datain(color_5),
        .clk0(fclk),
        .clk1(fclk),
        .ena0(vcc),
        .ena1(vcc),
        .clr0(gnd),
        .we(wr_stb),
        .re(vcc),
        .waddr({ptr_in_9,ptr_in_8,pages,ptr_in_7,ptr_in_6,ptr_in_5,ptr_in_4,ptr_in_3,ptr_in_2,ptr_in_1,ptr_in_0}),
        .raddr({ptr_out_9,ptr_out_8,\mem_rtl_12|segment[0][4]~0 ,ptr_out_7,ptr_out_6,ptr_out_5,ptr_out_4,ptr_out_3,ptr_out_2,ptr_out_1,ptr_out_0}),
        .devclrn(devclrn),
        .devpor(devpor),
        .modesel(16'b0011000100000101),
        .dataout(q_5));
// synopsys translate_off
defparam \mem_rtl_12|segment[0][5] .address_width = 11;
defparam \mem_rtl_12|segment[0][5] .bit_number = 5;
defparam \mem_rtl_12|segment[0][5] .data_in_clear = "none";
defparam \mem_rtl_12|segment[0][5] .data_in_clock = "clock0";
defparam \mem_rtl_12|segment[0][5] .data_out_clear = "none";
defparam \mem_rtl_12|segment[0][5] .data_out_clock = "clock1";
defparam \mem_rtl_12|segment[0][5] .first_address = 0;
defparam \mem_rtl_12|segment[0][5] .init_file = "none";
defparam \mem_rtl_12|segment[0][5] .last_address = 1535;
defparam \mem_rtl_12|segment[0][5] .logical_ram_depth = 1536;
defparam \mem_rtl_12|segment[0][5] .logical_ram_name = "videoout:vidia|vga_double:vga_double|mem1536:line_buf|altdpram:mem_rtl_12|content";
defparam \mem_rtl_12|segment[0][5] .logical_ram_width = 6;
defparam \mem_rtl_12|segment[0][5] .operation_mode = "dual_port";
defparam \mem_rtl_12|segment[0][5] .read_address_clear = "none";
defparam \mem_rtl_12|segment[0][5] .read_address_clock = "none";
defparam \mem_rtl_12|segment[0][5] .read_enable_clear = "none";
defparam \mem_rtl_12|segment[0][5] .read_enable_clock = "none";
defparam \mem_rtl_12|segment[0][5] .write_address_clear = "none";
defparam \mem_rtl_12|segment[0][5] .write_enable_clear = "none";
defparam \mem_rtl_12|segment[0][5] .write_logic_clock = "clock0";
// synopsys translate_on

// atom is at EC9_F
flex10ke_ram_slice \mem_rtl_12|segment[0][2] (
        .datain(color_2),
        .clk0(fclk),
        .clk1(fclk),
        .ena0(vcc),
        .ena1(vcc),
        .clr0(gnd),
        .we(wr_stb),
        .re(vcc),
        .waddr({ptr_in_9,ptr_in_8,pages,ptr_in_7,ptr_in_6,ptr_in_5,ptr_in_4,ptr_in_3,ptr_in_2,ptr_in_1,ptr_in_0}),
        .raddr({ptr_out_9,ptr_out_8,\mem_rtl_12|segment[0][4]~0 ,ptr_out_7,ptr_out_6,ptr_out_5,ptr_out_4,ptr_out_3,ptr_out_2,ptr_out_1,ptr_out_0}),
        .devclrn(devclrn),
        .devpor(devpor),
        .modesel(16'b0011000100000101),
        .dataout(q_2));
// synopsys translate_off
defparam \mem_rtl_12|segment[0][2] .address_width = 11;
defparam \mem_rtl_12|segment[0][2] .bit_number = 2;
defparam \mem_rtl_12|segment[0][2] .data_in_clear = "none";
defparam \mem_rtl_12|segment[0][2] .data_in_clock = "clock0";
defparam \mem_rtl_12|segment[0][2] .data_out_clear = "none";
defparam \mem_rtl_12|segment[0][2] .data_out_clock = "clock1";
defparam \mem_rtl_12|segment[0][2] .first_address = 0;
defparam \mem_rtl_12|segment[0][2] .init_file = "none";
defparam \mem_rtl_12|segment[0][2] .last_address = 1535;
defparam \mem_rtl_12|segment[0][2] .logical_ram_depth = 1536;
defparam \mem_rtl_12|segment[0][2] .logical_ram_name = "videoout:vidia|vga_double:vga_double|mem1536:line_buf|altdpram:mem_rtl_12|content";
defparam \mem_rtl_12|segment[0][2] .logical_ram_width = 6;
defparam \mem_rtl_12|segment[0][2] .operation_mode = "dual_port";
defparam \mem_rtl_12|segment[0][2] .read_address_clear = "none";
defparam \mem_rtl_12|segment[0][2] .read_address_clock = "none";
defparam \mem_rtl_12|segment[0][2] .read_enable_clear = "none";
defparam \mem_rtl_12|segment[0][2] .read_enable_clock = "none";
defparam \mem_rtl_12|segment[0][2] .write_address_clear = "none";
defparam \mem_rtl_12|segment[0][2] .write_enable_clear = "none";
defparam \mem_rtl_12|segment[0][2] .write_logic_clock = "clock0";
// synopsys translate_on

// atom is at EC1_J
flex10ke_ram_slice \mem_rtl_12|segment[0][3] (
        .datain(color_3),
        .clk0(fclk),
        .clk1(fclk),
        .ena0(vcc),
        .ena1(vcc),
        .clr0(gnd),
        .we(wr_stb),
        .re(vcc),
        .waddr({ptr_in_9,ptr_in_8,pages,ptr_in_7,ptr_in_6,ptr_in_5,ptr_in_4,ptr_in_3,ptr_in_2,ptr_in_1,ptr_in_0}),
        .raddr({ptr_out_9,ptr_out_8,\mem_rtl_12|segment[0][4]~0 ,ptr_out_7,ptr_out_6,ptr_out_5,ptr_out_4,ptr_out_3,ptr_out_2,ptr_out_1,ptr_out_0}),
        .devclrn(devclrn),
        .devpor(devpor),
        .modesel(16'b0011000100000101),
        .dataout(q_3));
// synopsys translate_off
defparam \mem_rtl_12|segment[0][3] .address_width = 11;
defparam \mem_rtl_12|segment[0][3] .bit_number = 3;
defparam \mem_rtl_12|segment[0][3] .data_in_clear = "none";
defparam \mem_rtl_12|segment[0][3] .data_in_clock = "clock0";
defparam \mem_rtl_12|segment[0][3] .data_out_clear = "none";
defparam \mem_rtl_12|segment[0][3] .data_out_clock = "clock1";
defparam \mem_rtl_12|segment[0][3] .first_address = 0;
defparam \mem_rtl_12|segment[0][3] .init_file = "none";
defparam \mem_rtl_12|segment[0][3] .last_address = 1535;
defparam \mem_rtl_12|segment[0][3] .logical_ram_depth = 1536;
defparam \mem_rtl_12|segment[0][3] .logical_ram_name = "videoout:vidia|vga_double:vga_double|mem1536:line_buf|altdpram:mem_rtl_12|content";
defparam \mem_rtl_12|segment[0][3] .logical_ram_width = 6;
defparam \mem_rtl_12|segment[0][3] .operation_mode = "dual_port";
defparam \mem_rtl_12|segment[0][3] .read_address_clear = "none";
defparam \mem_rtl_12|segment[0][3] .read_address_clock = "none";
defparam \mem_rtl_12|segment[0][3] .read_enable_clear = "none";
defparam \mem_rtl_12|segment[0][3] .read_enable_clock = "none";
defparam \mem_rtl_12|segment[0][3] .write_address_clear = "none";
defparam \mem_rtl_12|segment[0][3] .write_enable_clear = "none";
defparam \mem_rtl_12|segment[0][3] .write_logic_clock = "clock0";
// synopsys translate_on

// atom is at EC9_J
flex10ke_ram_slice \mem_rtl_12|segment[0][0] (
        .datain(color_0),
        .clk0(fclk),
        .clk1(fclk),
        .ena0(vcc),
        .ena1(vcc),
        .clr0(gnd),
        .we(wr_stb),
        .re(vcc),
        .waddr({ptr_in_9,ptr_in_8,pages,ptr_in_7,ptr_in_6,ptr_in_5,ptr_in_4,ptr_in_3,ptr_in_2,ptr_in_1,ptr_in_0}),
        .raddr({ptr_out_9,ptr_out_8,\mem_rtl_12|segment[0][4]~0 ,ptr_out_7,ptr_out_6,ptr_out_5,ptr_out_4,ptr_out_3,ptr_out_2,ptr_out_1,ptr_out_0}),
        .devclrn(devclrn),
        .devpor(devpor),
        .modesel(16'b0011000100000101),
        .dataout(q_0));
// synopsys translate_off
defparam \mem_rtl_12|segment[0][0] .address_width = 11;
defparam \mem_rtl_12|segment[0][0] .bit_number = 0;
defparam \mem_rtl_12|segment[0][0] .data_in_clear = "none";
defparam \mem_rtl_12|segment[0][0] .data_in_clock = "clock0";
defparam \mem_rtl_12|segment[0][0] .data_out_clear = "none";
defparam \mem_rtl_12|segment[0][0] .data_out_clock = "clock1";
defparam \mem_rtl_12|segment[0][0] .first_address = 0;
defparam \mem_rtl_12|segment[0][0] .init_file = "none";
defparam \mem_rtl_12|segment[0][0] .last_address = 1535;
defparam \mem_rtl_12|segment[0][0] .logical_ram_depth = 1536;
defparam \mem_rtl_12|segment[0][0] .logical_ram_name = "videoout:vidia|vga_double:vga_double|mem1536:line_buf|altdpram:mem_rtl_12|content";
defparam \mem_rtl_12|segment[0][0] .logical_ram_width = 6;
defparam \mem_rtl_12|segment[0][0] .operation_mode = "dual_port";
defparam \mem_rtl_12|segment[0][0] .read_address_clear = "none";
defparam \mem_rtl_12|segment[0][0] .read_address_clock = "none";
defparam \mem_rtl_12|segment[0][0] .read_enable_clear = "none";
defparam \mem_rtl_12|segment[0][0] .read_enable_clock = "none";
defparam \mem_rtl_12|segment[0][0] .write_address_clear = "none";
defparam \mem_rtl_12|segment[0][0] .write_enable_clear = "none";
defparam \mem_rtl_12|segment[0][0] .write_logic_clock = "clock0";
// synopsys translate_on

// atom is at EC9_C
flex10ke_ram_slice \mem_rtl_12|segment[0][1] (
        .datain(color_1),
        .clk0(fclk),
        .clk1(fclk),
        .ena0(vcc),
        .ena1(vcc),
        .clr0(gnd),
        .we(wr_stb),
        .re(vcc),
        .waddr({ptr_in_9,ptr_in_8,pages,ptr_in_7,ptr_in_6,ptr_in_5,ptr_in_4,ptr_in_3,ptr_in_2,ptr_in_1,ptr_in_0}),
        .raddr({ptr_out_9,ptr_out_8,\mem_rtl_12|segment[0][4]~0 ,ptr_out_7,ptr_out_6,ptr_out_5,ptr_out_4,ptr_out_3,ptr_out_2,ptr_out_1,ptr_out_0}),
        .devclrn(devclrn),
        .devpor(devpor),
        .modesel(16'b0011000100000101),
        .dataout(q_1));
// synopsys translate_off
defparam \mem_rtl_12|segment[0][1] .address_width = 11;
defparam \mem_rtl_12|segment[0][1] .bit_number = 1;
defparam \mem_rtl_12|segment[0][1] .data_in_clear = "none";
defparam \mem_rtl_12|segment[0][1] .data_in_clock = "clock0";
defparam \mem_rtl_12|segment[0][1] .data_out_clear = "none";
defparam \mem_rtl_12|segment[0][1] .data_out_clock = "clock1";
defparam \mem_rtl_12|segment[0][1] .first_address = 0;
defparam \mem_rtl_12|segment[0][1] .init_file = "none";
defparam \mem_rtl_12|segment[0][1] .last_address = 1535;
defparam \mem_rtl_12|segment[0][1] .logical_ram_depth = 1536;
defparam \mem_rtl_12|segment[0][1] .logical_ram_name = "videoout:vidia|vga_double:vga_double|mem1536:line_buf|altdpram:mem_rtl_12|content";
defparam \mem_rtl_12|segment[0][1] .logical_ram_width = 6;
defparam \mem_rtl_12|segment[0][1] .operation_mode = "dual_port";
defparam \mem_rtl_12|segment[0][1] .read_address_clear = "none";
defparam \mem_rtl_12|segment[0][1] .read_address_clock = "none";
defparam \mem_rtl_12|segment[0][1] .read_enable_clear = "none";
defparam \mem_rtl_12|segment[0][1] .read_enable_clock = "none";
defparam \mem_rtl_12|segment[0][1] .write_address_clear = "none";
defparam \mem_rtl_12|segment[0][1] .write_enable_clear = "none";
defparam \mem_rtl_12|segment[0][1] .write_logic_clock = "clock0";
// synopsys translate_on

// atom is at LC1_C12
flex10ke_lcell \mem_rtl_12|segment[0][4]~0_I (
// Equation(s):
// \mem_rtl_12|segment[0][4]~0  = !pages

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(pages),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\mem_rtl_12|segment[0][4]~0 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \mem_rtl_12|segment[0][4]~0_I .clock_enable_mode = "false";
defparam \mem_rtl_12|segment[0][4]~0_I .lut_mask = "00ff";
defparam \mem_rtl_12|segment[0][4]~0_I .operation_mode = "normal";
defparam \mem_rtl_12|segment[0][4]~0_I .output_mode = "comb_only";
defparam \mem_rtl_12|segment[0][4]~0_I .packed_mode = "false";
// synopsys translate_on

endmodule

module zbus (
        porthit,
        iorq1_n,
        iorq2_n,
        iorq_n,
        iorqge1,
        devpor,
        devclrn,
        devoe);
input   porthit;
output  iorq1_n;
output  iorq2_n;
input   iorq_n;
input   iorqge1;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;



// atom is at LC6_D15
flex10ke_lcell \iorq1_n~I (
// Equation(s):
// iorq1_n = porthit # \iorq_n~dataout 

        .dataa(vcc),
        .datab(vcc),
        .datac(porthit),
        .datad(iorq_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(iorq1_n),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \iorq1_n~I .clock_enable_mode = "false";
defparam \iorq1_n~I .lut_mask = "fff0";
defparam \iorq1_n~I .operation_mode = "normal";
defparam \iorq1_n~I .output_mode = "comb_only";
defparam \iorq1_n~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D15
flex10ke_lcell \iorq2_n~I (
// Equation(s):
// iorq2_n = porthit # \iorq_n~dataout  # \iorqge1~dataout 

        .dataa(vcc),
        .datab(porthit),
        .datac(iorq_n),
        .datad(iorqge1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(iorq2_n),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \iorq2_n~I .clock_enable_mode = "false";
defparam \iorq2_n~I .lut_mask = "fffc";
defparam \iorq2_n~I .operation_mode = "normal";
defparam \iorq2_n~I .output_mode = "comb_only";
defparam \iorq2_n~I .packed_mode = "false";
// synopsys translate_on

endmodule

module zclock (
        zclk_out,
        zneg,
        zpos,
        cbeg,
        pre_cend,
        WideOr0,
        peff7_int_4,
        fclk,
        rfsh_n,
        devpor,
        devclrn,
        devoe);
output  zclk_out;
output  zneg;
output  zpos;
input   cbeg;
input   pre_cend;
input   WideOr0;
input   peff7_int_4;
input   fclk;
input   rfsh_n;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire old_rfsh_n;
wire \int_turbo[0]~25 ;
wire precend_cnt;
wire \zneg~51 ;
wire [1:0] int_turbo;


// atom is at LC7_A1
flex10ke_lcell \old_rfsh_n~I (
// Equation(s):
// old_rfsh_n = DFFEA(\rfsh_n~dataout , GLOBAL(\fclk~dataout ), , , zpos, , )

        .dataa(zpos),
        .datab(vcc),
        .datac(vcc),
        .datad(rfsh_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(old_rfsh_n),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \old_rfsh_n~I .clock_enable_mode = "true";
defparam \old_rfsh_n~I .lut_mask = "ff00";
defparam \old_rfsh_n~I .operation_mode = "normal";
defparam \old_rfsh_n~I .output_mode = "reg_only";
defparam \old_rfsh_n~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_A1
flex10ke_lcell \int_turbo[0]~25_I (
// Equation(s):
// \int_turbo[0]~25  = !\rfsh_n~dataout  & old_rfsh_n & zpos

        .dataa(vcc),
        .datab(rfsh_n),
        .datac(old_rfsh_n),
        .datad(zpos),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\int_turbo[0]~25 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_turbo[0]~25_I .clock_enable_mode = "false";
defparam \int_turbo[0]~25_I .lut_mask = "3000";
defparam \int_turbo[0]~25_I .operation_mode = "normal";
defparam \int_turbo[0]~25_I .output_mode = "comb_only";
defparam \int_turbo[0]~25_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_C7
flex10ke_lcell \zclk_out~I (
// Equation(s):
// zclk_out = DFFEA(zneg # !zpos & zclk_out, !GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(zpos),
        .datac(zclk_out),
        .datad(zneg),
        .aclr(gnd),
        .aload(gnd),
        .clk(!fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(zclk_out),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zclk_out~I .clock_enable_mode = "false";
defparam \zclk_out~I .lut_mask = "ff30";
defparam \zclk_out~I .operation_mode = "normal";
defparam \zclk_out~I .output_mode = "reg_only";
defparam \zclk_out~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A2
flex10ke_lcell \zneg~I (
// Equation(s):
// zneg = DFFEA(!WideOr0 & \zneg~51 , GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(WideOr0),
        .datad(\zneg~51 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(zneg),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zneg~I .clock_enable_mode = "false";
defparam \zneg~I .lut_mask = "0f00";
defparam \zneg~I .operation_mode = "normal";
defparam \zneg~I .output_mode = "reg_only";
defparam \zneg~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A1
flex10ke_lcell \zpos~I (
// Equation(s):
// zpos = DFFEA(!WideOr0 & pre_cend & (int_turbo[0] # !precend_cnt), GLOBAL(\fclk~dataout ), , , , , )

        .dataa(WideOr0),
        .datab(precend_cnt),
        .datac(int_turbo[0]),
        .datad(pre_cend),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(zpos),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zpos~I .clock_enable_mode = "false";
defparam \zpos~I .lut_mask = "5100";
defparam \zpos~I .operation_mode = "normal";
defparam \zpos~I .output_mode = "reg_only";
defparam \zpos~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A1
flex10ke_lcell \int_turbo[0]~I (
// Equation(s):
// int_turbo[0] = DFFEA(!peff7_int_4, GLOBAL(\fclk~dataout ), , , \int_turbo[0]~25 , , )

        .dataa(\int_turbo[0]~25 ),
        .datab(vcc),
        .datac(vcc),
        .datad(peff7_int_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_turbo[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_turbo[0]~I .clock_enable_mode = "true";
defparam \int_turbo[0]~I .lut_mask = "00ff";
defparam \int_turbo[0]~I .operation_mode = "normal";
defparam \int_turbo[0]~I .output_mode = "reg_only";
defparam \int_turbo[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A1
flex10ke_lcell \precend_cnt~I (
// Equation(s):
// precend_cnt = DFFEA(!precend_cnt, GLOBAL(\fclk~dataout ), , , pre_cend, , )

        .dataa(pre_cend),
        .datab(vcc),
        .datac(vcc),
        .datad(precend_cnt),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(precend_cnt),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \precend_cnt~I .clock_enable_mode = "true";
defparam \precend_cnt~I .lut_mask = "00ff";
defparam \precend_cnt~I .operation_mode = "normal";
defparam \precend_cnt~I .output_mode = "reg_only";
defparam \precend_cnt~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_A1
flex10ke_lcell \zneg~51_I (
// Equation(s):
// \zneg~51  = int_turbo[0] & (cbeg) # !int_turbo[0] & precend_cnt & pre_cend

        .dataa(int_turbo[0]),
        .datab(precend_cnt),
        .datac(pre_cend),
        .datad(cbeg),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\zneg~51 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zneg~51_I .clock_enable_mode = "false";
defparam \zneg~51_I .lut_mask = "ea40";
defparam \zneg~51_I .operation_mode = "normal";
defparam \zneg~51_I .output_mode = "comb_only";
defparam \zneg~51_I .packed_mode = "false";
// synopsys translate_on

endmodule

module zdos (
        rst_out_n,
        dos,
        always0,
        always01,
        WideOr0,
        atm_cpm_n,
        dos_turn_off,
        ramnrom_0,
        ramnrom_01,
        dos_turn_off1,
        dos_turn_off2,
        fclk,
        devpor,
        devclrn,
        devoe);
input   rst_out_n;
output  dos;
input   always0;
input   always01;
input   WideOr0;
input   atm_cpm_n;
input   dos_turn_off;
input   ramnrom_0;
input   ramnrom_01;
input   dos_turn_off1;
input   dos_turn_off2;
input   fclk;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \dos~86 ;
wire \dos~92 ;
wire \dos~88 ;


// atom is at LC1_A7
flex10ke_lcell \dos~I (
// Equation(s):
// dos = DFFEA(atm_cpm_n & (\WideOr0~82  & dos # !\dos~88 ), GLOBAL(\fclk~dataout ), rst_out_n, , , , )

        .dataa(atm_cpm_n),
        .datab(WideOr0),
        .datac(dos),
        .datad(\dos~88 ),
        .aclr(!rst_out_n),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(dos),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos~I .clock_enable_mode = "false";
defparam \dos~I .lut_mask = "80aa";
defparam \dos~I .operation_mode = "normal";
defparam \dos~I .output_mode = "reg_only";
defparam \dos~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A7
flex10ke_lcell \dos~86_I (
// Equation(s):
// \dos~92  = !dos_turn_off & (!always0 # !ramnrom_0) # !dos_turn_off

        .dataa(dos_turn_off),
        .datab(dos_turn_off1),
        .datac(ramnrom_0),
        .datad(always01),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dos~86 ),
        .regout(),
        .cout(),
        .cascout(\dos~92 ));
// synopsys translate_off
defparam \dos~86_I .clock_enable_mode = "false";
defparam \dos~86_I .lut_mask = "5777";
defparam \dos~86_I .operation_mode = "normal";
defparam \dos~86_I .output_mode = "none";
defparam \dos~86_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A7
flex10ke_lcell \dos~88_I (
// Equation(s):
// \dos~88  = (!dos_turn_off1 & (!always0 # !ramnrom_0) # !dos_turn_off) & CASCADE(\dos~92 )

        .dataa(dos_turn_off),
        .datab(dos_turn_off2),
        .datac(ramnrom_01),
        .datad(always0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\dos~92 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dos~88 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dos~88_I .clock_enable_mode = "false";
defparam \dos~88_I .lut_mask = "5777";
defparam \dos~88_I .operation_mode = "normal";
defparam \dos~88_I .output_mode = "comb_only";
defparam \dos~88_I .packed_mode = "false";
// synopsys translate_on

endmodule

module zint (
        int_n,
        m1_n,
        int_start,
        fclk,
        zclk,
        devpor,
        devclrn,
        devoe);
output  int_n;
input   m1_n;
input   int_start;
input   fclk;
input   zclk;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire ibeg;
wire ibg1;
wire ibg2;
wire ibg3;
wire \always3~0 ;
wire \intctr_rtl_2|wysi_counter|counter_cell[0]~COUT ;
wire \intctr_rtl_2|wysi_counter|counter_cell[1]~COUT ;
wire \intctr_rtl_2|wysi_counter|counter_cell[2]~COUT ;
wire \intctr_rtl_2|wysi_counter|counter_cell[3]~COUT ;
wire \intctr_rtl_2|wysi_counter|counter_cell[4]~COUT ;
wire [6:0] \intctr_rtl_2|wysi_counter|q ;


// atom is at LC1_E16
flex10ke_lcell \int_n~I (
// Equation(s):
// int_n = DFFEA(\always3~0  & (\intctr_rtl_2|wysi_counter|q [5] # int_n # \m1_n~9 ), GLOBAL(\clkz_in~dataout ), , , , , )

        .dataa(\always3~0 ),
        .datab(\intctr_rtl_2|wysi_counter|q [5]),
        .datac(int_n),
        .datad(m1_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(int_n),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \int_n~I .clock_enable_mode = "false";
defparam \int_n~I .lut_mask = "aaa8";
defparam \int_n~I .operation_mode = "normal";
defparam \int_n~I .output_mode = "reg_only";
defparam \int_n~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I4
flex10ke_lcell \ibeg~I (
// Equation(s):
// ibeg = DFFEA(!ibeg, GLOBAL(\fclk~dataout ), , , int_start, , )

        .dataa(int_start),
        .datab(vcc),
        .datac(vcc),
        .datad(ibeg),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ibeg),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ibeg~I .clock_enable_mode = "true";
defparam \ibeg~I .lut_mask = "00ff";
defparam \ibeg~I .operation_mode = "normal";
defparam \ibeg~I .output_mode = "reg_only";
defparam \ibeg~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I4
flex10ke_lcell \ibg1~I (
// Equation(s):
// ibg1 = DFFEA(ibeg, GLOBAL(\clkz_in~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(ibeg),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ibg1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ibg1~I .clock_enable_mode = "false";
defparam \ibg1~I .lut_mask = "ff00";
defparam \ibg1~I .operation_mode = "normal";
defparam \ibg1~I .output_mode = "reg_only";
defparam \ibg1~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I4
flex10ke_lcell \ibg2~I (
// Equation(s):
// ibg2 = DFFEA(ibg1, GLOBAL(\clkz_in~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(ibg1),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ibg2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ibg2~I .clock_enable_mode = "false";
defparam \ibg2~I .lut_mask = "ff00";
defparam \ibg2~I .operation_mode = "normal";
defparam \ibg2~I .output_mode = "reg_only";
defparam \ibg2~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I4
flex10ke_lcell \ibg3~I (
// Equation(s):
// ibg3 = DFFEA(ibg2, GLOBAL(\clkz_in~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(ibg2),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ibg3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ibg3~I .clock_enable_mode = "false";
defparam \ibg3~I .lut_mask = "ff00";
defparam \ibg3~I .operation_mode = "normal";
defparam \ibg3~I .output_mode = "reg_only";
defparam \ibg3~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I4
flex10ke_lcell \always3~0_I (
// Equation(s):
// \always3~0  = ibg3 $ !ibg2

        .dataa(vcc),
        .datab(vcc),
        .datac(ibg3),
        .datad(ibg2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always3~0 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always3~0_I .clock_enable_mode = "false";
defparam \always3~0_I .lut_mask = "f00f";
defparam \always3~0_I .operation_mode = "normal";
defparam \always3~0_I .output_mode = "comb_only";
defparam \always3~0_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_E16
flex10ke_lcell \intctr_rtl_2|wysi_counter|counter_cell[0] (
// Equation(s):
// \intctr_rtl_2|wysi_counter|counter_cell[0]~COUT  = CARRY()

        .dataa(\intctr_rtl_2|wysi_counter|q [5]),
        .datab(\always3~0 ),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\intctr_rtl_2|wysi_counter|q [0]),
        .cout(\intctr_rtl_2|wysi_counter|counter_cell[0]~COUT ),
        .cascout());
// synopsys translate_off
defparam \intctr_rtl_2|wysi_counter|counter_cell[0] .clock_enable_mode = "false";
defparam \intctr_rtl_2|wysi_counter|counter_cell[0] .lut_mask = "99aa";
defparam \intctr_rtl_2|wysi_counter|counter_cell[0] .operation_mode = "clrb_cntr";
defparam \intctr_rtl_2|wysi_counter|counter_cell[0] .output_mode = "none";
defparam \intctr_rtl_2|wysi_counter|counter_cell[0] .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_E16
flex10ke_lcell \intctr_rtl_2|wysi_counter|counter_cell[1] (
// Equation(s):
// \intctr_rtl_2|wysi_counter|counter_cell[1]~COUT  = CARRY( & (\intctr_rtl_2|wysi_counter|counter_cell[0]~COUT ))

        .dataa(\intctr_rtl_2|wysi_counter|q [5]),
        .datab(\always3~0 ),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(\intctr_rtl_2|wysi_counter|counter_cell[0]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\intctr_rtl_2|wysi_counter|q [1]),
        .cout(\intctr_rtl_2|wysi_counter|counter_cell[1]~COUT ),
        .cascout());
// synopsys translate_off
defparam \intctr_rtl_2|wysi_counter|counter_cell[1] .cin_used = "true";
defparam \intctr_rtl_2|wysi_counter|counter_cell[1] .clock_enable_mode = "false";
defparam \intctr_rtl_2|wysi_counter|counter_cell[1] .lut_mask = "9ca0";
defparam \intctr_rtl_2|wysi_counter|counter_cell[1] .operation_mode = "clrb_cntr";
defparam \intctr_rtl_2|wysi_counter|counter_cell[1] .output_mode = "none";
defparam \intctr_rtl_2|wysi_counter|counter_cell[1] .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_E16
flex10ke_lcell \intctr_rtl_2|wysi_counter|counter_cell[2] (
// Equation(s):
// \intctr_rtl_2|wysi_counter|counter_cell[2]~COUT  = CARRY( & (\intctr_rtl_2|wysi_counter|counter_cell[1]~COUT ))

        .dataa(\intctr_rtl_2|wysi_counter|q [5]),
        .datab(\always3~0 ),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(\intctr_rtl_2|wysi_counter|counter_cell[1]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\intctr_rtl_2|wysi_counter|q [2]),
        .cout(\intctr_rtl_2|wysi_counter|counter_cell[2]~COUT ),
        .cascout());
// synopsys translate_off
defparam \intctr_rtl_2|wysi_counter|counter_cell[2] .cin_used = "true";
defparam \intctr_rtl_2|wysi_counter|counter_cell[2] .clock_enable_mode = "false";
defparam \intctr_rtl_2|wysi_counter|counter_cell[2] .lut_mask = "9ca0";
defparam \intctr_rtl_2|wysi_counter|counter_cell[2] .operation_mode = "clrb_cntr";
defparam \intctr_rtl_2|wysi_counter|counter_cell[2] .output_mode = "none";
defparam \intctr_rtl_2|wysi_counter|counter_cell[2] .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_E16
flex10ke_lcell \intctr_rtl_2|wysi_counter|counter_cell[3] (
// Equation(s):
// \intctr_rtl_2|wysi_counter|counter_cell[3]~COUT  = CARRY( & (\intctr_rtl_2|wysi_counter|counter_cell[2]~COUT ))

        .dataa(\intctr_rtl_2|wysi_counter|q [5]),
        .datab(\always3~0 ),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(\intctr_rtl_2|wysi_counter|counter_cell[2]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\intctr_rtl_2|wysi_counter|q [3]),
        .cout(\intctr_rtl_2|wysi_counter|counter_cell[3]~COUT ),
        .cascout());
// synopsys translate_off
defparam \intctr_rtl_2|wysi_counter|counter_cell[3] .cin_used = "true";
defparam \intctr_rtl_2|wysi_counter|counter_cell[3] .clock_enable_mode = "false";
defparam \intctr_rtl_2|wysi_counter|counter_cell[3] .lut_mask = "9ca0";
defparam \intctr_rtl_2|wysi_counter|counter_cell[3] .operation_mode = "clrb_cntr";
defparam \intctr_rtl_2|wysi_counter|counter_cell[3] .output_mode = "none";
defparam \intctr_rtl_2|wysi_counter|counter_cell[3] .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_E16
flex10ke_lcell \intctr_rtl_2|wysi_counter|counter_cell[4] (
// Equation(s):
// \intctr_rtl_2|wysi_counter|counter_cell[4]~COUT  = CARRY( & (\intctr_rtl_2|wysi_counter|counter_cell[3]~COUT ))

        .dataa(\intctr_rtl_2|wysi_counter|q [5]),
        .datab(\always3~0 ),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(\intctr_rtl_2|wysi_counter|counter_cell[3]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\intctr_rtl_2|wysi_counter|q [4]),
        .cout(\intctr_rtl_2|wysi_counter|counter_cell[4]~COUT ),
        .cascout());
// synopsys translate_off
defparam \intctr_rtl_2|wysi_counter|counter_cell[4] .cin_used = "true";
defparam \intctr_rtl_2|wysi_counter|counter_cell[4] .clock_enable_mode = "false";
defparam \intctr_rtl_2|wysi_counter|counter_cell[4] .lut_mask = "9ca0";
defparam \intctr_rtl_2|wysi_counter|counter_cell[4] .operation_mode = "clrb_cntr";
defparam \intctr_rtl_2|wysi_counter|counter_cell[4] .output_mode = "none";
defparam \intctr_rtl_2|wysi_counter|counter_cell[4] .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_E16
flex10ke_lcell \intctr_rtl_2|wysi_counter|counter_cell[5] (
// Equation(s):
// \intctr_rtl_2|wysi_counter|q [5] = DFFEA((\intctr_rtl_2|wysi_counter|q [5] $ (!\intctr_rtl_2|wysi_counter|q [5] & \intctr_rtl_2|wysi_counter|counter_cell[4]~COUT )) & \always3~0 , GLOBAL(\clkz_in~dataout ), , , , , )

        .dataa(\intctr_rtl_2|wysi_counter|q [5]),
        .datab(\always3~0 ),
        .datac(vcc),
        .datad(vcc),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(\intctr_rtl_2|wysi_counter|counter_cell[4]~COUT ),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(\intctr_rtl_2|wysi_counter|q [5]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \intctr_rtl_2|wysi_counter|counter_cell[5] .cin_used = "true";
defparam \intctr_rtl_2|wysi_counter|counter_cell[5] .clock_enable_mode = "false";
defparam \intctr_rtl_2|wysi_counter|counter_cell[5] .lut_mask = "9c9c";
defparam \intctr_rtl_2|wysi_counter|counter_cell[5] .operation_mode = "clrb_cntr";
defparam \intctr_rtl_2|wysi_counter|counter_cell[5] .output_mode = "reg_only";
defparam \intctr_rtl_2|wysi_counter|counter_cell[5] .packed_mode = "false";
// synopsys translate_on

endmodule

module zkbdmus (
        musy_5,
        musx_5,
        musbtn_5,
        musy_6,
        musx_6,
        musbtn_6,
        musy_7,
        musx_7,
        musbtn_7,
        mouse_buf_5,
        mus_ystb,
        mus_xstb,
        mus_btnstb,
        mouse_buf_6,
        mouse_buf_7,
        musy_0,
        musx_0,
        musbtn_0,
        kj_data_0,
        musy_1,
        musx_1,
        musbtn_1,
        kj_data_1,
        musy_2,
        musx_2,
        musbtn_2,
        kj_data_2,
        musy_3,
        musx_3,
        musbtn_3,
        kj_data_3,
        musy_4,
        musx_4,
        musbtn_4,
        kj_data_4,
        mouse_buf_0,
        kj_stb,
        mouse_buf_1,
        mouse_buf_2,
        mouse_buf_3,
        mouse_buf_4,
        kbd_34,
        kbd_39,
        kbd_33,
        kbd_38,
        kbd_37,
        kbd_32,
        kbd_35,
        kbd_36,
        kbd_26,
        kbd_31,
        kbd_25,
        kbd_30,
        kbd_29,
        kbd_24,
        kbd_27,
        kbd_28,
        kbd_18,
        kbd_23,
        kbd_17,
        kbd_22,
        kbd_21,
        kbd_16,
        kbd_19,
        kbd_20,
        kbd_10,
        kbd_15,
        kbd_9,
        kbd_14,
        kbd_13,
        kbd_8,
        kbd_11,
        kbd_12,
        kbd_2,
        kbd_7,
        kbd_1,
        kbd_6,
        kbd_5,
        kbd_0,
        kbd_3,
        kbd_4,
        kbd_reg_34,
        kbd_stb,
        kbd_reg_39,
        kbd_reg_33,
        kbd_reg_38,
        kbd_reg_37,
        kbd_reg_32,
        kbd_reg_35,
        kbd_reg_36,
        kbd_reg_26,
        kbd_reg_31,
        kbd_reg_25,
        kbd_reg_30,
        kbd_reg_29,
        kbd_reg_24,
        kbd_reg_27,
        kbd_reg_28,
        kbd_reg_18,
        kbd_reg_23,
        kbd_reg_17,
        kbd_reg_22,
        kbd_reg_21,
        kbd_reg_16,
        kbd_reg_19,
        kbd_reg_20,
        kbd_reg_10,
        kbd_reg_15,
        kbd_reg_9,
        kbd_reg_14,
        kbd_reg_13,
        kbd_reg_8,
        kbd_reg_11,
        kbd_reg_12,
        kbd_reg_2,
        kbd_reg_7,
        kbd_reg_1,
        kbd_reg_6,
        kbd_reg_5,
        kbd_reg_0,
        kbd_reg_3,
        kbd_reg_4,
        fclk,
        devpor,
        devclrn,
        devoe);
output  musy_5;
output  musx_5;
output  musbtn_5;
output  musy_6;
output  musx_6;
output  musbtn_6;
output  musy_7;
output  musx_7;
output  musbtn_7;
input   mouse_buf_5;
input   mus_ystb;
input   mus_xstb;
input   mus_btnstb;
input   mouse_buf_6;
input   mouse_buf_7;
output  musy_0;
output  musx_0;
output  musbtn_0;
output  kj_data_0;
output  musy_1;
output  musx_1;
output  musbtn_1;
output  kj_data_1;
output  musy_2;
output  musx_2;
output  musbtn_2;
output  kj_data_2;
output  musy_3;
output  musx_3;
output  musbtn_3;
output  kj_data_3;
output  musy_4;
output  musx_4;
output  musbtn_4;
output  kj_data_4;
input   mouse_buf_0;
input   kj_stb;
input   mouse_buf_1;
input   mouse_buf_2;
input   mouse_buf_3;
input   mouse_buf_4;
output  kbd_34;
output  kbd_39;
output  kbd_33;
output  kbd_38;
output  kbd_37;
output  kbd_32;
output  kbd_35;
output  kbd_36;
output  kbd_26;
output  kbd_31;
output  kbd_25;
output  kbd_30;
output  kbd_29;
output  kbd_24;
output  kbd_27;
output  kbd_28;
output  kbd_18;
output  kbd_23;
output  kbd_17;
output  kbd_22;
output  kbd_21;
output  kbd_16;
output  kbd_19;
output  kbd_20;
output  kbd_10;
output  kbd_15;
output  kbd_9;
output  kbd_14;
output  kbd_13;
output  kbd_8;
output  kbd_11;
output  kbd_12;
output  kbd_2;
output  kbd_7;
output  kbd_1;
output  kbd_6;
output  kbd_5;
output  kbd_0;
output  kbd_3;
output  kbd_4;
input   kbd_reg_34;
input   kbd_stb;
input   kbd_reg_39;
input   kbd_reg_33;
input   kbd_reg_38;
input   kbd_reg_37;
input   kbd_reg_32;
input   kbd_reg_35;
input   kbd_reg_36;
input   kbd_reg_26;
input   kbd_reg_31;
input   kbd_reg_25;
input   kbd_reg_30;
input   kbd_reg_29;
input   kbd_reg_24;
input   kbd_reg_27;
input   kbd_reg_28;
input   kbd_reg_18;
input   kbd_reg_23;
input   kbd_reg_17;
input   kbd_reg_22;
input   kbd_reg_21;
input   kbd_reg_16;
input   kbd_reg_19;
input   kbd_reg_20;
input   kbd_reg_10;
input   kbd_reg_15;
input   kbd_reg_9;
input   kbd_reg_14;
input   kbd_reg_13;
input   kbd_reg_8;
input   kbd_reg_11;
input   kbd_reg_12;
input   kbd_reg_2;
input   kbd_reg_7;
input   kbd_reg_1;
input   kbd_reg_6;
input   kbd_reg_5;
input   kbd_reg_0;
input   kbd_reg_3;
input   kbd_reg_4;
input   fclk;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;



// atom is at LC1_E26
flex10ke_lcell \musy[5]~I (
// Equation(s):
// musy_5 = DFFEA(mouse_buf_5, GLOBAL(\fclk~dataout ), , , mus_ystb, , )

        .dataa(mus_ystb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musy_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musy[5]~I .clock_enable_mode = "true";
defparam \musy[5]~I .lut_mask = "ff00";
defparam \musy[5]~I .operation_mode = "normal";
defparam \musy[5]~I .output_mode = "reg_only";
defparam \musy[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_E26
flex10ke_lcell \musx[5]~I (
// Equation(s):
// musx_5 = DFFEA(mouse_buf_5, GLOBAL(\fclk~dataout ), , , mus_xstb, , )

        .dataa(mus_xstb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musx_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musx[5]~I .clock_enable_mode = "true";
defparam \musx[5]~I .lut_mask = "ff00";
defparam \musx[5]~I .operation_mode = "normal";
defparam \musx[5]~I .output_mode = "reg_only";
defparam \musx[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_E26
flex10ke_lcell \musbtn[5]~I (
// Equation(s):
// musbtn_5 = DFFEA(mouse_buf_5, GLOBAL(\fclk~dataout ), , , mus_btnstb, , )

        .dataa(mus_btnstb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musbtn_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musbtn[5]~I .clock_enable_mode = "true";
defparam \musbtn[5]~I .lut_mask = "ff00";
defparam \musbtn[5]~I .operation_mode = "normal";
defparam \musbtn[5]~I .output_mode = "reg_only";
defparam \musbtn[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_E31
flex10ke_lcell \musy[6]~I (
// Equation(s):
// musy_6 = DFFEA(mouse_buf_6, GLOBAL(\fclk~dataout ), , , mus_ystb, , )

        .dataa(mus_ystb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musy_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musy[6]~I .clock_enable_mode = "true";
defparam \musy[6]~I .lut_mask = "ff00";
defparam \musy[6]~I .operation_mode = "normal";
defparam \musy[6]~I .output_mode = "reg_only";
defparam \musy[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_E31
flex10ke_lcell \musx[6]~I (
// Equation(s):
// musx_6 = DFFEA(mouse_buf_6, GLOBAL(\fclk~dataout ), , , mus_xstb, , )

        .dataa(mus_xstb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musx_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musx[6]~I .clock_enable_mode = "true";
defparam \musx[6]~I .lut_mask = "ff00";
defparam \musx[6]~I .operation_mode = "normal";
defparam \musx[6]~I .output_mode = "reg_only";
defparam \musx[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_E31
flex10ke_lcell \musbtn[6]~I (
// Equation(s):
// musbtn_6 = DFFEA(mouse_buf_6, GLOBAL(\fclk~dataout ), , , mus_btnstb, , )

        .dataa(mus_btnstb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musbtn_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musbtn[6]~I .clock_enable_mode = "true";
defparam \musbtn[6]~I .lut_mask = "ff00";
defparam \musbtn[6]~I .operation_mode = "normal";
defparam \musbtn[6]~I .output_mode = "reg_only";
defparam \musbtn[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_E19
flex10ke_lcell \musy[7]~I (
// Equation(s):
// musy_7 = DFFEA(mouse_buf_7, GLOBAL(\fclk~dataout ), , , mus_ystb, , )

        .dataa(mus_ystb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musy_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musy[7]~I .clock_enable_mode = "true";
defparam \musy[7]~I .lut_mask = "ff00";
defparam \musy[7]~I .operation_mode = "normal";
defparam \musy[7]~I .output_mode = "reg_only";
defparam \musy[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_E19
flex10ke_lcell \musx[7]~I (
// Equation(s):
// musx_7 = DFFEA(mouse_buf_7, GLOBAL(\fclk~dataout ), , , mus_xstb, , )

        .dataa(mus_xstb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musx_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musx[7]~I .clock_enable_mode = "true";
defparam \musx[7]~I .lut_mask = "ff00";
defparam \musx[7]~I .operation_mode = "normal";
defparam \musx[7]~I .output_mode = "reg_only";
defparam \musx[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_E19
flex10ke_lcell \musbtn[7]~I (
// Equation(s):
// musbtn_7 = DFFEA(mouse_buf_7, GLOBAL(\fclk~dataout ), , , mus_btnstb, , )

        .dataa(mus_btnstb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musbtn_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musbtn[7]~I .clock_enable_mode = "true";
defparam \musbtn[7]~I .lut_mask = "ff00";
defparam \musbtn[7]~I .operation_mode = "normal";
defparam \musbtn[7]~I .output_mode = "reg_only";
defparam \musbtn[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_E35
flex10ke_lcell \musy[0]~I (
// Equation(s):
// musy_0 = DFFEA(mouse_buf_0, GLOBAL(\fclk~dataout ), , , mus_ystb, , )

        .dataa(mus_ystb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musy_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musy[0]~I .clock_enable_mode = "true";
defparam \musy[0]~I .lut_mask = "ff00";
defparam \musy[0]~I .operation_mode = "normal";
defparam \musy[0]~I .output_mode = "reg_only";
defparam \musy[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_E35
flex10ke_lcell \musx[0]~I (
// Equation(s):
// musx_0 = DFFEA(mouse_buf_0, GLOBAL(\fclk~dataout ), , , mus_xstb, , )

        .dataa(mus_xstb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musx_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musx[0]~I .clock_enable_mode = "true";
defparam \musx[0]~I .lut_mask = "ff00";
defparam \musx[0]~I .operation_mode = "normal";
defparam \musx[0]~I .output_mode = "reg_only";
defparam \musx[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_E35
flex10ke_lcell \musbtn[0]~I (
// Equation(s):
// musbtn_0 = DFFEA(mouse_buf_0, GLOBAL(\fclk~dataout ), , , mus_btnstb, , )

        .dataa(mus_btnstb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musbtn_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musbtn[0]~I .clock_enable_mode = "true";
defparam \musbtn[0]~I .lut_mask = "ff00";
defparam \musbtn[0]~I .operation_mode = "normal";
defparam \musbtn[0]~I .output_mode = "reg_only";
defparam \musbtn[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_E35
flex10ke_lcell \kj_data[0]~I (
// Equation(s):
// kj_data_0 = DFFEA(mouse_buf_0, GLOBAL(\fclk~dataout ), , , kj_stb, , )

        .dataa(kj_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kj_data_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kj_data[0]~I .clock_enable_mode = "true";
defparam \kj_data[0]~I .lut_mask = "ff00";
defparam \kj_data[0]~I .operation_mode = "normal";
defparam \kj_data[0]~I .output_mode = "reg_only";
defparam \kj_data[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_E31
flex10ke_lcell \musy[1]~I (
// Equation(s):
// musy_1 = DFFEA(mouse_buf_1, GLOBAL(\fclk~dataout ), , , mus_ystb, , )

        .dataa(mus_ystb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musy_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musy[1]~I .clock_enable_mode = "true";
defparam \musy[1]~I .lut_mask = "ff00";
defparam \musy[1]~I .operation_mode = "normal";
defparam \musy[1]~I .output_mode = "reg_only";
defparam \musy[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_E31
flex10ke_lcell \musx[1]~I (
// Equation(s):
// musx_1 = DFFEA(mouse_buf_1, GLOBAL(\fclk~dataout ), , , mus_xstb, , )

        .dataa(mus_xstb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musx_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musx[1]~I .clock_enable_mode = "true";
defparam \musx[1]~I .lut_mask = "ff00";
defparam \musx[1]~I .operation_mode = "normal";
defparam \musx[1]~I .output_mode = "reg_only";
defparam \musx[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I32
flex10ke_lcell \musbtn[1]~I (
// Equation(s):
// musbtn_1 = DFFEA(mouse_buf_1, GLOBAL(\fclk~dataout ), , , mus_btnstb, , )

        .dataa(mus_btnstb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musbtn_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musbtn[1]~I .clock_enable_mode = "true";
defparam \musbtn[1]~I .lut_mask = "ff00";
defparam \musbtn[1]~I .operation_mode = "normal";
defparam \musbtn[1]~I .output_mode = "reg_only";
defparam \musbtn[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H33
flex10ke_lcell \kj_data[1]~I (
// Equation(s):
// kj_data_1 = DFFEA(mouse_buf_1, GLOBAL(\fclk~dataout ), , , kj_stb, , )

        .dataa(kj_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kj_data_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kj_data[1]~I .clock_enable_mode = "true";
defparam \kj_data[1]~I .lut_mask = "ff00";
defparam \kj_data[1]~I .operation_mode = "normal";
defparam \kj_data[1]~I .output_mode = "reg_only";
defparam \kj_data[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_E34
flex10ke_lcell \musy[2]~I (
// Equation(s):
// musy_2 = DFFEA(mouse_buf_2, GLOBAL(\fclk~dataout ), , , mus_ystb, , )

        .dataa(mus_ystb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musy_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musy[2]~I .clock_enable_mode = "true";
defparam \musy[2]~I .lut_mask = "ff00";
defparam \musy[2]~I .operation_mode = "normal";
defparam \musy[2]~I .output_mode = "reg_only";
defparam \musy[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_E34
flex10ke_lcell \musx[2]~I (
// Equation(s):
// musx_2 = DFFEA(mouse_buf_2, GLOBAL(\fclk~dataout ), , , mus_xstb, , )

        .dataa(mus_xstb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musx_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musx[2]~I .clock_enable_mode = "true";
defparam \musx[2]~I .lut_mask = "ff00";
defparam \musx[2]~I .operation_mode = "normal";
defparam \musx[2]~I .output_mode = "reg_only";
defparam \musx[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_E34
flex10ke_lcell \musbtn[2]~I (
// Equation(s):
// musbtn_2 = DFFEA(mouse_buf_2, GLOBAL(\fclk~dataout ), , , mus_btnstb, , )

        .dataa(mus_btnstb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musbtn_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musbtn[2]~I .clock_enable_mode = "true";
defparam \musbtn[2]~I .lut_mask = "ff00";
defparam \musbtn[2]~I .operation_mode = "normal";
defparam \musbtn[2]~I .output_mode = "reg_only";
defparam \musbtn[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_E34
flex10ke_lcell \kj_data[2]~I (
// Equation(s):
// kj_data_2 = DFFEA(mouse_buf_2, GLOBAL(\fclk~dataout ), , , kj_stb, , )

        .dataa(kj_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kj_data_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kj_data[2]~I .clock_enable_mode = "true";
defparam \kj_data[2]~I .lut_mask = "ff00";
defparam \kj_data[2]~I .operation_mode = "normal";
defparam \kj_data[2]~I .output_mode = "reg_only";
defparam \kj_data[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_E29
flex10ke_lcell \musy[3]~I (
// Equation(s):
// musy_3 = DFFEA(mouse_buf_3, GLOBAL(\fclk~dataout ), , , mus_ystb, , )

        .dataa(mus_ystb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musy_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musy[3]~I .clock_enable_mode = "true";
defparam \musy[3]~I .lut_mask = "ff00";
defparam \musy[3]~I .operation_mode = "normal";
defparam \musy[3]~I .output_mode = "reg_only";
defparam \musy[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_E29
flex10ke_lcell \musx[3]~I (
// Equation(s):
// musx_3 = DFFEA(mouse_buf_3, GLOBAL(\fclk~dataout ), , , mus_xstb, , )

        .dataa(mus_xstb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musx_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musx[3]~I .clock_enable_mode = "true";
defparam \musx[3]~I .lut_mask = "ff00";
defparam \musx[3]~I .operation_mode = "normal";
defparam \musx[3]~I .output_mode = "reg_only";
defparam \musx[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_E29
flex10ke_lcell \musbtn[3]~I (
// Equation(s):
// musbtn_3 = DFFEA(mouse_buf_3, GLOBAL(\fclk~dataout ), , , mus_btnstb, , )

        .dataa(mus_btnstb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musbtn_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musbtn[3]~I .clock_enable_mode = "true";
defparam \musbtn[3]~I .lut_mask = "ff00";
defparam \musbtn[3]~I .operation_mode = "normal";
defparam \musbtn[3]~I .output_mode = "reg_only";
defparam \musbtn[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_E29
flex10ke_lcell \kj_data[3]~I (
// Equation(s):
// kj_data_3 = DFFEA(mouse_buf_3, GLOBAL(\fclk~dataout ), , , kj_stb, , )

        .dataa(kj_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kj_data_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kj_data[3]~I .clock_enable_mode = "true";
defparam \kj_data[3]~I .lut_mask = "ff00";
defparam \kj_data[3]~I .operation_mode = "normal";
defparam \kj_data[3]~I .output_mode = "reg_only";
defparam \kj_data[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_E19
flex10ke_lcell \musy[4]~I (
// Equation(s):
// musy_4 = DFFEA(mouse_buf_4, GLOBAL(\fclk~dataout ), , , mus_ystb, , )

        .dataa(mus_ystb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musy_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musy[4]~I .clock_enable_mode = "true";
defparam \musy[4]~I .lut_mask = "ff00";
defparam \musy[4]~I .operation_mode = "normal";
defparam \musy[4]~I .output_mode = "reg_only";
defparam \musy[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_E19
flex10ke_lcell \musx[4]~I (
// Equation(s):
// musx_4 = DFFEA(mouse_buf_4, GLOBAL(\fclk~dataout ), , , mus_xstb, , )

        .dataa(mus_xstb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musx_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musx[4]~I .clock_enable_mode = "true";
defparam \musx[4]~I .lut_mask = "ff00";
defparam \musx[4]~I .operation_mode = "normal";
defparam \musx[4]~I .output_mode = "reg_only";
defparam \musx[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_E26
flex10ke_lcell \musbtn[4]~I (
// Equation(s):
// musbtn_4 = DFFEA(mouse_buf_4, GLOBAL(\fclk~dataout ), , , mus_btnstb, , )

        .dataa(mus_btnstb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(musbtn_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \musbtn[4]~I .clock_enable_mode = "true";
defparam \musbtn[4]~I .lut_mask = "ff00";
defparam \musbtn[4]~I .operation_mode = "normal";
defparam \musbtn[4]~I .output_mode = "reg_only";
defparam \musbtn[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A23
flex10ke_lcell \kj_data[4]~I (
// Equation(s):
// kj_data_4 = DFFEA(mouse_buf_4, GLOBAL(\fclk~dataout ), , , kj_stb, , )

        .dataa(kj_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(mouse_buf_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kj_data_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kj_data[4]~I .clock_enable_mode = "true";
defparam \kj_data[4]~I .lut_mask = "ff00";
defparam \kj_data[4]~I .operation_mode = "normal";
defparam \kj_data[4]~I .output_mode = "reg_only";
defparam \kj_data[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I25
flex10ke_lcell \kbd[34]~I (
// Equation(s):
// kbd_34 = DFFEA(kbd_reg_34, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_34),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_34),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[34]~I .clock_enable_mode = "true";
defparam \kbd[34]~I .lut_mask = "ff00";
defparam \kbd[34]~I .operation_mode = "normal";
defparam \kbd[34]~I .output_mode = "reg_only";
defparam \kbd[34]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I30
flex10ke_lcell \kbd[39]~I (
// Equation(s):
// kbd_39 = DFFEA(kbd_reg_39, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_39),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_39),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[39]~I .clock_enable_mode = "true";
defparam \kbd[39]~I .lut_mask = "ff00";
defparam \kbd[39]~I .operation_mode = "normal";
defparam \kbd[39]~I .output_mode = "reg_only";
defparam \kbd[39]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I30
flex10ke_lcell \kbd[33]~I (
// Equation(s):
// kbd_33 = DFFEA(kbd_reg_33, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_33),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_33),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[33]~I .clock_enable_mode = "true";
defparam \kbd[33]~I .lut_mask = "ff00";
defparam \kbd[33]~I .operation_mode = "normal";
defparam \kbd[33]~I .output_mode = "reg_only";
defparam \kbd[33]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I30
flex10ke_lcell \kbd[38]~I (
// Equation(s):
// kbd_38 = DFFEA(kbd_reg_38, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_38),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_38),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[38]~I .clock_enable_mode = "true";
defparam \kbd[38]~I .lut_mask = "ff00";
defparam \kbd[38]~I .operation_mode = "normal";
defparam \kbd[38]~I .output_mode = "reg_only";
defparam \kbd[38]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I32
flex10ke_lcell \kbd[37]~I (
// Equation(s):
// kbd_37 = DFFEA(kbd_reg_37, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_37),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_37),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[37]~I .clock_enable_mode = "true";
defparam \kbd[37]~I .lut_mask = "ff00";
defparam \kbd[37]~I .operation_mode = "normal";
defparam \kbd[37]~I .output_mode = "reg_only";
defparam \kbd[37]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I32
flex10ke_lcell \kbd[32]~I (
// Equation(s):
// kbd_32 = DFFEA(kbd_reg_32, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_32),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_32),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[32]~I .clock_enable_mode = "true";
defparam \kbd[32]~I .lut_mask = "ff00";
defparam \kbd[32]~I .operation_mode = "normal";
defparam \kbd[32]~I .output_mode = "reg_only";
defparam \kbd[32]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I25
flex10ke_lcell \kbd[35]~I (
// Equation(s):
// kbd_35 = DFFEA(kbd_reg_35, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_35),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_35),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[35]~I .clock_enable_mode = "true";
defparam \kbd[35]~I .lut_mask = "ff00";
defparam \kbd[35]~I .operation_mode = "normal";
defparam \kbd[35]~I .output_mode = "reg_only";
defparam \kbd[35]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I25
flex10ke_lcell \kbd[36]~I (
// Equation(s):
// kbd_36 = DFFEA(kbd_reg_36, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_36),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_36),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[36]~I .clock_enable_mode = "true";
defparam \kbd[36]~I .lut_mask = "ff00";
defparam \kbd[36]~I .operation_mode = "normal";
defparam \kbd[36]~I .output_mode = "reg_only";
defparam \kbd[36]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I34
flex10ke_lcell \kbd[26]~I (
// Equation(s):
// kbd_26 = DFFEA(kbd_reg_26, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_26),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_26),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[26]~I .clock_enable_mode = "true";
defparam \kbd[26]~I .lut_mask = "ff00";
defparam \kbd[26]~I .operation_mode = "normal";
defparam \kbd[26]~I .output_mode = "reg_only";
defparam \kbd[26]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I36
flex10ke_lcell \kbd[31]~I (
// Equation(s):
// kbd_31 = DFFEA(kbd_reg_31, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_31),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_31),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[31]~I .clock_enable_mode = "true";
defparam \kbd[31]~I .lut_mask = "ff00";
defparam \kbd[31]~I .operation_mode = "normal";
defparam \kbd[31]~I .output_mode = "reg_only";
defparam \kbd[31]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I34
flex10ke_lcell \kbd[25]~I (
// Equation(s):
// kbd_25 = DFFEA(kbd_reg_25, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_25),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_25),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[25]~I .clock_enable_mode = "true";
defparam \kbd[25]~I .lut_mask = "ff00";
defparam \kbd[25]~I .operation_mode = "normal";
defparam \kbd[25]~I .output_mode = "reg_only";
defparam \kbd[25]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I36
flex10ke_lcell \kbd[30]~I (
// Equation(s):
// kbd_30 = DFFEA(kbd_reg_30, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_30),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_30),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[30]~I .clock_enable_mode = "true";
defparam \kbd[30]~I .lut_mask = "ff00";
defparam \kbd[30]~I .operation_mode = "normal";
defparam \kbd[30]~I .output_mode = "reg_only";
defparam \kbd[30]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I35
flex10ke_lcell \kbd[29]~I (
// Equation(s):
// kbd_29 = DFFEA(kbd_reg_29, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_29),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_29),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[29]~I .clock_enable_mode = "true";
defparam \kbd[29]~I .lut_mask = "ff00";
defparam \kbd[29]~I .operation_mode = "normal";
defparam \kbd[29]~I .output_mode = "reg_only";
defparam \kbd[29]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B31
flex10ke_lcell \kbd[24]~I (
// Equation(s):
// kbd_24 = DFFEA(kbd_reg_24, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_24),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_24),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[24]~I .clock_enable_mode = "true";
defparam \kbd[24]~I .lut_mask = "ff00";
defparam \kbd[24]~I .operation_mode = "normal";
defparam \kbd[24]~I .output_mode = "reg_only";
defparam \kbd[24]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I35
flex10ke_lcell \kbd[27]~I (
// Equation(s):
// kbd_27 = DFFEA(kbd_reg_27, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_27),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_27),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[27]~I .clock_enable_mode = "true";
defparam \kbd[27]~I .lut_mask = "ff00";
defparam \kbd[27]~I .operation_mode = "normal";
defparam \kbd[27]~I .output_mode = "reg_only";
defparam \kbd[27]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I35
flex10ke_lcell \kbd[28]~I (
// Equation(s):
// kbd_28 = DFFEA(kbd_reg_28, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_28),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_28),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[28]~I .clock_enable_mode = "true";
defparam \kbd[28]~I .lut_mask = "ff00";
defparam \kbd[28]~I .operation_mode = "normal";
defparam \kbd[28]~I .output_mode = "reg_only";
defparam \kbd[28]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B22
flex10ke_lcell \kbd[18]~I (
// Equation(s):
// kbd_18 = DFFEA(kbd_reg_18, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_18),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_18),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[18]~I .clock_enable_mode = "true";
defparam \kbd[18]~I .lut_mask = "ff00";
defparam \kbd[18]~I .operation_mode = "normal";
defparam \kbd[18]~I .output_mode = "reg_only";
defparam \kbd[18]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B31
flex10ke_lcell \kbd[23]~I (
// Equation(s):
// kbd_23 = DFFEA(kbd_reg_23, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_23),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_23),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[23]~I .clock_enable_mode = "true";
defparam \kbd[23]~I .lut_mask = "ff00";
defparam \kbd[23]~I .operation_mode = "normal";
defparam \kbd[23]~I .output_mode = "reg_only";
defparam \kbd[23]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B22
flex10ke_lcell \kbd[17]~I (
// Equation(s):
// kbd_17 = DFFEA(kbd_reg_17, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_17),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_17),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[17]~I .clock_enable_mode = "true";
defparam \kbd[17]~I .lut_mask = "ff00";
defparam \kbd[17]~I .operation_mode = "normal";
defparam \kbd[17]~I .output_mode = "reg_only";
defparam \kbd[17]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B31
flex10ke_lcell \kbd[22]~I (
// Equation(s):
// kbd_22 = DFFEA(kbd_reg_22, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_22),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_22),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[22]~I .clock_enable_mode = "true";
defparam \kbd[22]~I .lut_mask = "ff00";
defparam \kbd[22]~I .operation_mode = "normal";
defparam \kbd[22]~I .output_mode = "reg_only";
defparam \kbd[22]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B31
flex10ke_lcell \kbd[21]~I (
// Equation(s):
// kbd_21 = DFFEA(kbd_reg_21, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_21),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_21),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[21]~I .clock_enable_mode = "true";
defparam \kbd[21]~I .lut_mask = "ff00";
defparam \kbd[21]~I .operation_mode = "normal";
defparam \kbd[21]~I .output_mode = "reg_only";
defparam \kbd[21]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B27
flex10ke_lcell \kbd[16]~I (
// Equation(s):
// kbd_16 = DFFEA(kbd_reg_16, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_16),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_16),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[16]~I .clock_enable_mode = "true";
defparam \kbd[16]~I .lut_mask = "ff00";
defparam \kbd[16]~I .operation_mode = "normal";
defparam \kbd[16]~I .output_mode = "reg_only";
defparam \kbd[16]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B27
flex10ke_lcell \kbd[19]~I (
// Equation(s):
// kbd_19 = DFFEA(kbd_reg_19, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_19),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_19),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[19]~I .clock_enable_mode = "true";
defparam \kbd[19]~I .lut_mask = "ff00";
defparam \kbd[19]~I .operation_mode = "normal";
defparam \kbd[19]~I .output_mode = "reg_only";
defparam \kbd[19]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B27
flex10ke_lcell \kbd[20]~I (
// Equation(s):
// kbd_20 = DFFEA(kbd_reg_20, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_20),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_20),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[20]~I .clock_enable_mode = "true";
defparam \kbd[20]~I .lut_mask = "ff00";
defparam \kbd[20]~I .operation_mode = "normal";
defparam \kbd[20]~I .output_mode = "reg_only";
defparam \kbd[20]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B24
flex10ke_lcell \kbd[10]~I (
// Equation(s):
// kbd_10 = DFFEA(kbd_reg_10, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_10),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_10),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[10]~I .clock_enable_mode = "true";
defparam \kbd[10]~I .lut_mask = "ff00";
defparam \kbd[10]~I .operation_mode = "normal";
defparam \kbd[10]~I .output_mode = "reg_only";
defparam \kbd[10]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B25
flex10ke_lcell \kbd[15]~I (
// Equation(s):
// kbd_15 = DFFEA(kbd_reg_15, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_15),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[15]~I .clock_enable_mode = "true";
defparam \kbd[15]~I .lut_mask = "ff00";
defparam \kbd[15]~I .operation_mode = "normal";
defparam \kbd[15]~I .output_mode = "reg_only";
defparam \kbd[15]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B24
flex10ke_lcell \kbd[9]~I (
// Equation(s):
// kbd_9 = DFFEA(kbd_reg_9, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_9),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_9),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[9]~I .clock_enable_mode = "true";
defparam \kbd[9]~I .lut_mask = "ff00";
defparam \kbd[9]~I .operation_mode = "normal";
defparam \kbd[9]~I .output_mode = "reg_only";
defparam \kbd[9]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B25
flex10ke_lcell \kbd[14]~I (
// Equation(s):
// kbd_14 = DFFEA(kbd_reg_14, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_14),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[14]~I .clock_enable_mode = "true";
defparam \kbd[14]~I .lut_mask = "ff00";
defparam \kbd[14]~I .operation_mode = "normal";
defparam \kbd[14]~I .output_mode = "reg_only";
defparam \kbd[14]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B29
flex10ke_lcell \kbd[13]~I (
// Equation(s):
// kbd_13 = DFFEA(kbd_reg_13, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_13),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_13),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[13]~I .clock_enable_mode = "true";
defparam \kbd[13]~I .lut_mask = "ff00";
defparam \kbd[13]~I .operation_mode = "normal";
defparam \kbd[13]~I .output_mode = "reg_only";
defparam \kbd[13]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B29
flex10ke_lcell \kbd[8]~I (
// Equation(s):
// kbd_8 = DFFEA(kbd_reg_8, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_8),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_8),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[8]~I .clock_enable_mode = "true";
defparam \kbd[8]~I .lut_mask = "ff00";
defparam \kbd[8]~I .operation_mode = "normal";
defparam \kbd[8]~I .output_mode = "reg_only";
defparam \kbd[8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B29
flex10ke_lcell \kbd[11]~I (
// Equation(s):
// kbd_11 = DFFEA(kbd_reg_11, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_11),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[11]~I .clock_enable_mode = "true";
defparam \kbd[11]~I .lut_mask = "ff00";
defparam \kbd[11]~I .operation_mode = "normal";
defparam \kbd[11]~I .output_mode = "reg_only";
defparam \kbd[11]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B29
flex10ke_lcell \kbd[12]~I (
// Equation(s):
// kbd_12 = DFFEA(kbd_reg_12, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_12),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_12),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[12]~I .clock_enable_mode = "true";
defparam \kbd[12]~I .lut_mask = "ff00";
defparam \kbd[12]~I .operation_mode = "normal";
defparam \kbd[12]~I .output_mode = "reg_only";
defparam \kbd[12]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_A33
flex10ke_lcell \kbd[2]~I (
// Equation(s):
// kbd_2 = DFFEA(kbd_reg_2, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[2]~I .clock_enable_mode = "true";
defparam \kbd[2]~I .lut_mask = "ff00";
defparam \kbd[2]~I .operation_mode = "normal";
defparam \kbd[2]~I .output_mode = "reg_only";
defparam \kbd[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A23
flex10ke_lcell \kbd[7]~I (
// Equation(s):
// kbd_7 = DFFEA(kbd_reg_7, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[7]~I .clock_enable_mode = "true";
defparam \kbd[7]~I .lut_mask = "ff00";
defparam \kbd[7]~I .operation_mode = "normal";
defparam \kbd[7]~I .output_mode = "reg_only";
defparam \kbd[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A33
flex10ke_lcell \kbd[1]~I (
// Equation(s):
// kbd_1 = DFFEA(kbd_reg_1, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[1]~I .clock_enable_mode = "true";
defparam \kbd[1]~I .lut_mask = "ff00";
defparam \kbd[1]~I .operation_mode = "normal";
defparam \kbd[1]~I .output_mode = "reg_only";
defparam \kbd[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A32
flex10ke_lcell \kbd[6]~I (
// Equation(s):
// kbd_6 = DFFEA(kbd_reg_6, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[6]~I .clock_enable_mode = "true";
defparam \kbd[6]~I .lut_mask = "ff00";
defparam \kbd[6]~I .operation_mode = "normal";
defparam \kbd[6]~I .output_mode = "reg_only";
defparam \kbd[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A32
flex10ke_lcell \kbd[5]~I (
// Equation(s):
// kbd_5 = DFFEA(kbd_reg_5, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[5]~I .clock_enable_mode = "true";
defparam \kbd[5]~I .lut_mask = "ff00";
defparam \kbd[5]~I .operation_mode = "normal";
defparam \kbd[5]~I .output_mode = "reg_only";
defparam \kbd[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_A33
flex10ke_lcell \kbd[0]~I (
// Equation(s):
// kbd_0 = DFFEA(kbd_reg_0, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[0]~I .clock_enable_mode = "true";
defparam \kbd[0]~I .lut_mask = "ff00";
defparam \kbd[0]~I .operation_mode = "normal";
defparam \kbd[0]~I .output_mode = "reg_only";
defparam \kbd[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A33
flex10ke_lcell \kbd[3]~I (
// Equation(s):
// kbd_3 = DFFEA(kbd_reg_3, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[3]~I .clock_enable_mode = "true";
defparam \kbd[3]~I .lut_mask = "ff00";
defparam \kbd[3]~I .operation_mode = "normal";
defparam \kbd[3]~I .output_mode = "reg_only";
defparam \kbd[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_A32
flex10ke_lcell \kbd[4]~I (
// Equation(s):
// kbd_4 = DFFEA(kbd_reg_4, GLOBAL(\fclk~dataout ), , , kbd_stb, , )

        .dataa(kbd_stb),
        .datab(vcc),
        .datac(vcc),
        .datad(kbd_reg_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(kbd_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \kbd[4]~I .clock_enable_mode = "true";
defparam \kbd[4]~I .lut_mask = "ff00";
defparam \kbd[4]~I .operation_mode = "normal";
defparam \kbd[4]~I .output_mode = "reg_only";
defparam \kbd[4]~I .packed_mode = "false";
// synopsys translate_on

endmodule

module zmem (
        romnram,
        romnram1,
        romnram2,
        romnram3,
        Mux8,
        romoe_n,
        romrw_en_reg,
        romwe_n,
        page_0,
        page_01,
        page_02,
        page_03,
        Mux7,
        page_1,
        page_11,
        page_12,
        page_13,
        Mux6,
        page_2,
        page_21,
        page_22,
        page_23,
        Mux5,
        page_3,
        page_31,
        page_32,
        page_33,
        Mux4,
        page_4,
        page_41,
        page_42,
        page_43,
        Mux3,
        cpu_rnw,
        cpu_req,
        page_5,
        page_51,
        page_52,
        page_53,
        Mux2,
        page_6,
        page_61,
        page_62,
        page_63,
        Mux1,
        page_7,
        page_71,
        page_72,
        page_73,
        Mux0,
        cend,
        rddata_15,
        rddata_6,
        rddata_14,
        rddata_7,
        rddata_1,
        rddata_12,
        rddata_9,
        rddata_4,
        rddata_5,
        rddata_13,
        rddata_2,
        rddata_10,
        rddata_3,
        rddata_11,
        rddata_0,
        rddata_8,
        cpu_strobe,
        zd_out_0,
        zd_out_1,
        zd_out_2,
        zd_out_3,
        zd_out_4,
        zd_out_5,
        zd_out_6,
        zd_out_7,
        a_14,
        a_15,
        rd_n,
        mreq_n,
        wr_n,
        a_0,
        fclk,
        rfsh_n,
        devpor,
        devclrn,
        devoe);
input   romnram;
input   romnram1;
input   romnram2;
input   romnram3;
output  Mux8;
output  romoe_n;
input   romrw_en_reg;
output  romwe_n;
input   page_0;
input   page_01;
input   page_02;
input   page_03;
output  Mux7;
input   page_1;
input   page_11;
input   page_12;
input   page_13;
output  Mux6;
input   page_2;
input   page_21;
input   page_22;
input   page_23;
output  Mux5;
input   page_3;
input   page_31;
input   page_32;
input   page_33;
output  Mux4;
input   page_4;
input   page_41;
input   page_42;
input   page_43;
output  Mux3;
output  cpu_rnw;
output  cpu_req;
input   page_5;
input   page_51;
input   page_52;
input   page_53;
output  Mux2;
input   page_6;
input   page_61;
input   page_62;
input   page_63;
output  Mux1;
input   page_7;
input   page_71;
input   page_72;
input   page_73;
output  Mux0;
input   cend;
input   rddata_15;
input   rddata_6;
input   rddata_14;
input   rddata_7;
input   rddata_1;
input   rddata_12;
input   rddata_9;
input   rddata_4;
input   rddata_5;
input   rddata_13;
input   rddata_2;
input   rddata_10;
input   rddata_3;
input   rddata_11;
input   rddata_0;
input   rddata_8;
input   cpu_strobe;
output  zd_out_0;
output  zd_out_1;
output  zd_out_2;
output  zd_out_3;
output  zd_out_4;
output  zd_out_5;
output  zd_out_6;
output  zd_out_7;
input   a_14;
input   a_15;
input   rd_n;
input   mreq_n;
input   wr_n;
input   a_0;
input   fclk;
input   rfsh_n;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \Mux8~2 ;
wire \Mux7~2 ;
wire \Mux6~2 ;
wire \Mux5~9 ;
wire \Mux4~2 ;
wire \Mux3~2 ;
wire \ramwr~9 ;
wire ramwr_reg;
wire ramrd_reg;
wire \Mux2~2 ;
wire \Mux1~2 ;
wire \Mux0~2 ;
wire \zd_out~48 ;
wire \zd_out~49 ;
wire \zd_out~50 ;
wire \zd_out~51 ;
wire \zd_out~52 ;
wire \zd_out~53 ;
wire \zd_out~54 ;
wire \zd_out~55 ;


// atom is at LC1_A13
flex10ke_lcell \Mux8~3_I (
// Equation(s):
// Mux8 = \Mux8~2  & (romnram # !\a~dataout [14]) # !\Mux8~2  & (\a~dataout [14] & romnram)

        .dataa(romnram3),
        .datab(\Mux8~2 ),
        .datac(a_14),
        .datad(romnram),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Mux8),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux8~3_I .clock_enable_mode = "false";
defparam \Mux8~3_I .lut_mask = "bc8c";
defparam \Mux8~3_I .operation_mode = "normal";
defparam \Mux8~3_I .output_mode = "comb_only";
defparam \Mux8~3_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_E7
flex10ke_lcell \romoe_n~I (
// Equation(s):
// romoe_n = \mreq_n~dataout  # \rd_n~dataout 

        .dataa(vcc),
        .datab(vcc),
        .datac(mreq_n),
        .datad(rd_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(romoe_n),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \romoe_n~I .clock_enable_mode = "false";
defparam \romoe_n~I .lut_mask = "fff0";
defparam \romoe_n~I .operation_mode = "normal";
defparam \romoe_n~I .output_mode = "comb_only";
defparam \romoe_n~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D7
flex10ke_lcell \romwe_n~15_I (
// Equation(s):
// romwe_n = \wr_n~dataout  # \mreq_n~dataout  # !romrw_en_reg

        .dataa(vcc),
        .datab(romrw_en_reg),
        .datac(wr_n),
        .datad(mreq_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(romwe_n),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \romwe_n~15_I .clock_enable_mode = "false";
defparam \romwe_n~15_I .lut_mask = "fff3";
defparam \romwe_n~15_I .operation_mode = "normal";
defparam \romwe_n~15_I .output_mode = "comb_only";
defparam \romwe_n~15_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_A4
flex10ke_lcell \Mux7~3_I (
// Equation(s):
// Mux7 = \Mux7~2  & (page_0 # !\a~dataout [15]) # !\Mux7~2  & (\a~dataout [15] & page_0)

        .dataa(page_03),
        .datab(\Mux7~2 ),
        .datac(a_15),
        .datad(page_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Mux7),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux7~3_I .clock_enable_mode = "false";
defparam \Mux7~3_I .lut_mask = "bc8c";
defparam \Mux7~3_I .operation_mode = "normal";
defparam \Mux7~3_I .output_mode = "comb_only";
defparam \Mux7~3_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B4
flex10ke_lcell \Mux6~3_I (
// Equation(s):
// Mux6 = \Mux6~2  & (page_1 # !\a~dataout [14]) # !\Mux6~2  & (\a~dataout [14] & page_1)

        .dataa(page_13),
        .datab(\Mux6~2 ),
        .datac(a_14),
        .datad(page_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Mux6),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux6~3_I .clock_enable_mode = "false";
defparam \Mux6~3_I .lut_mask = "bc8c";
defparam \Mux6~3_I .operation_mode = "normal";
defparam \Mux6~3_I .output_mode = "comb_only";
defparam \Mux6~3_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B5
flex10ke_lcell \Mux5~10_I (
// Equation(s):
// Mux5 = \Mux5~9  & (page_2 # !\a~dataout [15]) # !\Mux5~9  & (\a~dataout [15] & page_2)

        .dataa(page_23),
        .datab(\Mux5~9 ),
        .datac(a_15),
        .datad(page_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Mux5),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux5~10_I .clock_enable_mode = "false";
defparam \Mux5~10_I .lut_mask = "bc8c";
defparam \Mux5~10_I .operation_mode = "normal";
defparam \Mux5~10_I .output_mode = "comb_only";
defparam \Mux5~10_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B6
flex10ke_lcell \Mux4~3_I (
// Equation(s):
// Mux4 = \Mux4~2  & (page_3 # !\a~dataout [14]) # !\Mux4~2  & (\a~dataout [14] & page_3)

        .dataa(page_33),
        .datab(\Mux4~2 ),
        .datac(a_14),
        .datad(page_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Mux4),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux4~3_I .clock_enable_mode = "false";
defparam \Mux4~3_I .lut_mask = "bc8c";
defparam \Mux4~3_I .operation_mode = "normal";
defparam \Mux4~3_I .output_mode = "comb_only";
defparam \Mux4~3_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B5
flex10ke_lcell \Mux3~3_I (
// Equation(s):
// Mux3 = \Mux3~2  & (page_4 # !\a~dataout [15]) # !\Mux3~2  & (\a~dataout [15] & page_4)

        .dataa(page_43),
        .datab(\Mux3~2 ),
        .datac(a_15),
        .datad(page_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Mux3),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux3~3_I .clock_enable_mode = "false";
defparam \Mux3~3_I .lut_mask = "bc8c";
defparam \Mux3~3_I .operation_mode = "normal";
defparam \Mux3~3_I .output_mode = "comb_only";
defparam \Mux3~3_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_E7
flex10ke_lcell \cpu_rnw~38_I (
// Equation(s):
// cpu_rnw = !\mreq_n~dataout  & !Mux8 & !\rd_n~dataout  & \rfsh_n~dataout 

        .dataa(mreq_n),
        .datab(Mux8),
        .datac(rd_n),
        .datad(rfsh_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(cpu_rnw),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \cpu_rnw~38_I .clock_enable_mode = "false";
defparam \cpu_rnw~38_I .lut_mask = "0100";
defparam \cpu_rnw~38_I .operation_mode = "normal";
defparam \cpu_rnw~38_I .output_mode = "comb_only";
defparam \cpu_rnw~38_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_E7
flex10ke_lcell \cpu_req~I (
// Equation(s):
// cpu_req = ramwr_reg & !ramrd_reg & (cpu_rnw) # !ramwr_reg & (\ramwr~9  # !ramrd_reg & cpu_rnw)

        .dataa(ramwr_reg),
        .datab(ramrd_reg),
        .datac(\ramwr~9 ),
        .datad(cpu_rnw),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(cpu_req),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \cpu_req~I .clock_enable_mode = "false";
defparam \cpu_req~I .lut_mask = "7350";
defparam \cpu_req~I .operation_mode = "normal";
defparam \cpu_req~I .output_mode = "comb_only";
defparam \cpu_req~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B6
flex10ke_lcell \Mux2~3_I (
// Equation(s):
// Mux2 = \Mux2~2  & (page_5 # !\a~dataout [14]) # !\Mux2~2  & (\a~dataout [14] & page_5)

        .dataa(page_53),
        .datab(\Mux2~2 ),
        .datac(a_14),
        .datad(page_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Mux2),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux2~3_I .clock_enable_mode = "false";
defparam \Mux2~3_I .lut_mask = "bc8c";
defparam \Mux2~3_I .operation_mode = "normal";
defparam \Mux2~3_I .output_mode = "comb_only";
defparam \Mux2~3_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D27
flex10ke_lcell \Mux1~3_I (
// Equation(s):
// Mux1 = \Mux1~2  & (page_6 # !\a~dataout [15]) # !\Mux1~2  & (\a~dataout [15] & page_6)

        .dataa(page_63),
        .datab(\Mux1~2 ),
        .datac(a_15),
        .datad(page_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Mux1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux1~3_I .clock_enable_mode = "false";
defparam \Mux1~3_I .lut_mask = "bc8c";
defparam \Mux1~3_I .operation_mode = "normal";
defparam \Mux1~3_I .output_mode = "comb_only";
defparam \Mux1~3_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D27
flex10ke_lcell \Mux0~3_I (
// Equation(s):
// Mux0 = \Mux0~2  & (page_7 # !\a~dataout [14]) # !\Mux0~2  & (\a~dataout [14] & page_7)

        .dataa(page_73),
        .datab(\Mux0~2 ),
        .datac(a_14),
        .datad(page_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Mux0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux0~3_I .clock_enable_mode = "false";
defparam \Mux0~3_I .lut_mask = "bc8c";
defparam \Mux0~3_I .operation_mode = "normal";
defparam \Mux0~3_I .output_mode = "comb_only";
defparam \Mux0~3_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H5
flex10ke_lcell \zd_out[0]~I (
// Equation(s):
// zd_out_0 = cpu_strobe & (\zd_out~48 ) # !cpu_strobe & zd_out_0

        .dataa(vcc),
        .datab(cpu_strobe),
        .datac(zd_out_0),
        .datad(\zd_out~48 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(zd_out_0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zd_out[0]~I .clock_enable_mode = "false";
defparam \zd_out[0]~I .lut_mask = "fc30";
defparam \zd_out[0]~I .operation_mode = "normal";
defparam \zd_out[0]~I .output_mode = "comb_only";
defparam \zd_out[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H33
flex10ke_lcell \zd_out[1]~I (
// Equation(s):
// zd_out_1 = cpu_strobe & (\zd_out~49 ) # !cpu_strobe & zd_out_1

        .dataa(vcc),
        .datab(cpu_strobe),
        .datac(zd_out_1),
        .datad(\zd_out~49 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(zd_out_1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zd_out[1]~I .clock_enable_mode = "false";
defparam \zd_out[1]~I .lut_mask = "fc30";
defparam \zd_out[1]~I .operation_mode = "normal";
defparam \zd_out[1]~I .output_mode = "comb_only";
defparam \zd_out[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H25
flex10ke_lcell \zd_out[2]~I (
// Equation(s):
// zd_out_2 = cpu_strobe & (\zd_out~50 ) # !cpu_strobe & zd_out_2

        .dataa(vcc),
        .datab(cpu_strobe),
        .datac(zd_out_2),
        .datad(\zd_out~50 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(zd_out_2),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zd_out[2]~I .clock_enable_mode = "false";
defparam \zd_out[2]~I .lut_mask = "fc30";
defparam \zd_out[2]~I .operation_mode = "normal";
defparam \zd_out[2]~I .output_mode = "comb_only";
defparam \zd_out[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H17
flex10ke_lcell \zd_out[3]~I (
// Equation(s):
// zd_out_3 = cpu_strobe & (\zd_out~51 ) # !cpu_strobe & zd_out_3

        .dataa(vcc),
        .datab(cpu_strobe),
        .datac(zd_out_3),
        .datad(\zd_out~51 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(zd_out_3),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zd_out[3]~I .clock_enable_mode = "false";
defparam \zd_out[3]~I .lut_mask = "fc30";
defparam \zd_out[3]~I .operation_mode = "normal";
defparam \zd_out[3]~I .output_mode = "comb_only";
defparam \zd_out[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_G27
flex10ke_lcell \zd_out[4]~I (
// Equation(s):
// zd_out_4 = cpu_strobe & (\zd_out~52 ) # !cpu_strobe & zd_out_4

        .dataa(vcc),
        .datab(cpu_strobe),
        .datac(zd_out_4),
        .datad(\zd_out~52 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(zd_out_4),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zd_out[4]~I .clock_enable_mode = "false";
defparam \zd_out[4]~I .lut_mask = "fc30";
defparam \zd_out[4]~I .operation_mode = "normal";
defparam \zd_out[4]~I .output_mode = "comb_only";
defparam \zd_out[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H8
flex10ke_lcell \zd_out[5]~I (
// Equation(s):
// zd_out_5 = cpu_strobe & (\zd_out~53 ) # !cpu_strobe & zd_out_5

        .dataa(vcc),
        .datab(cpu_strobe),
        .datac(zd_out_5),
        .datad(\zd_out~53 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(zd_out_5),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zd_out[5]~I .clock_enable_mode = "false";
defparam \zd_out[5]~I .lut_mask = "fc30";
defparam \zd_out[5]~I .operation_mode = "normal";
defparam \zd_out[5]~I .output_mode = "comb_only";
defparam \zd_out[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H34
flex10ke_lcell \zd_out[6]~I (
// Equation(s):
// zd_out_6 = cpu_strobe & (\zd_out~54 ) # !cpu_strobe & zd_out_6

        .dataa(vcc),
        .datab(cpu_strobe),
        .datac(zd_out_6),
        .datad(\zd_out~54 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(zd_out_6),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zd_out[6]~I .clock_enable_mode = "false";
defparam \zd_out[6]~I .lut_mask = "fc30";
defparam \zd_out[6]~I .operation_mode = "normal";
defparam \zd_out[6]~I .output_mode = "comb_only";
defparam \zd_out[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H23
flex10ke_lcell \zd_out[7]~I (
// Equation(s):
// zd_out_7 = cpu_strobe & (\zd_out~55 ) # !cpu_strobe & zd_out_7

        .dataa(vcc),
        .datab(cpu_strobe),
        .datac(zd_out_7),
        .datad(\zd_out~55 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(zd_out_7),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zd_out[7]~I .clock_enable_mode = "false";
defparam \zd_out[7]~I .lut_mask = "fc30";
defparam \zd_out[7]~I .operation_mode = "normal";
defparam \zd_out[7]~I .output_mode = "comb_only";
defparam \zd_out[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_A13
flex10ke_lcell \Mux8~2_I (
// Equation(s):
// \Mux8~2  = \a~dataout [15] & (romnram # \a~dataout [14]) # !\a~dataout [15] & romnram & (!\a~dataout [14])

        .dataa(romnram2),
        .datab(a_15),
        .datac(romnram1),
        .datad(a_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux8~2 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux8~2_I .clock_enable_mode = "false";
defparam \Mux8~2_I .lut_mask = "cce2";
defparam \Mux8~2_I .operation_mode = "normal";
defparam \Mux8~2_I .output_mode = "comb_only";
defparam \Mux8~2_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A4
flex10ke_lcell \Mux7~2_I (
// Equation(s):
// \Mux7~2  = \a~dataout [14] & (page_0 # \a~dataout [15]) # !\a~dataout [14] & page_0 & (!\a~dataout [15])

        .dataa(page_02),
        .datab(a_14),
        .datac(page_01),
        .datad(a_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux7~2 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux7~2_I .clock_enable_mode = "false";
defparam \Mux7~2_I .lut_mask = "cce2";
defparam \Mux7~2_I .operation_mode = "normal";
defparam \Mux7~2_I .output_mode = "comb_only";
defparam \Mux7~2_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_B4
flex10ke_lcell \Mux6~2_I (
// Equation(s):
// \Mux6~2  = \a~dataout [15] & (page_1 # \a~dataout [14]) # !\a~dataout [15] & page_1 & (!\a~dataout [14])

        .dataa(page_12),
        .datab(a_15),
        .datac(page_11),
        .datad(a_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux6~2 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux6~2_I .clock_enable_mode = "false";
defparam \Mux6~2_I .lut_mask = "cce2";
defparam \Mux6~2_I .operation_mode = "normal";
defparam \Mux6~2_I .output_mode = "comb_only";
defparam \Mux6~2_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B5
flex10ke_lcell \Mux5~9_I (
// Equation(s):
// \Mux5~9  = \a~dataout [14] & (page_2 # \a~dataout [15]) # !\a~dataout [14] & page_2 & (!\a~dataout [15])

        .dataa(page_22),
        .datab(a_14),
        .datac(page_21),
        .datad(a_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux5~9 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux5~9_I .clock_enable_mode = "false";
defparam \Mux5~9_I .lut_mask = "cce2";
defparam \Mux5~9_I .operation_mode = "normal";
defparam \Mux5~9_I .output_mode = "comb_only";
defparam \Mux5~9_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B6
flex10ke_lcell \Mux4~2_I (
// Equation(s):
// \Mux4~2  = \a~dataout [15] & (page_3 # \a~dataout [14]) # !\a~dataout [15] & page_3 & (!\a~dataout [14])

        .dataa(page_32),
        .datab(a_15),
        .datac(page_31),
        .datad(a_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux4~2 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux4~2_I .clock_enable_mode = "false";
defparam \Mux4~2_I .lut_mask = "cce2";
defparam \Mux4~2_I .operation_mode = "normal";
defparam \Mux4~2_I .output_mode = "comb_only";
defparam \Mux4~2_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B5
flex10ke_lcell \Mux3~2_I (
// Equation(s):
// \Mux3~2  = \a~dataout [14] & (page_4 # \a~dataout [15]) # !\a~dataout [14] & page_4 & (!\a~dataout [15])

        .dataa(page_42),
        .datab(a_14),
        .datac(page_41),
        .datad(a_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux3~2 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux3~2_I .clock_enable_mode = "false";
defparam \Mux3~2_I .lut_mask = "cce2";
defparam \Mux3~2_I .operation_mode = "normal";
defparam \Mux3~2_I .output_mode = "comb_only";
defparam \Mux3~2_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_E7
flex10ke_lcell \ramwr~9_I (
// Equation(s):
// \ramwr~9  = !\mreq_n~dataout  & !Mux8 & !\wr_n~dataout  & \rfsh_n~dataout 

        .dataa(mreq_n),
        .datab(Mux8),
        .datac(wr_n),
        .datad(rfsh_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ramwr~9 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramwr~9_I .clock_enable_mode = "false";
defparam \ramwr~9_I .lut_mask = "0100";
defparam \ramwr~9_I .operation_mode = "normal";
defparam \ramwr~9_I .output_mode = "comb_only";
defparam \ramwr~9_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_E7
flex10ke_lcell \ramwr_reg~I (
// Equation(s):
// ramwr_reg = DFFEA(\ramwr~9 , GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(vcc),
        .datac(vcc),
        .datad(\ramwr~9 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ramwr_reg),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramwr_reg~I .clock_enable_mode = "true";
defparam \ramwr_reg~I .lut_mask = "ff00";
defparam \ramwr_reg~I .operation_mode = "normal";
defparam \ramwr_reg~I .output_mode = "reg_only";
defparam \ramwr_reg~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_E7
flex10ke_lcell \ramrd_reg~I (
// Equation(s):
// ramrd_reg = DFFEA(cpu_rnw, GLOBAL(\fclk~dataout ), , , cend, , )

        .dataa(cend),
        .datab(vcc),
        .datac(vcc),
        .datad(cpu_rnw),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ramrd_reg),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ramrd_reg~I .clock_enable_mode = "true";
defparam \ramrd_reg~I .lut_mask = "ff00";
defparam \ramrd_reg~I .operation_mode = "normal";
defparam \ramrd_reg~I .output_mode = "reg_only";
defparam \ramrd_reg~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_B6
flex10ke_lcell \Mux2~2_I (
// Equation(s):
// \Mux2~2  = \a~dataout [15] & (page_5 # \a~dataout [14]) # !\a~dataout [15] & page_5 & (!\a~dataout [14])

        .dataa(page_52),
        .datab(a_15),
        .datac(page_51),
        .datad(a_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux2~2 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux2~2_I .clock_enable_mode = "false";
defparam \Mux2~2_I .lut_mask = "cce2";
defparam \Mux2~2_I .operation_mode = "normal";
defparam \Mux2~2_I .output_mode = "comb_only";
defparam \Mux2~2_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D27
flex10ke_lcell \Mux1~2_I (
// Equation(s):
// \Mux1~2  = \a~dataout [14] & (page_6 # \a~dataout [15]) # !\a~dataout [14] & page_6 & (!\a~dataout [15])

        .dataa(page_62),
        .datab(a_14),
        .datac(page_61),
        .datad(a_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux1~2 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux1~2_I .clock_enable_mode = "false";
defparam \Mux1~2_I .lut_mask = "cce2";
defparam \Mux1~2_I .operation_mode = "normal";
defparam \Mux1~2_I .output_mode = "comb_only";
defparam \Mux1~2_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D27
flex10ke_lcell \Mux0~2_I (
// Equation(s):
// \Mux0~2  = \a~dataout [15] & (page_7 # \a~dataout [14]) # !\a~dataout [15] & page_7 & (!\a~dataout [14])

        .dataa(page_72),
        .datab(a_15),
        .datac(page_71),
        .datad(a_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Mux0~2 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Mux0~2_I .clock_enable_mode = "false";
defparam \Mux0~2_I .lut_mask = "cce2";
defparam \Mux0~2_I .operation_mode = "normal";
defparam \Mux0~2_I .output_mode = "comb_only";
defparam \Mux0~2_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H5
flex10ke_lcell \zd_out~48_I (
// Equation(s):
// \zd_out~48  = \a~dataout [0] & (rddata_0) # !\a~dataout [0] & rddata_8

        .dataa(vcc),
        .datab(a_0),
        .datac(rddata_8),
        .datad(rddata_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\zd_out~48 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zd_out~48_I .clock_enable_mode = "false";
defparam \zd_out~48_I .lut_mask = "fc30";
defparam \zd_out~48_I .operation_mode = "normal";
defparam \zd_out~48_I .output_mode = "comb_only";
defparam \zd_out~48_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H33
flex10ke_lcell \zd_out~49_I (
// Equation(s):
// \zd_out~49  = \a~dataout [0] & (rddata_1) # !\a~dataout [0] & rddata_9

        .dataa(vcc),
        .datab(a_0),
        .datac(rddata_9),
        .datad(rddata_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\zd_out~49 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zd_out~49_I .clock_enable_mode = "false";
defparam \zd_out~49_I .lut_mask = "fc30";
defparam \zd_out~49_I .operation_mode = "normal";
defparam \zd_out~49_I .output_mode = "comb_only";
defparam \zd_out~49_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_G25
flex10ke_lcell \zd_out~50_I (
// Equation(s):
// \zd_out~50  = \a~dataout [0] & (rddata_2) # !\a~dataout [0] & rddata_10

        .dataa(vcc),
        .datab(a_0),
        .datac(rddata_10),
        .datad(rddata_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\zd_out~50 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zd_out~50_I .clock_enable_mode = "false";
defparam \zd_out~50_I .lut_mask = "fc30";
defparam \zd_out~50_I .operation_mode = "normal";
defparam \zd_out~50_I .output_mode = "comb_only";
defparam \zd_out~50_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H17
flex10ke_lcell \zd_out~51_I (
// Equation(s):
// \zd_out~51  = \a~dataout [0] & (rddata_3) # !\a~dataout [0] & rddata_11

        .dataa(vcc),
        .datab(a_0),
        .datac(rddata_11),
        .datad(rddata_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\zd_out~51 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zd_out~51_I .clock_enable_mode = "false";
defparam \zd_out~51_I .lut_mask = "fc30";
defparam \zd_out~51_I .operation_mode = "normal";
defparam \zd_out~51_I .output_mode = "comb_only";
defparam \zd_out~51_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G27
flex10ke_lcell \zd_out~52_I (
// Equation(s):
// \zd_out~52  = \a~dataout [0] & (rddata_4) # !\a~dataout [0] & rddata_12

        .dataa(vcc),
        .datab(a_0),
        .datac(rddata_12),
        .datad(rddata_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\zd_out~52 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zd_out~52_I .clock_enable_mode = "false";
defparam \zd_out~52_I .lut_mask = "fc30";
defparam \zd_out~52_I .operation_mode = "normal";
defparam \zd_out~52_I .output_mode = "comb_only";
defparam \zd_out~52_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H8
flex10ke_lcell \zd_out~53_I (
// Equation(s):
// \zd_out~53  = \a~dataout [0] & (rddata_5) # !\a~dataout [0] & rddata_13

        .dataa(vcc),
        .datab(a_0),
        .datac(rddata_13),
        .datad(rddata_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\zd_out~53 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zd_out~53_I .clock_enable_mode = "false";
defparam \zd_out~53_I .lut_mask = "fc30";
defparam \zd_out~53_I .operation_mode = "normal";
defparam \zd_out~53_I .output_mode = "comb_only";
defparam \zd_out~53_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_G34
flex10ke_lcell \zd_out~54_I (
// Equation(s):
// \zd_out~54  = \a~dataout [0] & (rddata_6) # !\a~dataout [0] & rddata_14

        .dataa(vcc),
        .datab(a_0),
        .datac(rddata_14),
        .datad(rddata_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\zd_out~54 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zd_out~54_I .clock_enable_mode = "false";
defparam \zd_out~54_I .lut_mask = "fc30";
defparam \zd_out~54_I .operation_mode = "normal";
defparam \zd_out~54_I .output_mode = "comb_only";
defparam \zd_out~54_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_G34
flex10ke_lcell \zd_out~55_I (
// Equation(s):
// \zd_out~55  = \a~dataout [0] & (rddata_7) # !\a~dataout [0] & rddata_15

        .dataa(vcc),
        .datab(a_0),
        .datac(rddata_15),
        .datad(rddata_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\zd_out~55 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zd_out~55_I .clock_enable_mode = "false";
defparam \zd_out~55_I .lut_mask = "fc30";
defparam \zd_out~55_I .operation_mode = "normal";
defparam \zd_out~55_I .output_mode = "comb_only";
defparam \zd_out~55_I .packed_mode = "false";
// synopsys translate_on

endmodule

module zports (
        rst_n,
        romrw_en_reg,
        dos,
        always0,
        porthit,
        ay_bdir,
        ay_bc1,
        beep,
        ide_rd_n,
        ide_cs0_n,
        ide_cs1_n,
        ide_wr_n,
        vg_cs_n,
        sdcs_n,
        zpos,
        p7ffd_int_4,
        atm_pen,
        peff7_int_3,
        p7ffd_int_0,
        p7ffd_int_1,
        p7ffd_int_2,
        p7ffd_int_5,
        peff7_int_2,
        p7ffd_int_6,
        atm_cpm_n,
        peff7_int_0,
        border_1,
        border_2,
        border_0,
        port_wr,
        vg_wrFF,
        sd_stgl_2,
        sd_stgl_1,
        sd_start,
        wait_write_0,
        gluclock_addr_0,
        comport_addr_0,
        wait_start_comport,
        wait_start_gluclock,
        atmF7_wr_fclk,
        pre_bc1,
        p7ffd_int_3,
        wait_write_1,
        gluclock_addr_1,
        comport_addr_1,
        Selector7,
        musy_5,
        musx_5,
        musbtn_5,
        Selector2,
        drq_sync_1,
        cfg0_reg_out_2,
        musy_6,
        musx_6,
        musbtn_6,
        Selector1,
        intrq_sync_1,
        musy_7,
        musx_7,
        musbtn_7,
        Selector0,
        ideout_0,
        ideout_1,
        ideout_2,
        ideout_3,
        ideout_4,
        ideout_5,
        ideout_6,
        ideout_7,
        ideout_8,
        ideout_9,
        ideout_10,
        ideout_11,
        ideout_12,
        ideout_13,
        ideout_14,
        ideout_15,
        peff7_int_4,
        peff7_int_5,
        wait_write_2,
        gluclock_addr_2,
        comport_addr_2,
        p7ffd_int_7,
        wait_write_3,
        gluclock_addr_3,
        wait_reg_0,
        Selector01,
        dataout,
        dout_0,
        Selector71,
        musy_0,
        musx_0,
        musbtn_0,
        kj_data_0,
        Selector72,
        wait_reg_1,
        dout_1,
        Selector6,
        musy_1,
        musx_1,
        musbtn_1,
        kj_data_1,
        Selector61,
        wait_reg_2,
        dout_2,
        Selector5,
        musy_2,
        musx_2,
        musbtn_2,
        kj_data_2,
        Selector51,
        wait_reg_3,
        dout_3,
        Selector4,
        musy_3,
        musx_3,
        musbtn_3,
        kj_data_3,
        Selector41,
        wait_reg_4,
        dout_4,
        Selector3,
        musy_4,
        musx_4,
        musbtn_4,
        kj_data_4,
        Selector31,
        wait_reg_5,
        dout_5,
        Selector21,
        wait_reg_6,
        dout_6,
        Selector11,
        wait_reg_7,
        dout_7,
        Selector02,
        wait_write_4,
        gluclock_addr_4,
        wait_write_5,
        gluclock_addr_5,
        kbd_34,
        kbd_39,
        kbd_33,
        kbd_38,
        kbd_37,
        kbd_32,
        kbd_35,
        kbd_36,
        kbd_26,
        kbd_31,
        kbd_25,
        kbd_30,
        kbd_29,
        kbd_24,
        kbd_27,
        kbd_28,
        kbd_18,
        kbd_23,
        kbd_17,
        kbd_22,
        kbd_21,
        kbd_16,
        kbd_19,
        kbd_20,
        kbd_10,
        kbd_15,
        kbd_9,
        kbd_14,
        kbd_13,
        kbd_8,
        kbd_11,
        kbd_12,
        kbd_2,
        kbd_7,
        kbd_1,
        kbd_6,
        kbd_5,
        kbd_0,
        kbd_3,
        kbd_4,
        wait_write_6,
        gluclock_addr_6,
        wait_write_7,
        gluclock_addr_7,
        wait_rnw,
        Selector62,
        Selector52,
        Selector42,
        Selector32,
        Selector22,
        Selector12,
        a_14,
        a_15,
        rd_n,
        wr_n,
        iorq_n,
        a_3,
        a_4,
        a_0,
        a_1,
        a_2,
        a_6,
        a_5,
        a_7,
        fclk,
        zclk,
        a_8,
        a_11,
        a_12,
        a_13,
        a_10,
        a_9,
        d_0,
        d_1,
        d_2,
        d_3,
        d_4,
        d_5,
        d_6,
        d_7,
        ide_d_0,
        ide_d_1,
        ide_d_2,
        ide_d_3,
        ide_d_4,
        ide_d_5,
        ide_d_6,
        ide_d_7,
        ide_d_8,
        ide_d_9,
        ide_d_10,
        ide_d_11,
        ide_d_12,
        ide_d_13,
        ide_d_14,
        ide_d_15,
        sd_start1,
        ide_rd_n1,
        devpor,
        devclrn,
        devoe);
input   rst_n;
output  romrw_en_reg;
input   dos;
output  always0;
output  porthit;
output  ay_bdir;
output  ay_bc1;
output  beep;
output  ide_rd_n;
output  ide_cs0_n;
output  ide_cs1_n;
output  ide_wr_n;
output  vg_cs_n;
output  sdcs_n;
input   zpos;
output  p7ffd_int_4;
output  atm_pen;
output  peff7_int_3;
output  p7ffd_int_0;
output  p7ffd_int_1;
output  p7ffd_int_2;
output  p7ffd_int_5;
output  peff7_int_2;
output  p7ffd_int_6;
output  atm_cpm_n;
output  peff7_int_0;
output  border_1;
output  border_2;
output  border_0;
output  port_wr;
output  vg_wrFF;
output  sd_stgl_2;
output  sd_stgl_1;
output  sd_start;
output  wait_write_0;
output  gluclock_addr_0;
output  comport_addr_0;
output  wait_start_comport;
output  wait_start_gluclock;
output  atmF7_wr_fclk;
output  pre_bc1;
output  p7ffd_int_3;
output  wait_write_1;
output  gluclock_addr_1;
output  comport_addr_1;
output  Selector7;
input   musy_5;
input   musx_5;
input   musbtn_5;
output  Selector2;
input   drq_sync_1;
input   cfg0_reg_out_2;
input   musy_6;
input   musx_6;
input   musbtn_6;
output  Selector1;
input   intrq_sync_1;
input   musy_7;
input   musx_7;
input   musbtn_7;
output  Selector0;
output  ideout_0;
output  ideout_1;
output  ideout_2;
output  ideout_3;
output  ideout_4;
output  ideout_5;
output  ideout_6;
output  ideout_7;
output  ideout_8;
output  ideout_9;
output  ideout_10;
output  ideout_11;
output  ideout_12;
output  ideout_13;
output  ideout_14;
output  ideout_15;
output  peff7_int_4;
output  peff7_int_5;
output  wait_write_2;
output  gluclock_addr_2;
output  comport_addr_2;
output  p7ffd_int_7;
output  wait_write_3;
output  gluclock_addr_3;
input   wait_reg_0;
output  Selector01;
output  dataout;
input   dout_0;
output  Selector71;
input   musy_0;
input   musx_0;
input   musbtn_0;
input   kj_data_0;
output  Selector72;
input   wait_reg_1;
input   dout_1;
output  Selector6;
input   musy_1;
input   musx_1;
input   musbtn_1;
input   kj_data_1;
output  Selector61;
input   wait_reg_2;
input   dout_2;
output  Selector5;
input   musy_2;
input   musx_2;
input   musbtn_2;
input   kj_data_2;
output  Selector51;
input   wait_reg_3;
input   dout_3;
output  Selector4;
input   musy_3;
input   musx_3;
input   musbtn_3;
input   kj_data_3;
output  Selector41;
input   wait_reg_4;
input   dout_4;
output  Selector3;
input   musy_4;
input   musx_4;
input   musbtn_4;
input   kj_data_4;
output  Selector31;
input   wait_reg_5;
input   dout_5;
output  Selector21;
input   wait_reg_6;
input   dout_6;
output  Selector11;
input   wait_reg_7;
input   dout_7;
output  Selector02;
output  wait_write_4;
output  gluclock_addr_4;
output  wait_write_5;
output  gluclock_addr_5;
input   kbd_34;
input   kbd_39;
input   kbd_33;
input   kbd_38;
input   kbd_37;
input   kbd_32;
input   kbd_35;
input   kbd_36;
input   kbd_26;
input   kbd_31;
input   kbd_25;
input   kbd_30;
input   kbd_29;
input   kbd_24;
input   kbd_27;
input   kbd_28;
input   kbd_18;
input   kbd_23;
input   kbd_17;
input   kbd_22;
input   kbd_21;
input   kbd_16;
input   kbd_19;
input   kbd_20;
input   kbd_10;
input   kbd_15;
input   kbd_9;
input   kbd_14;
input   kbd_13;
input   kbd_8;
input   kbd_11;
input   kbd_12;
input   kbd_2;
input   kbd_7;
input   kbd_1;
input   kbd_6;
input   kbd_5;
input   kbd_0;
input   kbd_3;
input   kbd_4;
output  wait_write_6;
output  gluclock_addr_6;
output  wait_write_7;
output  gluclock_addr_7;
output  wait_rnw;
output  Selector62;
output  Selector52;
output  Selector42;
output  Selector32;
output  Selector22;
output  Selector12;
input   a_14;
input   a_15;
input   rd_n;
input   wr_n;
input   iorq_n;
input   a_3;
input   a_4;
input   a_0;
input   a_1;
input   a_2;
input   a_6;
input   a_5;
input   a_7;
input   fclk;
input   zclk;
input   a_8;
input   a_11;
input   a_12;
input   a_13;
input   a_10;
input   a_9;
input   d_0;
input   d_1;
input   d_2;
input   d_3;
input   d_4;
input   d_5;
input   d_6;
input   d_7;
input   ide_d_0;
input   ide_d_1;
input   ide_d_2;
input   ide_d_3;
input   ide_d_4;
input   ide_d_5;
input   ide_d_6;
input   ide_d_7;
input   ide_d_8;
input   ide_d_9;
input   ide_d_10;
input   ide_d_11;
input   ide_d_12;
input   ide_d_13;
input   ide_d_14;
input   ide_d_15;
output  sd_start1;
output  ide_rd_n1;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire \Equal16~49 ;
wire \porthit~589 ;
wire \always9~80 ;
wire \always26~82 ;
wire \Selector7~1871 ;
wire \dataout~111 ;
wire \Selector7~1873 ;
wire \always6~2 ;
wire \Selector7~1877 ;
wire \Selector7~1883 ;
wire \Selector7~1885 ;
wire \Selector6~1384 ;
wire \Selector6~1388 ;
wire \Selector6~1395 ;
wire \Selector5~1384 ;
wire \Selector5~1388 ;
wire \Selector5~1395 ;
wire \Selector4~1384 ;
wire \Selector4~1388 ;
wire \Selector4~1395 ;
wire \Selector3~1384 ;
wire \Selector3~1388 ;
wire \Selector3~1395 ;
wire \Selector2~1461 ;
wire \Selector2~1465 ;
wire \Selector1~1393 ;
wire \Selector1~1397 ;
wire \Selector0~1463 ;
wire \Selector0~1467 ;
wire \Selector7~1893 ;
wire \Selector7~1895 ;
wire \Selector6~1403 ;
wire \Selector6~1405 ;
wire \Selector5~1403 ;
wire \Selector5~1405 ;
wire \Selector4~1403 ;
wire \Selector4~1405 ;
wire \Selector3~1403 ;
wire \Selector3~1405 ;
wire port_wr_fclk;
wire \Equal16~48 ;
wire \Equal15~33 ;
wire \Equal15~34 ;
wire zxevbf_wr_fclk;
wire \Equal0~44 ;
wire shadow_en_reg;
wire shadow;
wire \Equal20~46 ;
wire \Equal19~29 ;
wire \Equal9~56 ;
wire \porthit~590 ;
wire \Equal9~57 ;
wire \Equal12~39 ;
wire \Equal13~23 ;
wire \Equal14~22 ;
wire \Equal0~46 ;
wire \Equal0~45 ;
wire \Equal17~39 ;
wire \porthit~588 ;
wire \porthit~599 ;
wire \porthit~592 ;
wire \Equal9~58 ;
wire \Equal16~50 ;
wire \Equal23~24 ;
wire \Equal19~30 ;
wire \porthit~581 ;
wire \porthit~583 ;
wire \vg_cs_n~27 ;
wire portfe_wr;
wire \WideOr1~109 ;
wire iord_reg;
wire port_rd;
wire ide_rd_trig;
wire ide_rd_latch;
wire \iderdeven~0 ;
wire \Equal1~40 ;
wire \Equal1~41 ;
wire ide_wrhi_trig;
wire \always11~20 ;
wire ide_wrlo_trig;
wire ide_wrlo_latch;
wire ide_wrhi_latch;
wire \ide_wr_n~3 ;
wire \sdcfg_wr~122 ;
wire \Equal12~40 ;
wire \sdcfg_wr~123 ;
wire \sdcfg_wr~124 ;
wire \always18~42 ;
wire \always18~43 ;
wire \atm77_wr_fclk~22 ;
wire \wait_start_gluclock~56 ;
wire \always19~42 ;
wire iowr_reg;
wire sd_start_toggle;
wire \wait_start_gluclock~57 ;
wire \wait_write~358 ;
wire \gluclock_addr[0]~56 ;
wire \Selector7~1918 ;
wire \Selector7~1897 ;
wire \Selector7~1856 ;
wire \Selector7~1861 ;
wire \Selector2~1450 ;
wire \Selector2~1451 ;
wire \Equal9~59 ;
wire \Selector2~1449 ;
wire \Selector1~1382 ;
wire \Selector1~1383 ;
wire \Selector1~1380 ;
wire \Selector1~1381 ;
wire \Selector1~1379 ;
wire \Selector0~1452 ;
wire \Selector0~1453 ;
wire \Selector0~1450 ;
wire \Selector0~1451 ;
wire \always10~0 ;
wire \Selector0~1462 ;
wire \Selector0~1481 ;
wire \dataout~116 ;
wire \idein_lo_rd~25 ;
wire \Selector7~1876 ;
wire \Selector7~1874 ;
wire \Selector7~1875 ;
wire \Selector7~1924 ;
wire \Equal1~42 ;
wire \Selector7~1937 ;
wire \Selector7~1901 ;
wire \Selector7~1934 ;
wire \Selector7~1900 ;
wire \Selector7~1884 ;
wire \Selector7~1879 ;
wire \Selector7~1880 ;
wire \Selector7~1931 ;
wire \Selector6~1387 ;
wire \Selector6~1385 ;
wire \Selector6~1386 ;
wire \Selector6~1424 ;
wire \Selector6~1436 ;
wire \Selector6~1411 ;
wire \Selector6~1433 ;
wire \Selector6~1410 ;
wire \Selector6~1394 ;
wire \Selector6~1390 ;
wire \Selector6~1391 ;
wire \Selector6~1430 ;
wire \Selector5~1387 ;
wire \Selector5~1385 ;
wire \Selector5~1386 ;
wire \Selector5~1424 ;
wire \Selector5~1436 ;
wire \Selector5~1411 ;
wire \Selector5~1433 ;
wire \Selector5~1410 ;
wire \Selector5~1394 ;
wire \Selector5~1390 ;
wire \Selector5~1391 ;
wire \Selector5~1430 ;
wire \Selector4~1387 ;
wire \Selector4~1385 ;
wire \Selector4~1386 ;
wire \Selector4~1424 ;
wire \Selector4~1436 ;
wire \Selector4~1411 ;
wire \Selector4~1433 ;
wire \Selector4~1410 ;
wire \Selector4~1394 ;
wire \Selector4~1390 ;
wire \Selector4~1391 ;
wire \Selector4~1430 ;
wire \Selector3~1387 ;
wire \Selector3~1385 ;
wire \Selector3~1386 ;
wire \Selector3~1424 ;
wire \Selector3~1436 ;
wire \Selector3~1411 ;
wire \Selector3~1433 ;
wire \Selector3~1410 ;
wire \Selector3~1394 ;
wire \Selector3~1390 ;
wire \Selector3~1391 ;
wire \Selector3~1430 ;
wire \Selector2~1464 ;
wire \Selector2~1462 ;
wire \Selector2~1463 ;
wire \Selector2~1482 ;
wire \Selector1~1396 ;
wire \Selector1~1394 ;
wire \Selector1~1395 ;
wire \Selector1~1416 ;
wire \Selector0~1466 ;
wire \Selector0~1464 ;
wire \Selector0~1465 ;
wire \Selector0~1486 ;
wire \Selector6~1383 ;
wire \Selector6~1419 ;
wire \Selector5~1383 ;
wire \Selector5~1419 ;
wire \Selector4~1383 ;
wire \Selector4~1419 ;
wire \Selector3~1383 ;
wire \Selector3~1419 ;
wire \Selector2~1460 ;
wire \Selector2~1477 ;
wire \Selector1~1392 ;
wire \Selector1~1411 ;
wire [7:0] idehiin;
wire [15:0] idewrreg;
wire [1:0] iowr_reg_fclk;
wire [7:0] peff7_int;
wire [2:0] sd_stgl;


// atom is at LC4_H25
flex10ke_lcell \Equal16~49_I (
// Equation(s):
// \Equal16~49  = !\a~dataout [4] & \a~dataout [3]

        .dataa(vcc),
        .datab(vcc),
        .datac(a_4),
        .datad(a_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal16~49 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal16~49_I .clock_enable_mode = "false";
defparam \Equal16~49_I .lut_mask = "0f00";
defparam \Equal16~49_I .operation_mode = "normal";
defparam \Equal16~49_I .output_mode = "comb_only";
defparam \Equal16~49_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D5
flex10ke_lcell \always9~80_I (
// Equation(s):
// \always9~80  = \WideOr1~109  & (port_rd # port_wr) # !\WideOr1~109  & \Equal1~41  & (port_rd # port_wr)

        .dataa(\WideOr1~109 ),
        .datab(\Equal1~41 ),
        .datac(port_rd),
        .datad(port_wr),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always9~80 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always9~80_I .clock_enable_mode = "false";
defparam \always9~80_I .lut_mask = "eee0";
defparam \always9~80_I .operation_mode = "normal";
defparam \always9~80_I .output_mode = "comb_only";
defparam \always9~80_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D12
flex10ke_lcell \always26~82_I (
// Equation(s):
// \always26~82  = \Equal12~40  & (port_rd # !\sdcfg_wr~122  & port_wr)

        .dataa(\sdcfg_wr~122 ),
        .datab(port_wr),
        .datac(port_rd),
        .datad(\Equal12~40 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always26~82 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always26~82_I .clock_enable_mode = "false";
defparam \always26~82_I .lut_mask = "f400";
defparam \always26~82_I .operation_mode = "normal";
defparam \always26~82_I .output_mode = "comb_only";
defparam \always26~82_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H24
flex10ke_lcell \Selector7~1873_I (
// Equation(s):
// \Selector7~1873  = \a~dataout [0] & \a~dataout [6] & (\a~dataout [5] # !\a~dataout [7])

        .dataa(a_7),
        .datab(a_5),
        .datac(a_0),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1873 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector7~1873_I .clock_enable_mode = "false";
defparam \Selector7~1873_I .lut_mask = "d000";
defparam \Selector7~1873_I .operation_mode = "normal";
defparam \Selector7~1873_I .output_mode = "comb_only";
defparam \Selector7~1873_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D1
flex10ke_lcell \always6~2_I (
// Equation(s):
// \always6~2  = !\a~dataout [14] & peff7_int[7] & (\a~dataout [8] $ shadow)

        .dataa(a_14),
        .datab(a_8),
        .datac(shadow),
        .datad(peff7_int[7]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always6~2 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always6~2_I .clock_enable_mode = "false";
defparam \always6~2_I .lut_mask = "1400";
defparam \always6~2_I .operation_mode = "normal";
defparam \always6~2_I .output_mode = "comb_only";
defparam \always6~2_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_A23
flex10ke_lcell \Selector7~1883_I (
// Equation(s):
// \Selector7~1883  = !\a~dataout [0] & \a~dataout [7]

        .dataa(vcc),
        .datab(vcc),
        .datac(a_0),
        .datad(a_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1883 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector7~1883_I .clock_enable_mode = "false";
defparam \Selector7~1883_I .lut_mask = "0f00";
defparam \Selector7~1883_I .operation_mode = "normal";
defparam \Selector7~1883_I .output_mode = "comb_only";
defparam \Selector7~1883_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D7
flex10ke_lcell \romrw_en_reg~I (
// Equation(s):
// romrw_en_reg = DFFEA(\d[1]~6 , GLOBAL(\fclk~dataout ), rst_out_n, , zxevbf_wr_fclk, , )

        .dataa(zxevbf_wr_fclk),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(romrw_en_reg),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \romrw_en_reg~I .clock_enable_mode = "true";
defparam \romrw_en_reg~I .lut_mask = "ff00";
defparam \romrw_en_reg~I .operation_mode = "normal";
defparam \romrw_en_reg~I .output_mode = "reg_only";
defparam \romrw_en_reg~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D24
flex10ke_lcell \always0~81_I (
// Equation(s):
// always0 = \Equal0~44  & \a~dataout [6] & shadow & \Equal15~33 

        .dataa(\Equal0~44 ),
        .datab(a_6),
        .datac(shadow),
        .datad(\Equal15~33 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(always0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always0~81_I .clock_enable_mode = "false";
defparam \always0~81_I .lut_mask = "8000";
defparam \always0~81_I .operation_mode = "normal";
defparam \always0~81_I .output_mode = "comb_only";
defparam \always0~81_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D24
flex10ke_lcell \porthit~584_I (
// Equation(s):
// porthit = \porthit~583  # always0 # !\Equal20~46  & shadow

        .dataa(\Equal20~46 ),
        .datab(shadow),
        .datac(\porthit~583 ),
        .datad(always0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(porthit),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \porthit~584_I .clock_enable_mode = "false";
defparam \porthit~584_I .lut_mask = "fff4";
defparam \porthit~584_I .operation_mode = "normal";
defparam \porthit~584_I .output_mode = "comb_only";
defparam \porthit~584_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D18
flex10ke_lcell \ay_bdir~I (
// Equation(s):
// ay_bdir = !\iorq_n~dataout  & !\wr_n~dataout  & \a~dataout [15] & \Equal17~39 

        .dataa(iorq_n),
        .datab(wr_n),
        .datac(a_15),
        .datad(\Equal17~39 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ay_bdir),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ay_bdir~I .clock_enable_mode = "false";
defparam \ay_bdir~I .lut_mask = "1000";
defparam \ay_bdir~I .operation_mode = "normal";
defparam \ay_bdir~I .output_mode = "comb_only";
defparam \ay_bdir~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D18
flex10ke_lcell \ay_bc1~38_I (
// Equation(s):
// ay_bc1 = \a~dataout [15] & \a~dataout [14] & \vg_cs_n~27  & \Equal17~39 

        .dataa(a_15),
        .datab(a_14),
        .datac(\vg_cs_n~27 ),
        .datad(\Equal17~39 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ay_bc1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ay_bc1~38_I .clock_enable_mode = "false";
defparam \ay_bc1~38_I .lut_mask = "8000";
defparam \ay_bc1~38_I .operation_mode = "normal";
defparam \ay_bc1~38_I .output_mode = "comb_only";
defparam \ay_bc1~38_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F6
flex10ke_lcell \beep~I (
// Equation(s):
// beep = DFFEA(\d[4]~3  $ \d[3]~4 , GLOBAL(\clkz_in~dataout ), , , portfe_wr, , )

        .dataa(portfe_wr),
        .datab(vcc),
        .datac(d_4),
        .datad(d_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(beep),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \beep~I .clock_enable_mode = "true";
defparam \beep~I .lut_mask = "0ff0";
defparam \beep~I .operation_mode = "normal";
defparam \beep~I .output_mode = "reg_only";
defparam \beep~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D4
flex10ke_lcell \ide_rd_n~64_I (
// Equation(s):
// ide_rd_n = \iorq_n~dataout  # \rd_n~dataout  # \iderdeven~0  # !\WideOr1~109 

        .dataa(\WideOr1~109 ),
        .datab(iorq_n),
        .datac(rd_n),
        .datad(\iderdeven~0 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ide_rd_n),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ide_rd_n~64_I .clock_enable_mode = "false";
defparam \ide_rd_n~64_I .lut_mask = "fffd";
defparam \ide_rd_n~64_I .operation_mode = "normal";
defparam \ide_rd_n~64_I .output_mode = "comb_only";
defparam \ide_rd_n~64_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D22
flex10ke_lcell \ide_cs0_n~I (
// Equation(s):
// ide_cs0_n = \a~dataout [3] # !\Equal9~56  # !\a~dataout [4]

        .dataa(vcc),
        .datab(a_4),
        .datac(\Equal9~56 ),
        .datad(a_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ide_cs0_n),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ide_cs0_n~I .clock_enable_mode = "false";
defparam \ide_cs0_n~I .lut_mask = "ff3f";
defparam \ide_cs0_n~I .operation_mode = "normal";
defparam \ide_cs0_n~I .output_mode = "comb_only";
defparam \ide_cs0_n~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D32
flex10ke_lcell \ide_cs1_n~I (
// Equation(s):
// ide_cs1_n = \a~dataout [4] # !\Equal9~56  # !\Equal9~57 

        .dataa(vcc),
        .datab(\Equal9~57 ),
        .datac(\Equal9~56 ),
        .datad(a_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ide_cs1_n),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ide_cs1_n~I .clock_enable_mode = "false";
defparam \ide_cs1_n~I .lut_mask = "ff3f";
defparam \ide_cs1_n~I .operation_mode = "normal";
defparam \ide_cs1_n~I .output_mode = "comb_only";
defparam \ide_cs1_n~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D5
flex10ke_lcell \ide_wr_n~73_I (
// Equation(s):
// ide_wr_n = \ide_wr_n~3  # \iorq_n~dataout  # \wr_n~dataout  # !\WideOr1~109 

        .dataa(\WideOr1~109 ),
        .datab(\ide_wr_n~3 ),
        .datac(iorq_n),
        .datad(wr_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ide_wr_n),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ide_wr_n~73_I .clock_enable_mode = "false";
defparam \ide_wr_n~73_I .lut_mask = "fffd";
defparam \ide_wr_n~73_I .operation_mode = "normal";
defparam \ide_wr_n~73_I .output_mode = "comb_only";
defparam \ide_wr_n~73_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D24
flex10ke_lcell \vg_cs_n~I (
// Equation(s):
// vg_cs_n = !\Equal19~30  & \Equal20~46  # !\vg_cs_n~27  # !shadow

        .dataa(shadow),
        .datab(\vg_cs_n~27 ),
        .datac(\Equal19~30 ),
        .datad(\Equal20~46 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(vg_cs_n),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vg_cs_n~I .clock_enable_mode = "false";
defparam \vg_cs_n~I .lut_mask = "7f77";
defparam \vg_cs_n~I .operation_mode = "normal";
defparam \vg_cs_n~I .output_mode = "comb_only";
defparam \vg_cs_n~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D12
flex10ke_lcell \sdcs_n~I (
// Equation(s):
// sdcs_n = DFFEA(!\d[1]~6 , GLOBAL(\clkz_in~dataout ), rst_out_n, , \sdcfg_wr~124 , , )

        .dataa(\sdcfg_wr~124 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(sdcs_n),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sdcs_n~I .clock_enable_mode = "true";
defparam \sdcs_n~I .lut_mask = "00ff";
defparam \sdcs_n~I .operation_mode = "normal";
defparam \sdcs_n~I .output_mode = "reg_only";
defparam \sdcs_n~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A3
flex10ke_lcell \p7ffd_int[4]~I (
// Equation(s):
// p7ffd_int_4 = DFFEA(\d[4]~3 , GLOBAL(\clkz_in~dataout ), rst_out_n, , \always18~43 , , )

        .dataa(\always18~43 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(p7ffd_int_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \p7ffd_int[4]~I .clock_enable_mode = "true";
defparam \p7ffd_int[4]~I .lut_mask = "ff00";
defparam \p7ffd_int[4]~I .operation_mode = "normal";
defparam \p7ffd_int[4]~I .output_mode = "reg_only";
defparam \p7ffd_int[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D8
flex10ke_lcell \atm_pen~I (
// Equation(s):
// atm_pen = DFFEA(\a~dataout [8], GLOBAL(\fclk~dataout ), rst_out_n, , \atm77_wr_fclk~22 , , )

        .dataa(\atm77_wr_fclk~22 ),
        .datab(vcc),
        .datac(vcc),
        .datad(a_8),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(atm_pen),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \atm_pen~I .clock_enable_mode = "true";
defparam \atm_pen~I .lut_mask = "ff00";
defparam \atm_pen~I .operation_mode = "normal";
defparam \atm_pen~I .output_mode = "reg_only";
defparam \atm_pen~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F3
flex10ke_lcell \peff7_int[3]~I (
// Equation(s):
// peff7_int_3 = DFFEA(\d[3]~4 , GLOBAL(\clkz_in~dataout ), rst_out_n, , \always19~42 , , )

        .dataa(\always19~42 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(peff7_int_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \peff7_int[3]~I .clock_enable_mode = "true";
defparam \peff7_int[3]~I .lut_mask = "ff00";
defparam \peff7_int[3]~I .operation_mode = "normal";
defparam \peff7_int[3]~I .output_mode = "reg_only";
defparam \peff7_int[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_F3
flex10ke_lcell \p7ffd_int[0]~I (
// Equation(s):
// p7ffd_int_0 = DFFEA(\d[0]~7 , GLOBAL(\clkz_in~dataout ), rst_out_n, , \always18~43 , , )

        .dataa(\always18~43 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(p7ffd_int_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \p7ffd_int[0]~I .clock_enable_mode = "true";
defparam \p7ffd_int[0]~I .lut_mask = "ff00";
defparam \p7ffd_int[0]~I .operation_mode = "normal";
defparam \p7ffd_int[0]~I .output_mode = "reg_only";
defparam \p7ffd_int[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B35
flex10ke_lcell \p7ffd_int[1]~I (
// Equation(s):
// p7ffd_int_1 = DFFEA(\d[1]~6 , GLOBAL(\clkz_in~dataout ), rst_out_n, , \always18~43 , , )

        .dataa(\always18~43 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(p7ffd_int_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \p7ffd_int[1]~I .clock_enable_mode = "true";
defparam \p7ffd_int[1]~I .lut_mask = "ff00";
defparam \p7ffd_int[1]~I .operation_mode = "normal";
defparam \p7ffd_int[1]~I .output_mode = "reg_only";
defparam \p7ffd_int[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B17
flex10ke_lcell \p7ffd_int[2]~I (
// Equation(s):
// p7ffd_int_2 = DFFEA(\d[2]~5 , GLOBAL(\clkz_in~dataout ), rst_out_n, , \always18~43 , , )

        .dataa(\always18~43 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(p7ffd_int_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \p7ffd_int[2]~I .clock_enable_mode = "true";
defparam \p7ffd_int[2]~I .lut_mask = "ff00";
defparam \p7ffd_int[2]~I .operation_mode = "normal";
defparam \p7ffd_int[2]~I .output_mode = "reg_only";
defparam \p7ffd_int[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B35
flex10ke_lcell \p7ffd_int[5]~I (
// Equation(s):
// p7ffd_int_5 = DFFEA(\d[5]~2 , GLOBAL(\clkz_in~dataout ), rst_out_n, , \always18~43 , , )

        .dataa(\always18~43 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_5),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(p7ffd_int_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \p7ffd_int[5]~I .clock_enable_mode = "true";
defparam \p7ffd_int[5]~I .lut_mask = "ff00";
defparam \p7ffd_int[5]~I .operation_mode = "normal";
defparam \p7ffd_int[5]~I .output_mode = "reg_only";
defparam \p7ffd_int[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_F3
flex10ke_lcell \peff7_int[2]~I (
// Equation(s):
// peff7_int_2 = DFFEA(\d[2]~5 , GLOBAL(\clkz_in~dataout ), rst_out_n, , \always19~42 , , )

        .dataa(\always19~42 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(peff7_int_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \peff7_int[2]~I .clock_enable_mode = "true";
defparam \peff7_int[2]~I .lut_mask = "ff00";
defparam \peff7_int[2]~I .operation_mode = "normal";
defparam \peff7_int[2]~I .output_mode = "reg_only";
defparam \peff7_int[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B35
flex10ke_lcell \p7ffd_int[6]~I (
// Equation(s):
// p7ffd_int_6 = DFFEA(\d[6]~1 , GLOBAL(\clkz_in~dataout ), rst_out_n, , \always18~43 , , )

        .dataa(\always18~43 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_6),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(p7ffd_int_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \p7ffd_int[6]~I .clock_enable_mode = "true";
defparam \p7ffd_int[6]~I .lut_mask = "ff00";
defparam \p7ffd_int[6]~I .operation_mode = "normal";
defparam \p7ffd_int[6]~I .output_mode = "reg_only";
defparam \p7ffd_int[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D8
flex10ke_lcell \atm_cpm_n~I (
// Equation(s):
// atm_cpm_n = DFFEA(\a~dataout [9], GLOBAL(\fclk~dataout ), rst_out_n, , \atm77_wr_fclk~22 , , )

        .dataa(\atm77_wr_fclk~22 ),
        .datab(vcc),
        .datac(vcc),
        .datad(a_9),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(atm_cpm_n),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \atm_cpm_n~I .clock_enable_mode = "true";
defparam \atm_cpm_n~I .lut_mask = "ff00";
defparam \atm_cpm_n~I .operation_mode = "normal";
defparam \atm_cpm_n~I .output_mode = "reg_only";
defparam \atm_cpm_n~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F3
flex10ke_lcell \peff7_int[0]~I (
// Equation(s):
// peff7_int_0 = DFFEA(\d[0]~7 , GLOBAL(\clkz_in~dataout ), rst_out_n, , \always19~42 , , )

        .dataa(\always19~42 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(peff7_int_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \peff7_int[0]~I .clock_enable_mode = "true";
defparam \peff7_int[0]~I .lut_mask = "ff00";
defparam \peff7_int[0]~I .operation_mode = "normal";
defparam \peff7_int[0]~I .output_mode = "reg_only";
defparam \peff7_int[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_F6
flex10ke_lcell \border[1]~I (
// Equation(s):
// border_1 = DFFEA(\d[1]~6 , GLOBAL(\clkz_in~dataout ), , , portfe_wr, , )

        .dataa(portfe_wr),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(border_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \border[1]~I .clock_enable_mode = "true";
defparam \border[1]~I .lut_mask = "ff00";
defparam \border[1]~I .operation_mode = "normal";
defparam \border[1]~I .output_mode = "reg_only";
defparam \border[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_F6
flex10ke_lcell \border[2]~I (
// Equation(s):
// border_2 = DFFEA(\d[2]~5 , GLOBAL(\clkz_in~dataout ), , , portfe_wr, , )

        .dataa(portfe_wr),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(border_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \border[2]~I .clock_enable_mode = "true";
defparam \border[2]~I .lut_mask = "ff00";
defparam \border[2]~I .operation_mode = "normal";
defparam \border[2]~I .output_mode = "reg_only";
defparam \border[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_F6
flex10ke_lcell \border[0]~I (
// Equation(s):
// border_0 = DFFEA(\d[0]~7 , GLOBAL(\clkz_in~dataout ), , , portfe_wr, , )

        .dataa(portfe_wr),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(border_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \border[0]~I .clock_enable_mode = "true";
defparam \border[0]~I .lut_mask = "ff00";
defparam \border[0]~I .operation_mode = "normal";
defparam \border[0]~I .output_mode = "reg_only";
defparam \border[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D5
flex10ke_lcell \port_wr~I (
// Equation(s):
// port_wr = DFFEA(!iowr_reg & !\iorq_n~dataout  & !\wr_n~dataout , GLOBAL(\clkz_in~dataout ), , , , , )

        .dataa(vcc),
        .datab(iowr_reg),
        .datac(iorq_n),
        .datad(wr_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(port_wr),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \port_wr~I .clock_enable_mode = "false";
defparam \port_wr~I .lut_mask = "0003";
defparam \port_wr~I .operation_mode = "normal";
defparam \port_wr~I .output_mode = "reg_only";
defparam \port_wr~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B35
flex10ke_lcell \vg_wrFF~I (
// Equation(s):
// vg_wrFF = port_wr & always0

        .dataa(vcc),
        .datab(vcc),
        .datac(port_wr),
        .datad(always0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(vg_wrFF),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vg_wrFF~I .clock_enable_mode = "false";
defparam \vg_wrFF~I .lut_mask = "f000";
defparam \vg_wrFF~I .operation_mode = "normal";
defparam \vg_wrFF~I .output_mode = "comb_only";
defparam \vg_wrFF~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_J16
flex10ke_lcell \sd_stgl[2]~I (
// Equation(s):
// sd_stgl_2 = DFFEA(sd_stgl_1, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(sd_stgl_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(sd_stgl_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sd_stgl[2]~I .clock_enable_mode = "false";
defparam \sd_stgl[2]~I .lut_mask = "ff00";
defparam \sd_stgl[2]~I .operation_mode = "normal";
defparam \sd_stgl[2]~I .output_mode = "reg_only";
defparam \sd_stgl[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_J16
flex10ke_lcell \sd_stgl[1]~I (
// Equation(s):
// sd_stgl_1 = DFFEA(sd_stgl[0], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(sd_stgl[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(sd_stgl_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sd_stgl[1]~I .clock_enable_mode = "false";
defparam \sd_stgl[1]~I .lut_mask = "ff00";
defparam \sd_stgl[1]~I .operation_mode = "normal";
defparam \sd_stgl[1]~I .output_mode = "reg_only";
defparam \sd_stgl[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_J16
flex10ke_lcell \sd_start~I (
// Equation(s):
// sd_start = sd_stgl_1 $ sd_stgl_2

        .dataa(vcc),
        .datab(vcc),
        .datac(sd_stgl_1),
        .datad(sd_stgl_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(sd_start),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sd_start~I .clock_enable_mode = "false";
defparam \sd_start~I .lut_mask = "0ff0";
defparam \sd_start~I .operation_mode = "normal";
defparam \sd_start~I .output_mode = "comb_only";
defparam \sd_start~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D1
flex10ke_lcell \wait_write[0]~I (
// Equation(s):
// wait_write_0 = DFFEA(\d[0]~7 , GLOBAL(\clkz_in~dataout ), , , \wait_write~358 , , )

        .dataa(\wait_write~358 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_write_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_write[0]~I .clock_enable_mode = "true";
defparam \wait_write[0]~I .lut_mask = "ff00";
defparam \wait_write[0]~I .operation_mode = "normal";
defparam \wait_write[0]~I .output_mode = "reg_only";
defparam \wait_write[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D1
flex10ke_lcell \gluclock_addr[0]~I (
// Equation(s):
// gluclock_addr_0 = DFFEA(\d[0]~7 , GLOBAL(\clkz_in~dataout ), , , \gluclock_addr[0]~56 , , )

        .dataa(\gluclock_addr[0]~56 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(gluclock_addr_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \gluclock_addr[0]~I .clock_enable_mode = "true";
defparam \gluclock_addr[0]~I .lut_mask = "ff00";
defparam \gluclock_addr[0]~I .operation_mode = "normal";
defparam \gluclock_addr[0]~I .output_mode = "reg_only";
defparam \gluclock_addr[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D13
flex10ke_lcell \comport_addr[0]~I (
// Equation(s):
// comport_addr_0 = DFFEA(\a~dataout [8], GLOBAL(\clkz_in~dataout ), , , wait_start_comport, , )

        .dataa(wait_start_comport),
        .datab(vcc),
        .datac(vcc),
        .datad(a_8),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(comport_addr_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \comport_addr[0]~I .clock_enable_mode = "true";
defparam \comport_addr[0]~I .lut_mask = "ff00";
defparam \comport_addr[0]~I .operation_mode = "normal";
defparam \comport_addr[0]~I .output_mode = "reg_only";
defparam \comport_addr[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D13
flex10ke_lcell \wait_start_comport~22_I (
// Equation(s):
// wait_start_comport = \Equal16~50  & (port_rd # port_wr)

        .dataa(vcc),
        .datab(port_rd),
        .datac(port_wr),
        .datad(\Equal16~50 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(wait_start_comport),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_start_comport~22_I .clock_enable_mode = "false";
defparam \wait_start_comport~22_I .lut_mask = "fc00";
defparam \wait_start_comport~22_I .operation_mode = "normal";
defparam \wait_start_comport~22_I .output_mode = "comb_only";
defparam \wait_start_comport~22_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D13
flex10ke_lcell \wait_start_gluclock~58_I (
// Equation(s):
// wait_start_gluclock = !\a~dataout [14] & \wait_start_gluclock~57  & (port_rd # port_wr)

        .dataa(a_14),
        .datab(port_rd),
        .datac(port_wr),
        .datad(\wait_start_gluclock~57 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(wait_start_gluclock),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_start_gluclock~58_I .clock_enable_mode = "false";
defparam \wait_start_gluclock~58_I .lut_mask = "5400";
defparam \wait_start_gluclock~58_I .operation_mode = "normal";
defparam \wait_start_gluclock~58_I .output_mode = "comb_only";
defparam \wait_start_gluclock~58_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D8
flex10ke_lcell \atmF7_wr_fclk~I (
// Equation(s):
// atmF7_wr_fclk = port_wr_fclk & shadow & \a~dataout [8] & \Equal13~23 

        .dataa(port_wr_fclk),
        .datab(shadow),
        .datac(a_8),
        .datad(\Equal13~23 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(atmF7_wr_fclk),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \atmF7_wr_fclk~I .clock_enable_mode = "false";
defparam \atmF7_wr_fclk~I .lut_mask = "8000";
defparam \atmF7_wr_fclk~I .operation_mode = "normal";
defparam \atmF7_wr_fclk~I .output_mode = "comb_only";
defparam \atmF7_wr_fclk~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_B7
flex10ke_lcell \pre_bc1~13_I (
// Equation(s):
// pre_bc1 = \a~dataout [15] & \a~dataout [14]

        .dataa(vcc),
        .datab(vcc),
        .datac(a_15),
        .datad(a_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(pre_bc1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \pre_bc1~13_I .clock_enable_mode = "false";
defparam \pre_bc1~13_I .lut_mask = "f000";
defparam \pre_bc1~13_I .operation_mode = "normal";
defparam \pre_bc1~13_I .output_mode = "comb_only";
defparam \pre_bc1~13_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F15
flex10ke_lcell \p7ffd_int[3]~I (
// Equation(s):
// p7ffd_int_3 = DFFEA(\d[3]~4 , GLOBAL(\clkz_in~dataout ), rst_out_n, , \always18~43 , , )

        .dataa(\always18~43 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(p7ffd_int_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \p7ffd_int[3]~I .clock_enable_mode = "true";
defparam \p7ffd_int[3]~I .lut_mask = "ff00";
defparam \p7ffd_int[3]~I .operation_mode = "normal";
defparam \p7ffd_int[3]~I .output_mode = "reg_only";
defparam \p7ffd_int[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D6
flex10ke_lcell \wait_write[1]~I (
// Equation(s):
// wait_write_1 = DFFEA(\d[1]~6 , GLOBAL(\clkz_in~dataout ), , , \wait_write~358 , , )

        .dataa(\wait_write~358 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_write_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_write[1]~I .clock_enable_mode = "true";
defparam \wait_write[1]~I .lut_mask = "ff00";
defparam \wait_write[1]~I .operation_mode = "normal";
defparam \wait_write[1]~I .output_mode = "reg_only";
defparam \wait_write[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D6
flex10ke_lcell \gluclock_addr[1]~I (
// Equation(s):
// gluclock_addr_1 = DFFEA(\d[1]~6 , GLOBAL(\clkz_in~dataout ), , , \gluclock_addr[0]~56 , , )

        .dataa(\gluclock_addr[0]~56 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(gluclock_addr_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \gluclock_addr[1]~I .clock_enable_mode = "true";
defparam \gluclock_addr[1]~I .lut_mask = "ff00";
defparam \gluclock_addr[1]~I .operation_mode = "normal";
defparam \gluclock_addr[1]~I .output_mode = "reg_only";
defparam \gluclock_addr[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D6
flex10ke_lcell \comport_addr[1]~I (
// Equation(s):
// comport_addr_1 = DFFEA(\a~dataout [9], GLOBAL(\clkz_in~dataout ), , , wait_start_comport, , )

        .dataa(wait_start_comport),
        .datab(vcc),
        .datac(vcc),
        .datad(a_9),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(comport_addr_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \comport_addr[1]~I .clock_enable_mode = "true";
defparam \comport_addr[1]~I .lut_mask = "ff00";
defparam \comport_addr[1]~I .operation_mode = "normal";
defparam \comport_addr[1]~I .output_mode = "reg_only";
defparam \comport_addr[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H14
flex10ke_lcell \Selector7~1858_I (
// Equation(s):
// Selector7 = !\a~dataout [5] & (\ide_d[0]~15  # !\Selector7~1856 ) # !\Selector7~1897 

        .dataa(\Selector7~1897 ),
        .datab(a_5),
        .datac(\Selector7~1856 ),
        .datad(ide_d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector7),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector7~1858_I .clock_enable_mode = "false";
defparam \Selector7~1858_I .lut_mask = "7757";
defparam \Selector7~1858_I .operation_mode = "normal";
defparam \Selector7~1858_I .output_mode = "comb_only";
defparam \Selector7~1858_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_E26
flex10ke_lcell \Selector2~1452_I (
// Equation(s):
// Selector2 = \Selector2~1449  # \Selector2~1451  & \Equal9~59  # !\Equal0~46 

        .dataa(\Equal0~46 ),
        .datab(\Selector2~1451 ),
        .datac(\Equal9~59 ),
        .datad(\Selector2~1449 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector2),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector2~1452_I .clock_enable_mode = "false";
defparam \Selector2~1452_I .lut_mask = "ffd5";
defparam \Selector2~1452_I .operation_mode = "normal";
defparam \Selector2~1452_I .output_mode = "comb_only";
defparam \Selector2~1452_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_E33
flex10ke_lcell \Selector1~1384_I (
// Equation(s):
// Selector1 = \Selector1~1381  # \Selector1~1379  # \Selector1~1383  & \Equal9~59 

        .dataa(\Selector1~1383 ),
        .datab(\Equal9~59 ),
        .datac(\Selector1~1381 ),
        .datad(\Selector1~1379 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector1~1384_I .clock_enable_mode = "false";
defparam \Selector1~1384_I .lut_mask = "fff8";
defparam \Selector1~1384_I .operation_mode = "normal";
defparam \Selector1~1384_I .output_mode = "comb_only";
defparam \Selector1~1384_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H24
flex10ke_lcell \Selector0~1454_I (
// Equation(s):
// Selector0 = \Selector0~1451  # \a~dataout [6] & (\Selector0~1453  # !\a~dataout [7])

        .dataa(a_7),
        .datab(\Selector0~1453 ),
        .datac(a_6),
        .datad(\Selector0~1451 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector0~1454_I .clock_enable_mode = "false";
defparam \Selector0~1454_I .lut_mask = "ffd0";
defparam \Selector0~1454_I .operation_mode = "normal";
defparam \Selector0~1454_I .output_mode = "comb_only";
defparam \Selector0~1454_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_B8
flex10ke_lcell \ideout[0]~64_I (
// Equation(s):
// ideout_0 = ide_wrlo_latch & (idewrreg[0]) # !ide_wrlo_latch & \d[0]~7 

        .dataa(vcc),
        .datab(ide_wrlo_latch),
        .datac(d_0),
        .datad(idewrreg[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ideout_0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ideout[0]~64_I .clock_enable_mode = "false";
defparam \ideout[0]~64_I .lut_mask = "fc30";
defparam \ideout[0]~64_I .operation_mode = "normal";
defparam \ideout[0]~64_I .output_mode = "comb_only";
defparam \ideout[0]~64_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B9
flex10ke_lcell \ideout[1]~65_I (
// Equation(s):
// ideout_1 = ide_wrlo_latch & (idewrreg[1]) # !ide_wrlo_latch & \d[1]~6 

        .dataa(vcc),
        .datab(ide_wrlo_latch),
        .datac(d_1),
        .datad(idewrreg[1]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ideout_1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ideout[1]~65_I .clock_enable_mode = "false";
defparam \ideout[1]~65_I .lut_mask = "fc30";
defparam \ideout[1]~65_I .operation_mode = "normal";
defparam \ideout[1]~65_I .output_mode = "comb_only";
defparam \ideout[1]~65_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_B12
flex10ke_lcell \ideout[2]~66_I (
// Equation(s):
// ideout_2 = ide_wrlo_latch & (idewrreg[2]) # !ide_wrlo_latch & \d[2]~5 

        .dataa(vcc),
        .datab(ide_wrlo_latch),
        .datac(d_2),
        .datad(idewrreg[2]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ideout_2),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ideout[2]~66_I .clock_enable_mode = "false";
defparam \ideout[2]~66_I .lut_mask = "fc30";
defparam \ideout[2]~66_I .operation_mode = "normal";
defparam \ideout[2]~66_I .output_mode = "comb_only";
defparam \ideout[2]~66_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B14
flex10ke_lcell \ideout[3]~67_I (
// Equation(s):
// ideout_3 = ide_wrlo_latch & (idewrreg[3]) # !ide_wrlo_latch & \d[3]~4 

        .dataa(vcc),
        .datab(ide_wrlo_latch),
        .datac(d_3),
        .datad(idewrreg[3]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ideout_3),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ideout[3]~67_I .clock_enable_mode = "false";
defparam \ideout[3]~67_I .lut_mask = "fc30";
defparam \ideout[3]~67_I .operation_mode = "normal";
defparam \ideout[3]~67_I .output_mode = "comb_only";
defparam \ideout[3]~67_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B14
flex10ke_lcell \ideout[4]~68_I (
// Equation(s):
// ideout_4 = ide_wrlo_latch & (idewrreg[4]) # !ide_wrlo_latch & \d[4]~3 

        .dataa(vcc),
        .datab(ide_wrlo_latch),
        .datac(d_4),
        .datad(idewrreg[4]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ideout_4),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ideout[4]~68_I .clock_enable_mode = "false";
defparam \ideout[4]~68_I .lut_mask = "fc30";
defparam \ideout[4]~68_I .operation_mode = "normal";
defparam \ideout[4]~68_I .output_mode = "comb_only";
defparam \ideout[4]~68_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B16
flex10ke_lcell \ideout[5]~69_I (
// Equation(s):
// ideout_5 = ide_wrlo_latch & (idewrreg[5]) # !ide_wrlo_latch & \d[5]~2 

        .dataa(vcc),
        .datab(ide_wrlo_latch),
        .datac(d_5),
        .datad(idewrreg[5]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ideout_5),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ideout[5]~69_I .clock_enable_mode = "false";
defparam \ideout[5]~69_I .lut_mask = "fc30";
defparam \ideout[5]~69_I .operation_mode = "normal";
defparam \ideout[5]~69_I .output_mode = "comb_only";
defparam \ideout[5]~69_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D20
flex10ke_lcell \ideout[6]~70_I (
// Equation(s):
// ideout_6 = ide_wrlo_latch & (idewrreg[6]) # !ide_wrlo_latch & \d[6]~1 

        .dataa(vcc),
        .datab(ide_wrlo_latch),
        .datac(d_6),
        .datad(idewrreg[6]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ideout_6),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ideout[6]~70_I .clock_enable_mode = "false";
defparam \ideout[6]~70_I .lut_mask = "fc30";
defparam \ideout[6]~70_I .operation_mode = "normal";
defparam \ideout[6]~70_I .output_mode = "comb_only";
defparam \ideout[6]~70_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D20
flex10ke_lcell \ideout[7]~71_I (
// Equation(s):
// ideout_7 = ide_wrlo_latch & (idewrreg[7]) # !ide_wrlo_latch & \d[7]~0 

        .dataa(vcc),
        .datab(ide_wrlo_latch),
        .datac(d_7),
        .datad(idewrreg[7]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ideout_7),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ideout[7]~71_I .clock_enable_mode = "false";
defparam \ideout[7]~71_I .lut_mask = "fc30";
defparam \ideout[7]~71_I .operation_mode = "normal";
defparam \ideout[7]~71_I .output_mode = "comb_only";
defparam \ideout[7]~71_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_E22
flex10ke_lcell \ideout[8]~72_I (
// Equation(s):
// ideout_8 = ide_wrhi_latch & (idewrreg[8]) # !ide_wrhi_latch & \d[0]~7 

        .dataa(vcc),
        .datab(ide_wrhi_latch),
        .datac(d_0),
        .datad(idewrreg[8]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ideout_8),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ideout[8]~72_I .clock_enable_mode = "false";
defparam \ideout[8]~72_I .lut_mask = "fc30";
defparam \ideout[8]~72_I .operation_mode = "normal";
defparam \ideout[8]~72_I .output_mode = "comb_only";
defparam \ideout[8]~72_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_E20
flex10ke_lcell \ideout[9]~73_I (
// Equation(s):
// ideout_9 = ide_wrhi_latch & (idewrreg[9]) # !ide_wrhi_latch & \d[1]~6 

        .dataa(vcc),
        .datab(ide_wrhi_latch),
        .datac(d_1),
        .datad(idewrreg[9]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ideout_9),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ideout[9]~73_I .clock_enable_mode = "false";
defparam \ideout[9]~73_I .lut_mask = "fc30";
defparam \ideout[9]~73_I .operation_mode = "normal";
defparam \ideout[9]~73_I .output_mode = "comb_only";
defparam \ideout[9]~73_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B17
flex10ke_lcell \ideout[10]~74_I (
// Equation(s):
// ideout_10 = ide_wrhi_latch & (idewrreg[10]) # !ide_wrhi_latch & \d[2]~5 

        .dataa(vcc),
        .datab(ide_wrhi_latch),
        .datac(d_2),
        .datad(idewrreg[10]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ideout_10),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ideout[10]~74_I .clock_enable_mode = "false";
defparam \ideout[10]~74_I .lut_mask = "fc30";
defparam \ideout[10]~74_I .operation_mode = "normal";
defparam \ideout[10]~74_I .output_mode = "comb_only";
defparam \ideout[10]~74_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_C15
flex10ke_lcell \ideout[11]~75_I (
// Equation(s):
// ideout_11 = ide_wrhi_latch & (idewrreg[11]) # !ide_wrhi_latch & \d[3]~4 

        .dataa(vcc),
        .datab(ide_wrhi_latch),
        .datac(d_3),
        .datad(idewrreg[11]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ideout_11),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ideout[11]~75_I .clock_enable_mode = "false";
defparam \ideout[11]~75_I .lut_mask = "fc30";
defparam \ideout[11]~75_I .operation_mode = "normal";
defparam \ideout[11]~75_I .output_mode = "comb_only";
defparam \ideout[11]~75_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B14
flex10ke_lcell \ideout[12]~76_I (
// Equation(s):
// ideout_12 = ide_wrhi_latch & (idewrreg[12]) # !ide_wrhi_latch & \d[4]~3 

        .dataa(vcc),
        .datab(ide_wrhi_latch),
        .datac(d_4),
        .datad(idewrreg[12]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ideout_12),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ideout[12]~76_I .clock_enable_mode = "false";
defparam \ideout[12]~76_I .lut_mask = "fc30";
defparam \ideout[12]~76_I .operation_mode = "normal";
defparam \ideout[12]~76_I .output_mode = "comb_only";
defparam \ideout[12]~76_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_C11
flex10ke_lcell \ideout[13]~77_I (
// Equation(s):
// ideout_13 = ide_wrhi_latch & (idewrreg[13]) # !ide_wrhi_latch & \d[5]~2 

        .dataa(vcc),
        .datab(ide_wrhi_latch),
        .datac(d_5),
        .datad(idewrreg[13]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ideout_13),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ideout[13]~77_I .clock_enable_mode = "false";
defparam \ideout[13]~77_I .lut_mask = "fc30";
defparam \ideout[13]~77_I .operation_mode = "normal";
defparam \ideout[13]~77_I .output_mode = "comb_only";
defparam \ideout[13]~77_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B10
flex10ke_lcell \ideout[14]~78_I (
// Equation(s):
// ideout_14 = ide_wrhi_latch & (idewrreg[14]) # !ide_wrhi_latch & \d[6]~1 

        .dataa(vcc),
        .datab(ide_wrhi_latch),
        .datac(d_6),
        .datad(idewrreg[14]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ideout_14),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ideout[14]~78_I .clock_enable_mode = "false";
defparam \ideout[14]~78_I .lut_mask = "fc30";
defparam \ideout[14]~78_I .operation_mode = "normal";
defparam \ideout[14]~78_I .output_mode = "comb_only";
defparam \ideout[14]~78_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B10
flex10ke_lcell \ideout[15]~79_I (
// Equation(s):
// ideout_15 = ide_wrhi_latch & (idewrreg[15]) # !ide_wrhi_latch & \d[7]~0 

        .dataa(vcc),
        .datab(ide_wrhi_latch),
        .datac(d_7),
        .datad(idewrreg[15]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ideout_15),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ideout[15]~79_I .clock_enable_mode = "false";
defparam \ideout[15]~79_I .lut_mask = "fc30";
defparam \ideout[15]~79_I .operation_mode = "normal";
defparam \ideout[15]~79_I .output_mode = "comb_only";
defparam \ideout[15]~79_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A1
flex10ke_lcell \peff7_int[4]~I (
// Equation(s):
// peff7_int_4 = DFFEA(\d[4]~3 , GLOBAL(\clkz_in~dataout ), rst_out_n, , \always19~42 , , )

        .dataa(\always19~42 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(peff7_int_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \peff7_int[4]~I .clock_enable_mode = "true";
defparam \peff7_int[4]~I .lut_mask = "ff00";
defparam \peff7_int[4]~I .operation_mode = "normal";
defparam \peff7_int[4]~I .output_mode = "reg_only";
defparam \peff7_int[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_F3
flex10ke_lcell \peff7_int[5]~I (
// Equation(s):
// peff7_int_5 = DFFEA(\d[5]~2 , GLOBAL(\clkz_in~dataout ), rst_out_n, , \always19~42 , , )

        .dataa(\always19~42 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_5),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(peff7_int_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \peff7_int[5]~I .clock_enable_mode = "true";
defparam \peff7_int[5]~I .lut_mask = "ff00";
defparam \peff7_int[5]~I .operation_mode = "normal";
defparam \peff7_int[5]~I .output_mode = "reg_only";
defparam \peff7_int[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D28
flex10ke_lcell \wait_write[2]~I (
// Equation(s):
// wait_write_2 = DFFEA(\d[2]~5 , GLOBAL(\clkz_in~dataout ), , , \wait_write~358 , , )

        .dataa(\wait_write~358 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_write_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_write[2]~I .clock_enable_mode = "true";
defparam \wait_write[2]~I .lut_mask = "ff00";
defparam \wait_write[2]~I .operation_mode = "normal";
defparam \wait_write[2]~I .output_mode = "reg_only";
defparam \wait_write[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D25
flex10ke_lcell \gluclock_addr[2]~I (
// Equation(s):
// gluclock_addr_2 = DFFEA(\d[2]~5 , GLOBAL(\clkz_in~dataout ), , , \gluclock_addr[0]~56 , , )

        .dataa(\gluclock_addr[0]~56 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(gluclock_addr_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \gluclock_addr[2]~I .clock_enable_mode = "true";
defparam \gluclock_addr[2]~I .lut_mask = "ff00";
defparam \gluclock_addr[2]~I .operation_mode = "normal";
defparam \gluclock_addr[2]~I .output_mode = "reg_only";
defparam \gluclock_addr[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D6
flex10ke_lcell \comport_addr[2]~I (
// Equation(s):
// comport_addr_2 = DFFEA(\a~dataout [10], GLOBAL(\clkz_in~dataout ), , , wait_start_comport, , )

        .dataa(wait_start_comport),
        .datab(vcc),
        .datac(vcc),
        .datad(a_10),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(comport_addr_2),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \comport_addr[2]~I .clock_enable_mode = "true";
defparam \comport_addr[2]~I .lut_mask = "ff00";
defparam \comport_addr[2]~I .operation_mode = "normal";
defparam \comport_addr[2]~I .output_mode = "reg_only";
defparam \comport_addr[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_F3
flex10ke_lcell \p7ffd_int[7]~I (
// Equation(s):
// p7ffd_int_7 = DFFEA(\d[7]~0 , GLOBAL(\clkz_in~dataout ), rst_out_n, , \always18~43 , , )

        .dataa(\always18~43 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_7),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(p7ffd_int_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \p7ffd_int[7]~I .clock_enable_mode = "true";
defparam \p7ffd_int[7]~I .lut_mask = "ff00";
defparam \p7ffd_int[7]~I .operation_mode = "normal";
defparam \p7ffd_int[7]~I .output_mode = "reg_only";
defparam \p7ffd_int[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D28
flex10ke_lcell \wait_write[3]~I (
// Equation(s):
// wait_write_3 = DFFEA(\d[3]~4 , GLOBAL(\clkz_in~dataout ), , , \wait_write~358 , , )

        .dataa(\wait_write~358 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_write_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_write[3]~I .clock_enable_mode = "true";
defparam \wait_write[3]~I .lut_mask = "ff00";
defparam \wait_write[3]~I .operation_mode = "normal";
defparam \wait_write[3]~I .output_mode = "reg_only";
defparam \wait_write[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D25
flex10ke_lcell \gluclock_addr[3]~I (
// Equation(s):
// gluclock_addr_3 = DFFEA(\d[3]~4 , GLOBAL(\clkz_in~dataout ), , , \gluclock_addr[0]~56 , , )

        .dataa(\gluclock_addr[0]~56 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(gluclock_addr_3),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \gluclock_addr[3]~I .clock_enable_mode = "true";
defparam \gluclock_addr[3]~I .lut_mask = "ff00";
defparam \gluclock_addr[3]~I .operation_mode = "normal";
defparam \gluclock_addr[3]~I .output_mode = "reg_only";
defparam \gluclock_addr[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H36
flex10ke_lcell \Selector0~1469_I (
// Equation(s):
// Selector01 = (\a~dataout [7] & \a~dataout [6] & (\a~dataout [2] $ !\a~dataout [5])) & CASCADE(\Selector0~1481 )

        .dataa(a_2),
        .datab(a_5),
        .datac(a_7),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector0~1481 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector01),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector0~1469_I .clock_enable_mode = "false";
defparam \Selector0~1469_I .lut_mask = "9000";
defparam \Selector0~1469_I .operation_mode = "normal";
defparam \Selector0~1469_I .output_mode = "comb_only";
defparam \Selector0~1469_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D24
flex10ke_lcell \dataout~113_I (
// Equation(s):
// dataout = (porthit & (!\Equal19~30  & \Equal20~46  # !shadow)) & CASCADE(\dataout~116 )

        .dataa(shadow),
        .datab(\Equal19~30 ),
        .datac(\Equal20~46 ),
        .datad(porthit),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\dataout~116 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(dataout),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \dataout~113_I .clock_enable_mode = "false";
defparam \dataout~113_I .lut_mask = "7500";
defparam \dataout~113_I .operation_mode = "normal";
defparam \dataout~113_I .output_mode = "comb_only";
defparam \dataout~113_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H5
flex10ke_lcell \Selector7~1898_I (
// Equation(s):
// Selector71 = (\a~dataout [0] # \iderdeven~0  & !idehiin[0] # !\iderdeven~0  & (!\ide_d[0]~15 )) & CASCADE(\Selector7~1924 )

        .dataa(idehiin[0]),
        .datab(ide_d_0),
        .datac(\iderdeven~0 ),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector7~1924 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector71),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector7~1898_I .clock_enable_mode = "false";
defparam \Selector7~1898_I .lut_mask = "ff53";
defparam \Selector7~1898_I .operation_mode = "normal";
defparam \Selector7~1898_I .output_mode = "comb_only";
defparam \Selector7~1898_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_E35
flex10ke_lcell \Selector7~1899_I (
// Equation(s):
// Selector72 = (\a~dataout [6] # !kj_data_0 & \Equal1~42  & \a~dataout [0]) & CASCADE(\Selector7~1931 )

        .dataa(kj_data_0),
        .datab(\Equal1~42 ),
        .datac(a_0),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector7~1931 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector72),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector7~1899_I .clock_enable_mode = "false";
defparam \Selector7~1899_I .lut_mask = "ff40";
defparam \Selector7~1899_I .operation_mode = "normal";
defparam \Selector7~1899_I .output_mode = "comb_only";
defparam \Selector7~1899_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H32
flex10ke_lcell \Selector6~1408_I (
// Equation(s):
// Selector6 = (\a~dataout [0] # \iderdeven~0  & !idehiin[1] # !\iderdeven~0  & (!\ide_d[1]~14 )) & CASCADE(\Selector6~1424 )

        .dataa(idehiin[1]),
        .datab(ide_d_1),
        .datac(\iderdeven~0 ),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector6~1424 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector6),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector6~1408_I .clock_enable_mode = "false";
defparam \Selector6~1408_I .lut_mask = "ff53";
defparam \Selector6~1408_I .operation_mode = "normal";
defparam \Selector6~1408_I .output_mode = "comb_only";
defparam \Selector6~1408_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H33
flex10ke_lcell \Selector6~1409_I (
// Equation(s):
// Selector61 = (\a~dataout [6] # !kj_data_1 & \Equal1~42  & \a~dataout [0]) & CASCADE(\Selector6~1430 )

        .dataa(kj_data_1),
        .datab(\Equal1~42 ),
        .datac(a_0),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector6~1430 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector61),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector6~1409_I .clock_enable_mode = "false";
defparam \Selector6~1409_I .lut_mask = "ff40";
defparam \Selector6~1409_I .operation_mode = "normal";
defparam \Selector6~1409_I .output_mode = "comb_only";
defparam \Selector6~1409_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H32
flex10ke_lcell \Selector5~1408_I (
// Equation(s):
// Selector5 = (\a~dataout [0] # \iderdeven~0  & !idehiin[2] # !\iderdeven~0  & (!\ide_d[2]~13 )) & CASCADE(\Selector5~1424 )

        .dataa(idehiin[2]),
        .datab(ide_d_2),
        .datac(\iderdeven~0 ),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector5~1424 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector5),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector5~1408_I .clock_enable_mode = "false";
defparam \Selector5~1408_I .lut_mask = "ff53";
defparam \Selector5~1408_I .operation_mode = "normal";
defparam \Selector5~1408_I .output_mode = "comb_only";
defparam \Selector5~1408_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_E34
flex10ke_lcell \Selector5~1409_I (
// Equation(s):
// Selector51 = (\a~dataout [6] # !kj_data_2 & \Equal1~42  & \a~dataout [0]) & CASCADE(\Selector5~1430 )

        .dataa(kj_data_2),
        .datab(\Equal1~42 ),
        .datac(a_0),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector5~1430 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector51),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector5~1409_I .clock_enable_mode = "false";
defparam \Selector5~1409_I .lut_mask = "ff40";
defparam \Selector5~1409_I .operation_mode = "normal";
defparam \Selector5~1409_I .output_mode = "comb_only";
defparam \Selector5~1409_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H17
flex10ke_lcell \Selector4~1408_I (
// Equation(s):
// Selector4 = (\a~dataout [0] # \iderdeven~0  & !idehiin[3] # !\iderdeven~0  & (!\ide_d[3]~12 )) & CASCADE(\Selector4~1424 )

        .dataa(idehiin[3]),
        .datab(ide_d_3),
        .datac(\iderdeven~0 ),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector4~1424 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector4),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector4~1408_I .clock_enable_mode = "false";
defparam \Selector4~1408_I .lut_mask = "ff53";
defparam \Selector4~1408_I .operation_mode = "normal";
defparam \Selector4~1408_I .output_mode = "comb_only";
defparam \Selector4~1408_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_E29
flex10ke_lcell \Selector4~1409_I (
// Equation(s):
// Selector41 = (\a~dataout [6] # !kj_data_3 & \Equal1~42  & \a~dataout [0]) & CASCADE(\Selector4~1430 )

        .dataa(kj_data_3),
        .datab(\Equal1~42 ),
        .datac(a_0),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector4~1430 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector41),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector4~1409_I .clock_enable_mode = "false";
defparam \Selector4~1409_I .lut_mask = "ff40";
defparam \Selector4~1409_I .operation_mode = "normal";
defparam \Selector4~1409_I .output_mode = "comb_only";
defparam \Selector4~1409_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H27
flex10ke_lcell \Selector3~1408_I (
// Equation(s):
// Selector3 = (\a~dataout [0] # \iderdeven~0  & !idehiin[4] # !\iderdeven~0  & (!\ide_d[4]~11 )) & CASCADE(\Selector3~1424 )

        .dataa(idehiin[4]),
        .datab(ide_d_4),
        .datac(\iderdeven~0 ),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector3~1424 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector3),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector3~1408_I .clock_enable_mode = "false";
defparam \Selector3~1408_I .lut_mask = "ff53";
defparam \Selector3~1408_I .operation_mode = "normal";
defparam \Selector3~1408_I .output_mode = "comb_only";
defparam \Selector3~1408_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A23
flex10ke_lcell \Selector3~1409_I (
// Equation(s):
// Selector31 = (\a~dataout [6] # !kj_data_4 & \Equal1~42  & \a~dataout [0]) & CASCADE(\Selector3~1430 )

        .dataa(kj_data_4),
        .datab(\Equal1~42 ),
        .datac(a_0),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector3~1430 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector31),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector3~1409_I .clock_enable_mode = "false";
defparam \Selector3~1409_I .lut_mask = "ff40";
defparam \Selector3~1409_I .operation_mode = "normal";
defparam \Selector3~1409_I .output_mode = "comb_only";
defparam \Selector3~1409_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H8
flex10ke_lcell \Selector2~1468_I (
// Equation(s):
// Selector21 = (\a~dataout [0] # \iderdeven~0  & !idehiin[5] # !\iderdeven~0  & (!\ide_d[5]~10 )) & CASCADE(\Selector2~1482 )

        .dataa(idehiin[5]),
        .datab(ide_d_5),
        .datac(\iderdeven~0 ),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector2~1482 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector21),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector2~1468_I .clock_enable_mode = "false";
defparam \Selector2~1468_I .lut_mask = "ff53";
defparam \Selector2~1468_I .operation_mode = "normal";
defparam \Selector2~1468_I .output_mode = "comb_only";
defparam \Selector2~1468_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H34
flex10ke_lcell \Selector1~1400_I (
// Equation(s):
// Selector11 = (\a~dataout [0] # \iderdeven~0  & !idehiin[6] # !\iderdeven~0  & (!\ide_d[6]~9 )) & CASCADE(\Selector1~1416 )

        .dataa(idehiin[6]),
        .datab(ide_d_6),
        .datac(\iderdeven~0 ),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector1~1416 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector11),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector1~1400_I .clock_enable_mode = "false";
defparam \Selector1~1400_I .lut_mask = "ff53";
defparam \Selector1~1400_I .operation_mode = "normal";
defparam \Selector1~1400_I .output_mode = "comb_only";
defparam \Selector1~1400_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H23
flex10ke_lcell \Selector0~1470_I (
// Equation(s):
// Selector02 = (\a~dataout [0] # \iderdeven~0  & !idehiin[7] # !\iderdeven~0  & (!\ide_d[7]~8 )) & CASCADE(\Selector0~1486 )

        .dataa(idehiin[7]),
        .datab(ide_d_7),
        .datac(\iderdeven~0 ),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector0~1486 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector02),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector0~1470_I .clock_enable_mode = "false";
defparam \Selector0~1470_I .lut_mask = "ff53";
defparam \Selector0~1470_I .operation_mode = "normal";
defparam \Selector0~1470_I .output_mode = "comb_only";
defparam \Selector0~1470_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D30
flex10ke_lcell \wait_write[4]~I (
// Equation(s):
// wait_write_4 = DFFEA(\d[4]~3 , GLOBAL(\clkz_in~dataout ), , , \wait_write~358 , , )

        .dataa(\wait_write~358 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_write_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_write[4]~I .clock_enable_mode = "true";
defparam \wait_write[4]~I .lut_mask = "ff00";
defparam \wait_write[4]~I .operation_mode = "normal";
defparam \wait_write[4]~I .output_mode = "reg_only";
defparam \wait_write[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D30
flex10ke_lcell \gluclock_addr[4]~I (
// Equation(s):
// gluclock_addr_4 = DFFEA(\d[4]~3 , GLOBAL(\clkz_in~dataout ), , , \gluclock_addr[0]~56 , , )

        .dataa(\gluclock_addr[0]~56 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(gluclock_addr_4),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \gluclock_addr[4]~I .clock_enable_mode = "true";
defparam \gluclock_addr[4]~I .lut_mask = "ff00";
defparam \gluclock_addr[4]~I .operation_mode = "normal";
defparam \gluclock_addr[4]~I .output_mode = "reg_only";
defparam \gluclock_addr[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D30
flex10ke_lcell \wait_write[5]~I (
// Equation(s):
// wait_write_5 = DFFEA(\d[5]~2 , GLOBAL(\clkz_in~dataout ), , , \wait_write~358 , , )

        .dataa(\wait_write~358 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_write_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_write[5]~I .clock_enable_mode = "true";
defparam \wait_write[5]~I .lut_mask = "ff00";
defparam \wait_write[5]~I .operation_mode = "normal";
defparam \wait_write[5]~I .output_mode = "reg_only";
defparam \wait_write[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D30
flex10ke_lcell \gluclock_addr[5]~I (
// Equation(s):
// gluclock_addr_5 = DFFEA(\d[5]~2 , GLOBAL(\clkz_in~dataout ), , , \gluclock_addr[0]~56 , , )

        .dataa(\gluclock_addr[0]~56 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(gluclock_addr_5),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \gluclock_addr[5]~I .clock_enable_mode = "true";
defparam \gluclock_addr[5]~I .lut_mask = "ff00";
defparam \gluclock_addr[5]~I .operation_mode = "normal";
defparam \gluclock_addr[5]~I .output_mode = "reg_only";
defparam \gluclock_addr[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D14
flex10ke_lcell \wait_write[6]~I (
// Equation(s):
// wait_write_6 = DFFEA(\d[6]~1 , GLOBAL(\clkz_in~dataout ), , , \wait_write~358 , , )

        .dataa(\wait_write~358 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_write_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_write[6]~I .clock_enable_mode = "true";
defparam \wait_write[6]~I .lut_mask = "ff00";
defparam \wait_write[6]~I .operation_mode = "normal";
defparam \wait_write[6]~I .output_mode = "reg_only";
defparam \wait_write[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D25
flex10ke_lcell \gluclock_addr[6]~I (
// Equation(s):
// gluclock_addr_6 = DFFEA(\d[6]~1 , GLOBAL(\clkz_in~dataout ), , , \gluclock_addr[0]~56 , , )

        .dataa(\gluclock_addr[0]~56 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(gluclock_addr_6),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \gluclock_addr[6]~I .clock_enable_mode = "true";
defparam \gluclock_addr[6]~I .lut_mask = "ff00";
defparam \gluclock_addr[6]~I .operation_mode = "normal";
defparam \gluclock_addr[6]~I .output_mode = "reg_only";
defparam \gluclock_addr[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D14
flex10ke_lcell \wait_write[7]~I (
// Equation(s):
// wait_write_7 = DFFEA(\d[7]~0 , GLOBAL(\clkz_in~dataout ), , , \wait_write~358 , , )

        .dataa(\wait_write~358 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_write_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_write[7]~I .clock_enable_mode = "true";
defparam \wait_write[7]~I .lut_mask = "ff00";
defparam \wait_write[7]~I .operation_mode = "normal";
defparam \wait_write[7]~I .output_mode = "reg_only";
defparam \wait_write[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D1
flex10ke_lcell \gluclock_addr[7]~I (
// Equation(s):
// gluclock_addr_7 = DFFEA(\d[7]~0 , GLOBAL(\clkz_in~dataout ), , , \gluclock_addr[0]~56 , , )

        .dataa(\gluclock_addr[0]~56 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(gluclock_addr_7),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \gluclock_addr[7]~I .clock_enable_mode = "true";
defparam \gluclock_addr[7]~I .lut_mask = "ff00";
defparam \gluclock_addr[7]~I .operation_mode = "normal";
defparam \gluclock_addr[7]~I .output_mode = "reg_only";
defparam \gluclock_addr[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D12
flex10ke_lcell \wait_rnw~I (
// Equation(s):
// wait_rnw = DFFEA(port_rd # !port_wr & wait_rnw, GLOBAL(\clkz_in~dataout ), , , , , )

        .dataa(vcc),
        .datab(port_wr),
        .datac(wait_rnw),
        .datad(port_rd),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(wait_rnw),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_rnw~I .clock_enable_mode = "false";
defparam \wait_rnw~I .lut_mask = "ff30";
defparam \wait_rnw~I .operation_mode = "normal";
defparam \wait_rnw~I .output_mode = "reg_only";
defparam \wait_rnw~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H28
flex10ke_lcell \Selector6~1407_I (
// Equation(s):
// Selector62 = (\a~dataout [7] & \a~dataout [6] & (\a~dataout [2] $ !\a~dataout [5])) & CASCADE(\Selector6~1419 )

        .dataa(a_2),
        .datab(a_5),
        .datac(a_7),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector6~1419 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector62),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector6~1407_I .clock_enable_mode = "false";
defparam \Selector6~1407_I .lut_mask = "9000";
defparam \Selector6~1407_I .operation_mode = "normal";
defparam \Selector6~1407_I .output_mode = "comb_only";
defparam \Selector6~1407_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H28
flex10ke_lcell \Selector5~1407_I (
// Equation(s):
// Selector52 = (\a~dataout [7] & \a~dataout [6] & (\a~dataout [2] $ !\a~dataout [5])) & CASCADE(\Selector5~1419 )

        .dataa(a_2),
        .datab(a_5),
        .datac(a_7),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector5~1419 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector52),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector5~1407_I .clock_enable_mode = "false";
defparam \Selector5~1407_I .lut_mask = "9000";
defparam \Selector5~1407_I .operation_mode = "normal";
defparam \Selector5~1407_I .output_mode = "comb_only";
defparam \Selector5~1407_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H14
flex10ke_lcell \Selector4~1407_I (
// Equation(s):
// Selector42 = (\a~dataout [7] & \a~dataout [6] & (\a~dataout [2] $ !\a~dataout [5])) & CASCADE(\Selector4~1419 )

        .dataa(a_2),
        .datab(a_5),
        .datac(a_7),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector4~1419 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector42),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector4~1407_I .clock_enable_mode = "false";
defparam \Selector4~1407_I .lut_mask = "9000";
defparam \Selector4~1407_I .operation_mode = "normal";
defparam \Selector4~1407_I .output_mode = "comb_only";
defparam \Selector4~1407_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H27
flex10ke_lcell \Selector3~1407_I (
// Equation(s):
// Selector32 = (\a~dataout [7] & \a~dataout [6] & (\a~dataout [2] $ !\a~dataout [5])) & CASCADE(\Selector3~1419 )

        .dataa(a_2),
        .datab(a_5),
        .datac(a_7),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector3~1419 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector32),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector3~1407_I .clock_enable_mode = "false";
defparam \Selector3~1407_I .lut_mask = "9000";
defparam \Selector3~1407_I .operation_mode = "normal";
defparam \Selector3~1407_I .output_mode = "comb_only";
defparam \Selector3~1407_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H14
flex10ke_lcell \Selector2~1467_I (
// Equation(s):
// Selector22 = (\a~dataout [7] & \a~dataout [6] & (\a~dataout [2] $ !\a~dataout [5])) & CASCADE(\Selector2~1477 )

        .dataa(a_2),
        .datab(a_5),
        .datac(a_7),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector2~1477 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector22),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector2~1467_I .clock_enable_mode = "false";
defparam \Selector2~1467_I .lut_mask = "9000";
defparam \Selector2~1467_I .operation_mode = "normal";
defparam \Selector2~1467_I .output_mode = "comb_only";
defparam \Selector2~1467_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H36
flex10ke_lcell \Selector1~1399_I (
// Equation(s):
// Selector12 = (\a~dataout [7] & \a~dataout [6] & (\a~dataout [2] $ !\a~dataout [5])) & CASCADE(\Selector1~1411 )

        .dataa(a_2),
        .datab(a_5),
        .datac(a_7),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector1~1411 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(Selector12),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector1~1399_I .clock_enable_mode = "false";
defparam \Selector1~1399_I .lut_mask = "9000";
defparam \Selector1~1399_I .operation_mode = "normal";
defparam \Selector1~1399_I .output_mode = "comb_only";
defparam \Selector1~1399_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_J9
flex10ke_lcell \sd_start~_wirecell_I (
// Equation(s):
// sd_start1 = !sd_start

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(sd_start),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(sd_start1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sd_start~_wirecell_I .clock_enable_mode = "false";
defparam \sd_start~_wirecell_I .lut_mask = "00ff";
defparam \sd_start~_wirecell_I .operation_mode = "normal";
defparam \sd_start~_wirecell_I .output_mode = "comb_only";
defparam \sd_start~_wirecell_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D4
flex10ke_lcell \ide_rd_n~66_I (
// Equation(s):
// ide_rd_n1 = \iorq_n~dataout  # \rd_n~dataout  # \iderdeven~0  # !\WideOr1~109 

        .dataa(\WideOr1~109 ),
        .datab(iorq_n),
        .datac(rd_n),
        .datad(\iderdeven~0 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ide_rd_n1),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ide_rd_n~66_I .clock_enable_mode = "false";
defparam \ide_rd_n~66_I .lut_mask = "fffd";
defparam \ide_rd_n~66_I .operation_mode = "normal";
defparam \ide_rd_n~66_I .output_mode = "comb_only";
defparam \ide_rd_n~66_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D18
flex10ke_lcell \iowr_reg_fclk[0]~I (
// Equation(s):
// iowr_reg_fclk[0] = DFFEA(!\iorq_n~dataout  & !\wr_n~dataout , GLOBAL(\fclk~dataout ), , , zpos, , )

        .dataa(zpos),
        .datab(vcc),
        .datac(iorq_n),
        .datad(wr_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(iowr_reg_fclk[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \iowr_reg_fclk[0]~I .clock_enable_mode = "true";
defparam \iowr_reg_fclk[0]~I .lut_mask = "000f";
defparam \iowr_reg_fclk[0]~I .operation_mode = "normal";
defparam \iowr_reg_fclk[0]~I .output_mode = "reg_only";
defparam \iowr_reg_fclk[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D18
flex10ke_lcell \iowr_reg_fclk[1]~I (
// Equation(s):
// iowr_reg_fclk[1] = DFFEA(iowr_reg_fclk[0], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(iowr_reg_fclk[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(iowr_reg_fclk[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \iowr_reg_fclk[1]~I .clock_enable_mode = "false";
defparam \iowr_reg_fclk[1]~I .lut_mask = "ff00";
defparam \iowr_reg_fclk[1]~I .operation_mode = "normal";
defparam \iowr_reg_fclk[1]~I .output_mode = "reg_only";
defparam \iowr_reg_fclk[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D18
flex10ke_lcell \port_wr_fclk~I (
// Equation(s):
// port_wr_fclk = DFFEA(!iowr_reg_fclk[1] & iowr_reg_fclk[0], GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(iowr_reg_fclk[1]),
        .datad(iowr_reg_fclk[0]),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(port_wr_fclk),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \port_wr_fclk~I .clock_enable_mode = "false";
defparam \port_wr_fclk~I .lut_mask = "0f00";
defparam \port_wr_fclk~I .operation_mode = "normal";
defparam \port_wr_fclk~I .output_mode = "reg_only";
defparam \port_wr_fclk~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D34
flex10ke_lcell \Equal16~48_I (
// Equation(s):
// \Equal16~48  = \a~dataout [2] & \a~dataout [1] & \a~dataout [0]

        .dataa(vcc),
        .datab(a_2),
        .datac(a_1),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal16~48 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal16~48_I .clock_enable_mode = "false";
defparam \Equal16~48_I .lut_mask = "c000";
defparam \Equal16~48_I .operation_mode = "normal";
defparam \Equal16~48_I .output_mode = "comb_only";
defparam \Equal16~48_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D24
flex10ke_lcell \Equal15~33_I (
// Equation(s):
// \Equal15~33  = \Equal16~48  & \a~dataout [4] & \a~dataout [3]

        .dataa(vcc),
        .datab(\Equal16~48 ),
        .datac(a_4),
        .datad(a_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal15~33 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal15~33_I .clock_enable_mode = "false";
defparam \Equal15~33_I .lut_mask = "c000";
defparam \Equal15~33_I .operation_mode = "normal";
defparam \Equal15~33_I .output_mode = "comb_only";
defparam \Equal15~33_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D24
flex10ke_lcell \Equal15~34_I (
// Equation(s):
// \Equal15~34  = !\a~dataout [6] & \a~dataout [7] & \a~dataout [5] & \Equal15~33 

        .dataa(a_6),
        .datab(a_7),
        .datac(a_5),
        .datad(\Equal15~33 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal15~34 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal15~34_I .clock_enable_mode = "false";
defparam \Equal15~34_I .lut_mask = "4000";
defparam \Equal15~34_I .operation_mode = "normal";
defparam \Equal15~34_I .output_mode = "comb_only";
defparam \Equal15~34_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D7
flex10ke_lcell \zxevbf_wr_fclk~I (
// Equation(s):
// zxevbf_wr_fclk = port_wr_fclk & \Equal15~34 

        .dataa(vcc),
        .datab(vcc),
        .datac(port_wr_fclk),
        .datad(\Equal15~34 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(zxevbf_wr_fclk),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \zxevbf_wr_fclk~I .clock_enable_mode = "false";
defparam \zxevbf_wr_fclk~I .lut_mask = "f000";
defparam \zxevbf_wr_fclk~I .operation_mode = "normal";
defparam \zxevbf_wr_fclk~I .output_mode = "comb_only";
defparam \zxevbf_wr_fclk~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H11
flex10ke_lcell \Equal0~44_I (
// Equation(s):
// \Equal0~44  = \a~dataout [7] & \a~dataout [5]

        .dataa(vcc),
        .datab(vcc),
        .datac(a_7),
        .datad(a_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal0~44 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal0~44_I .clock_enable_mode = "false";
defparam \Equal0~44_I .lut_mask = "f000";
defparam \Equal0~44_I .operation_mode = "normal";
defparam \Equal0~44_I .output_mode = "comb_only";
defparam \Equal0~44_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D8
flex10ke_lcell \shadow_en_reg~I (
// Equation(s):
// shadow_en_reg = DFFEA(\d[0]~7 , GLOBAL(\fclk~dataout ), rst_out_n, , zxevbf_wr_fclk, , )

        .dataa(zxevbf_wr_fclk),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(shadow_en_reg),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shadow_en_reg~I .clock_enable_mode = "true";
defparam \shadow_en_reg~I .lut_mask = "ff00";
defparam \shadow_en_reg~I .operation_mode = "normal";
defparam \shadow_en_reg~I .output_mode = "reg_only";
defparam \shadow_en_reg~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D8
flex10ke_lcell \shadow~I (
// Equation(s):
// shadow = shadow_en_reg # !dos

        .dataa(vcc),
        .datab(vcc),
        .datac(dos),
        .datad(shadow_en_reg),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(shadow),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \shadow~I .clock_enable_mode = "false";
defparam \shadow~I .lut_mask = "ff0f";
defparam \shadow~I .operation_mode = "normal";
defparam \shadow~I .output_mode = "comb_only";
defparam \shadow~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D24
flex10ke_lcell \Equal20~46_I (
// Equation(s):
// \Equal20~46  = \a~dataout [7] # !\a~dataout [6] & !\a~dataout [5] # !\Equal15~33 

        .dataa(\Equal15~33 ),
        .datab(a_6),
        .datac(a_5),
        .datad(a_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal20~46 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal20~46_I .clock_enable_mode = "false";
defparam \Equal20~46_I .lut_mask = "ff57";
defparam \Equal20~46_I .operation_mode = "normal";
defparam \Equal20~46_I .output_mode = "comb_only";
defparam \Equal20~46_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D26
flex10ke_lcell \Equal19~29_I (
// Equation(s):
// \Equal19~29  = !\a~dataout [7] & !\a~dataout [5] & !\a~dataout [6]

        .dataa(vcc),
        .datab(a_7),
        .datac(a_5),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal19~29 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal19~29_I .clock_enable_mode = "false";
defparam \Equal19~29_I .lut_mask = "0003";
defparam \Equal19~29_I .operation_mode = "normal";
defparam \Equal19~29_I .output_mode = "comb_only";
defparam \Equal19~29_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D31
flex10ke_lcell \Equal9~56_I (
// Equation(s):
// \Equal9~56  = !\a~dataout [1] & !\a~dataout [0] & !\a~dataout [2]

        .dataa(vcc),
        .datab(a_1),
        .datac(a_0),
        .datad(a_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal9~56 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal9~56_I .clock_enable_mode = "false";
defparam \Equal9~56_I .lut_mask = "0003";
defparam \Equal9~56_I .operation_mode = "normal";
defparam \Equal9~56_I .output_mode = "comb_only";
defparam \Equal9~56_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D22
flex10ke_lcell \porthit~590_I (
// Equation(s):
// \porthit~590  = !\Equal19~29  & !\a~dataout [3] & \Equal9~56 

        .dataa(vcc),
        .datab(\Equal19~29 ),
        .datac(a_3),
        .datad(\Equal9~56 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\porthit~590 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \porthit~590_I .clock_enable_mode = "false";
defparam \porthit~590_I .lut_mask = "0300";
defparam \porthit~590_I .operation_mode = "normal";
defparam \porthit~590_I .output_mode = "comb_only";
defparam \porthit~590_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D26
flex10ke_lcell \Equal9~57_I (
// Equation(s):
// \Equal9~57  = !\a~dataout [5] & \a~dataout [6] & \a~dataout [3] & \a~dataout [7]

        .dataa(a_5),
        .datab(a_6),
        .datac(a_3),
        .datad(a_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal9~57 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal9~57_I .clock_enable_mode = "false";
defparam \Equal9~57_I .lut_mask = "4000";
defparam \Equal9~57_I .operation_mode = "normal";
defparam \Equal9~57_I .output_mode = "comb_only";
defparam \Equal9~57_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D26
flex10ke_lcell \Equal12~39_I (
// Equation(s):
// \Equal12~39  = !\a~dataout [3] & \a~dataout [6] & \Equal16~48  & \a~dataout [4]

        .dataa(a_3),
        .datab(a_6),
        .datac(\Equal16~48 ),
        .datad(a_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal12~39 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal12~39_I .clock_enable_mode = "false";
defparam \Equal12~39_I .lut_mask = "4000";
defparam \Equal12~39_I .operation_mode = "normal";
defparam \Equal12~39_I .output_mode = "comb_only";
defparam \Equal12~39_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D26
flex10ke_lcell \Equal13~23_I (
// Equation(s):
// \Equal13~23  = \a~dataout [7] & \a~dataout [5] & \Equal12~39 

        .dataa(vcc),
        .datab(a_7),
        .datac(a_5),
        .datad(\Equal12~39 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal13~23 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal13~23_I .clock_enable_mode = "false";
defparam \Equal13~23_I .lut_mask = "c000";
defparam \Equal13~23_I .operation_mode = "normal";
defparam \Equal13~23_I .output_mode = "comb_only";
defparam \Equal13~23_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D26
flex10ke_lcell \Equal14~22_I (
// Equation(s):
// \Equal14~22  = !\a~dataout [7] & \Equal12~39  & \a~dataout [5]

        .dataa(vcc),
        .datab(a_7),
        .datac(\Equal12~39 ),
        .datad(a_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal14~22 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal14~22_I .clock_enable_mode = "false";
defparam \Equal14~22_I .lut_mask = "3000";
defparam \Equal14~22_I .operation_mode = "normal";
defparam \Equal14~22_I .output_mode = "comb_only";
defparam \Equal14~22_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_F6
flex10ke_lcell \Equal0~46_I (
// Equation(s):
// \Equal0~46  = \a~dataout [2] & \a~dataout [1]

        .dataa(vcc),
        .datab(vcc),
        .datac(a_2),
        .datad(a_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal0~46 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal0~46_I .clock_enable_mode = "false";
defparam \Equal0~46_I .lut_mask = "f000";
defparam \Equal0~46_I .operation_mode = "normal";
defparam \Equal0~46_I .output_mode = "comb_only";
defparam \Equal0~46_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H25
flex10ke_lcell \Equal0~45_I (
// Equation(s):
// \Equal0~45  = \Equal0~44  & \a~dataout [6] & \a~dataout [3] & \a~dataout [4]

        .dataa(\Equal0~44 ),
        .datab(a_6),
        .datac(a_3),
        .datad(a_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal0~45 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal0~45_I .clock_enable_mode = "false";
defparam \Equal0~45_I .lut_mask = "8000";
defparam \Equal0~45_I .operation_mode = "normal";
defparam \Equal0~45_I .output_mode = "comb_only";
defparam \Equal0~45_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_F6
flex10ke_lcell \Equal17~39_I (
// Equation(s):
// \Equal17~39  = !\a~dataout [1] & \a~dataout [2] & \a~dataout [0] & \Equal0~45 

        .dataa(a_1),
        .datab(a_2),
        .datac(a_0),
        .datad(\Equal0~45 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal17~39 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal17~39_I .clock_enable_mode = "false";
defparam \Equal17~39_I .lut_mask = "4000";
defparam \Equal17~39_I .operation_mode = "normal";
defparam \Equal17~39_I .output_mode = "comb_only";
defparam \Equal17~39_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_F6
flex10ke_lcell \porthit~588_I (
// Equation(s):
// \porthit~588  = \Equal17~39  # !\a~dataout [0] & \Equal0~46  & \Equal0~45 

        .dataa(a_0),
        .datab(\Equal0~46 ),
        .datac(\Equal0~45 ),
        .datad(\Equal17~39 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\porthit~588 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \porthit~588_I .clock_enable_mode = "false";
defparam \porthit~588_I .lut_mask = "ff40";
defparam \porthit~588_I .operation_mode = "normal";
defparam \porthit~588_I .output_mode = "comb_only";
defparam \porthit~588_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D22
flex10ke_lcell \porthit~589_I (
// Equation(s):
// \porthit~599  = !\Equal12~40  & !\Equal13~23  & !\Equal14~22  & !\porthit~588 

        .dataa(\Equal12~40 ),
        .datab(\Equal13~23 ),
        .datac(\Equal14~22 ),
        .datad(\porthit~588 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\porthit~589 ),
        .regout(),
        .cout(),
        .cascout(\porthit~599 ));
// synopsys translate_off
defparam \porthit~589_I .clock_enable_mode = "false";
defparam \porthit~589_I .lut_mask = "0001";
defparam \porthit~589_I .operation_mode = "normal";
defparam \porthit~589_I .output_mode = "none";
defparam \porthit~589_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D22
flex10ke_lcell \porthit~592_I (
// Equation(s):
// \porthit~592  = (!\porthit~590  & (!\Equal16~48  # !\Equal9~57 ) # !\a~dataout [4]) & CASCADE(\porthit~599 )

        .dataa(a_4),
        .datab(\porthit~590 ),
        .datac(\Equal9~57 ),
        .datad(\Equal16~48 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\porthit~599 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\porthit~592 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \porthit~592_I .clock_enable_mode = "false";
defparam \porthit~592_I .lut_mask = "5777";
defparam \porthit~592_I .operation_mode = "normal";
defparam \porthit~592_I .output_mode = "comb_only";
defparam \porthit~592_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D22
flex10ke_lcell \Equal9~58_I (
// Equation(s):
// \Equal9~58  = !\a~dataout [4] & \Equal9~57  & \Equal9~56 

        .dataa(vcc),
        .datab(a_4),
        .datac(\Equal9~57 ),
        .datad(\Equal9~56 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal9~58 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal9~58_I .clock_enable_mode = "false";
defparam \Equal9~58_I .lut_mask = "3000";
defparam \Equal9~58_I .operation_mode = "normal";
defparam \Equal9~58_I .output_mode = "comb_only";
defparam \Equal9~58_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H25
flex10ke_lcell \Equal16~50_I (
// Equation(s):
// \Equal16~50  = \Equal16~49  & \Equal0~44  & \a~dataout [6] & \Equal16~48 

        .dataa(\Equal16~49 ),
        .datab(\Equal0~44 ),
        .datac(a_6),
        .datad(\Equal16~48 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal16~50 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal16~50_I .clock_enable_mode = "false";
defparam \Equal16~50_I .lut_mask = "8000";
defparam \Equal16~50_I .operation_mode = "normal";
defparam \Equal16~50_I .output_mode = "comb_only";
defparam \Equal16~50_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D31
flex10ke_lcell \Equal23~24_I (
// Equation(s):
// \Equal23~24  = !\a~dataout [3] & \a~dataout [4] & \Equal19~29  & \Equal9~56 

        .dataa(a_3),
        .datab(a_4),
        .datac(\Equal19~29 ),
        .datad(\Equal9~56 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal23~24 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal23~24_I .clock_enable_mode = "false";
defparam \Equal23~24_I .lut_mask = "4000";
defparam \Equal23~24_I .operation_mode = "normal";
defparam \Equal23~24_I .output_mode = "comb_only";
defparam \Equal23~24_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D31
flex10ke_lcell \Equal19~30_I (
// Equation(s):
// \Equal19~30  = \Equal16~48  & \a~dataout [4] & \a~dataout [3] & \Equal19~29 

        .dataa(\Equal16~48 ),
        .datab(a_4),
        .datac(a_3),
        .datad(\Equal19~29 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal19~30 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal19~30_I .clock_enable_mode = "false";
defparam \Equal19~30_I .lut_mask = "8000";
defparam \Equal19~30_I .operation_mode = "normal";
defparam \Equal19~30_I .output_mode = "comb_only";
defparam \Equal19~30_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D31
flex10ke_lcell \porthit~581_I (
// Equation(s):
// \porthit~581  = \Equal1~41  # \Equal23~24  # \Equal15~34  # \Equal19~30 

        .dataa(\Equal1~41 ),
        .datab(\Equal23~24 ),
        .datac(\Equal15~34 ),
        .datad(\Equal19~30 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\porthit~581 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \porthit~581_I .clock_enable_mode = "false";
defparam \porthit~581_I .lut_mask = "fffe";
defparam \porthit~581_I .operation_mode = "normal";
defparam \porthit~581_I .output_mode = "comb_only";
defparam \porthit~581_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D22
flex10ke_lcell \porthit~583_I (
// Equation(s):
// \porthit~583  = \Equal9~58  # \Equal16~50  # \porthit~581  # !\porthit~592 

        .dataa(\porthit~592 ),
        .datab(\Equal9~58 ),
        .datac(\Equal16~50 ),
        .datad(\porthit~581 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\porthit~583 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \porthit~583_I .clock_enable_mode = "false";
defparam \porthit~583_I .lut_mask = "fffd";
defparam \porthit~583_I .operation_mode = "normal";
defparam \porthit~583_I .output_mode = "comb_only";
defparam \porthit~583_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D18
flex10ke_lcell \vg_cs_n~27_I (
// Equation(s):
// \vg_cs_n~27  = !\iorq_n~dataout  & (!\rd_n~dataout  # !\wr_n~dataout )

        .dataa(vcc),
        .datab(iorq_n),
        .datac(wr_n),
        .datad(rd_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\vg_cs_n~27 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \vg_cs_n~27_I .clock_enable_mode = "false";
defparam \vg_cs_n~27_I .lut_mask = "0333";
defparam \vg_cs_n~27_I .operation_mode = "normal";
defparam \vg_cs_n~27_I .output_mode = "comb_only";
defparam \vg_cs_n~27_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_F6
flex10ke_lcell \portfe_wr~I (
// Equation(s):
// portfe_wr = !\a~dataout [0] & port_wr & \Equal0~46  & \Equal0~45 

        .dataa(a_0),
        .datab(port_wr),
        .datac(\Equal0~46 ),
        .datad(\Equal0~45 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(portfe_wr),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \portfe_wr~I .clock_enable_mode = "false";
defparam \portfe_wr~I .lut_mask = "4000";
defparam \portfe_wr~I .operation_mode = "normal";
defparam \portfe_wr~I .output_mode = "comb_only";
defparam \portfe_wr~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D22
flex10ke_lcell \WideOr1~109_I (
// Equation(s):
// \WideOr1~109  = \Equal9~56  & (\a~dataout [4] & !\a~dataout [3] # !\a~dataout [4] & (\Equal9~57 ))

        .dataa(a_3),
        .datab(a_4),
        .datac(\Equal9~57 ),
        .datad(\Equal9~56 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\WideOr1~109 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \WideOr1~109_I .clock_enable_mode = "false";
defparam \WideOr1~109_I .lut_mask = "7400";
defparam \WideOr1~109_I .operation_mode = "normal";
defparam \WideOr1~109_I .output_mode = "comb_only";
defparam \WideOr1~109_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D4
flex10ke_lcell \iord_reg~I (
// Equation(s):
// iord_reg = DFFEA(!\iorq_n~dataout  & !\rd_n~dataout , GLOBAL(\clkz_in~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(iorq_n),
        .datad(rd_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(iord_reg),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \iord_reg~I .clock_enable_mode = "false";
defparam \iord_reg~I .lut_mask = "000f";
defparam \iord_reg~I .operation_mode = "normal";
defparam \iord_reg~I .output_mode = "reg_only";
defparam \iord_reg~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D4
flex10ke_lcell \port_rd~I (
// Equation(s):
// port_rd = DFFEA(!iord_reg & !\iorq_n~dataout  & !\rd_n~dataout , GLOBAL(\clkz_in~dataout ), , , , , )

        .dataa(vcc),
        .datab(iord_reg),
        .datac(iorq_n),
        .datad(rd_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(port_rd),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \port_rd~I .clock_enable_mode = "false";
defparam \port_rd~I .lut_mask = "0003";
defparam \port_rd~I .operation_mode = "normal";
defparam \port_rd~I .output_mode = "reg_only";
defparam \port_rd~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D4
flex10ke_lcell \ide_rd_trig~I (
// Equation(s):
// ide_rd_trig = DFFEA(ide_rd_trig & !\always9~80  # !ide_rd_trig & (port_rd & \Equal23~24 ), GLOBAL(\clkz_in~dataout ), , , , , )

        .dataa(\always9~80 ),
        .datab(ide_rd_trig),
        .datac(port_rd),
        .datad(\Equal23~24 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ide_rd_trig),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ide_rd_trig~I .clock_enable_mode = "false";
defparam \ide_rd_trig~I .lut_mask = "7444";
defparam \ide_rd_trig~I .operation_mode = "normal";
defparam \ide_rd_trig~I .output_mode = "reg_only";
defparam \ide_rd_trig~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D4
flex10ke_lcell \ide_rd_latch~I (
// Equation(s):
// ide_rd_latch = \rd_n~dataout  & (ide_rd_trig) # !\rd_n~dataout  & ide_rd_latch

        .dataa(vcc),
        .datab(rd_n),
        .datac(ide_rd_latch),
        .datad(ide_rd_trig),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ide_rd_latch),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ide_rd_latch~I .clock_enable_mode = "false";
defparam \ide_rd_latch~I .lut_mask = "fc30";
defparam \ide_rd_latch~I .operation_mode = "normal";
defparam \ide_rd_latch~I .output_mode = "comb_only";
defparam \ide_rd_latch~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D4
flex10ke_lcell \iderdeven~0_I (
// Equation(s):
// \iderdeven~0  = ide_rd_latch & \Equal23~24 

        .dataa(vcc),
        .datab(vcc),
        .datac(ide_rd_latch),
        .datad(\Equal23~24 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\iderdeven~0 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \iderdeven~0_I .clock_enable_mode = "false";
defparam \iderdeven~0_I .lut_mask = "f000";
defparam \iderdeven~0_I .operation_mode = "normal";
defparam \iderdeven~0_I .output_mode = "comb_only";
defparam \iderdeven~0_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D31
flex10ke_lcell \Equal1~40_I (
// Equation(s):
// \Equal1~40  = !\a~dataout [3] & \a~dataout [4] & \Equal19~29 

        .dataa(vcc),
        .datab(a_3),
        .datac(a_4),
        .datad(\Equal19~29 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal1~40 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal1~40_I .clock_enable_mode = "false";
defparam \Equal1~40_I .lut_mask = "3000";
defparam \Equal1~40_I .operation_mode = "normal";
defparam \Equal1~40_I .output_mode = "comb_only";
defparam \Equal1~40_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D31
flex10ke_lcell \Equal1~41_I (
// Equation(s):
// \Equal1~41  = !\a~dataout [2] & !\a~dataout [1] & \a~dataout [0] & \Equal1~40 

        .dataa(a_2),
        .datab(a_1),
        .datac(a_0),
        .datad(\Equal1~40 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal1~41 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal1~41_I .clock_enable_mode = "false";
defparam \Equal1~41_I .lut_mask = "1000";
defparam \Equal1~41_I .operation_mode = "normal";
defparam \Equal1~41_I .output_mode = "comb_only";
defparam \Equal1~41_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D5
flex10ke_lcell \ide_wrhi_trig~I (
// Equation(s):
// ide_wrhi_trig = DFFEA(\Equal1~41  & port_wr, GLOBAL(\clkz_in~dataout ), , , \always9~80 , , )

        .dataa(\always9~80 ),
        .datab(vcc),
        .datac(\Equal1~41 ),
        .datad(port_wr),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ide_wrhi_trig),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ide_wrhi_trig~I .clock_enable_mode = "true";
defparam \ide_wrhi_trig~I .lut_mask = "f000";
defparam \ide_wrhi_trig~I .operation_mode = "normal";
defparam \ide_wrhi_trig~I .output_mode = "reg_only";
defparam \ide_wrhi_trig~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D20
flex10ke_lcell \always11~20_I (
// Equation(s):
// \always11~20  = !ide_wrlo_trig & port_wr & \Equal23~24 

        .dataa(vcc),
        .datab(ide_wrlo_trig),
        .datac(port_wr),
        .datad(\Equal23~24 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always11~20 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always11~20_I .clock_enable_mode = "false";
defparam \always11~20_I .lut_mask = "3000";
defparam \always11~20_I .operation_mode = "normal";
defparam \always11~20_I .output_mode = "comb_only";
defparam \always11~20_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D20
flex10ke_lcell \ide_wrlo_trig~I (
// Equation(s):
// ide_wrlo_trig = DFFEA(!ide_wrhi_trig & \always11~20 , GLOBAL(\clkz_in~dataout ), , , \always9~80 , , )

        .dataa(\always9~80 ),
        .datab(vcc),
        .datac(ide_wrhi_trig),
        .datad(\always11~20 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(ide_wrlo_trig),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ide_wrlo_trig~I .clock_enable_mode = "true";
defparam \ide_wrlo_trig~I .lut_mask = "0f00";
defparam \ide_wrlo_trig~I .operation_mode = "normal";
defparam \ide_wrlo_trig~I .output_mode = "reg_only";
defparam \ide_wrlo_trig~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D20
flex10ke_lcell \ide_wrlo_latch~I (
// Equation(s):
// ide_wrlo_latch = \wr_n~dataout  & (ide_wrlo_trig) # !\wr_n~dataout  & ide_wrlo_latch

        .dataa(vcc),
        .datab(wr_n),
        .datac(ide_wrlo_latch),
        .datad(ide_wrlo_trig),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ide_wrlo_latch),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ide_wrlo_latch~I .clock_enable_mode = "false";
defparam \ide_wrlo_latch~I .lut_mask = "fc30";
defparam \ide_wrlo_latch~I .operation_mode = "normal";
defparam \ide_wrlo_latch~I .output_mode = "comb_only";
defparam \ide_wrlo_latch~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D5
flex10ke_lcell \ide_wrhi_latch~I (
// Equation(s):
// ide_wrhi_latch = \wr_n~dataout  & (ide_wrhi_trig) # !\wr_n~dataout  & ide_wrhi_latch

        .dataa(vcc),
        .datab(wr_n),
        .datac(ide_wrhi_latch),
        .datad(ide_wrhi_trig),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(ide_wrhi_latch),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ide_wrhi_latch~I .clock_enable_mode = "false";
defparam \ide_wrhi_latch~I .lut_mask = "fc30";
defparam \ide_wrhi_latch~I .operation_mode = "normal";
defparam \ide_wrhi_latch~I .output_mode = "comb_only";
defparam \ide_wrhi_latch~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D5
flex10ke_lcell \ide_wr_n~3_I (
// Equation(s):
// \ide_wr_n~3  = !ide_wrlo_latch & !ide_wrhi_latch & \Equal23~24 

        .dataa(vcc),
        .datab(ide_wrlo_latch),
        .datac(ide_wrhi_latch),
        .datad(\Equal23~24 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\ide_wr_n~3 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \ide_wr_n~3_I .clock_enable_mode = "false";
defparam \ide_wr_n~3_I .lut_mask = "0300";
defparam \ide_wr_n~3_I .operation_mode = "normal";
defparam \ide_wr_n~3_I .output_mode = "comb_only";
defparam \ide_wr_n~3_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D8
flex10ke_lcell \sdcfg_wr~122_I (
// Equation(s):
// \sdcfg_wr~122  = \a~dataout [15] & (shadow_en_reg # !dos)

        .dataa(vcc),
        .datab(dos),
        .datac(shadow_en_reg),
        .datad(a_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\sdcfg_wr~122 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sdcfg_wr~122_I .clock_enable_mode = "false";
defparam \sdcfg_wr~122_I .lut_mask = "f300";
defparam \sdcfg_wr~122_I .operation_mode = "normal";
defparam \sdcfg_wr~122_I .output_mode = "comb_only";
defparam \sdcfg_wr~122_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_D26
flex10ke_lcell \Equal12~40_I (
// Equation(s):
// \Equal12~40  = !\a~dataout [7] & !\a~dataout [5] & \Equal12~39 

        .dataa(vcc),
        .datab(a_7),
        .datac(a_5),
        .datad(\Equal12~39 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal12~40 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal12~40_I .clock_enable_mode = "false";
defparam \Equal12~40_I .lut_mask = "0300";
defparam \Equal12~40_I .operation_mode = "normal";
defparam \Equal12~40_I .output_mode = "comb_only";
defparam \Equal12~40_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D12
flex10ke_lcell \sdcfg_wr~123_I (
// Equation(s):
// \sdcfg_wr~123  = shadow & (\sdcfg_wr~122  & \Equal12~40 ) # !shadow & (\Equal14~22  # \sdcfg_wr~122  & \Equal12~40 )

        .dataa(shadow),
        .datab(\Equal14~22 ),
        .datac(\sdcfg_wr~122 ),
        .datad(\Equal12~40 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\sdcfg_wr~123 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sdcfg_wr~123_I .clock_enable_mode = "false";
defparam \sdcfg_wr~123_I .lut_mask = "f444";
defparam \sdcfg_wr~123_I .operation_mode = "normal";
defparam \sdcfg_wr~123_I .output_mode = "comb_only";
defparam \sdcfg_wr~123_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D12
flex10ke_lcell \sdcfg_wr~124_I (
// Equation(s):
// \sdcfg_wr~124  = \sdcfg_wr~123  & port_wr

        .dataa(vcc),
        .datab(vcc),
        .datac(\sdcfg_wr~123 ),
        .datad(port_wr),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\sdcfg_wr~124 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sdcfg_wr~124_I .clock_enable_mode = "false";
defparam \sdcfg_wr~124_I .lut_mask = "f000";
defparam \sdcfg_wr~124_I .operation_mode = "normal";
defparam \sdcfg_wr~124_I .output_mode = "comb_only";
defparam \sdcfg_wr~124_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_B35
flex10ke_lcell \always18~42_I (
// Equation(s):
// \always18~42  = !\a~dataout [15] & port_wr

        .dataa(vcc),
        .datab(vcc),
        .datac(a_15),
        .datad(port_wr),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always18~42 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always18~42_I .clock_enable_mode = "false";
defparam \always18~42_I .lut_mask = "0f00";
defparam \always18~42_I .operation_mode = "normal";
defparam \always18~42_I .output_mode = "comb_only";
defparam \always18~42_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B35
flex10ke_lcell \always18~43_I (
// Equation(s):
// \always18~43  = \always18~42  & \Equal17~39  & (!peff7_int_2 # !p7ffd_int_5)

        .dataa(p7ffd_int_5),
        .datab(peff7_int_2),
        .datac(\always18~42 ),
        .datad(\Equal17~39 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always18~43 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always18~43_I .clock_enable_mode = "false";
defparam \always18~43_I .lut_mask = "7000";
defparam \always18~43_I .operation_mode = "normal";
defparam \always18~43_I .output_mode = "comb_only";
defparam \always18~43_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D8
flex10ke_lcell \atm77_wr_fclk~22_I (
// Equation(s):
// \atm77_wr_fclk~22  = port_wr_fclk & \Equal14~22  & (shadow_en_reg # !dos)

        .dataa(dos),
        .datab(shadow_en_reg),
        .datac(port_wr_fclk),
        .datad(\Equal14~22 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\atm77_wr_fclk~22 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \atm77_wr_fclk~22_I .clock_enable_mode = "false";
defparam \atm77_wr_fclk~22_I .lut_mask = "d000";
defparam \atm77_wr_fclk~22_I .operation_mode = "normal";
defparam \atm77_wr_fclk~22_I .output_mode = "comb_only";
defparam \atm77_wr_fclk~22_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D8
flex10ke_lcell \wait_start_gluclock~56_I (
// Equation(s):
// \wait_start_gluclock~56  = \Equal13~23  & (\a~dataout [8] $ (shadow_en_reg # !dos))

        .dataa(a_8),
        .datab(shadow_en_reg),
        .datac(dos),
        .datad(\Equal13~23 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\wait_start_gluclock~56 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_start_gluclock~56_I .clock_enable_mode = "false";
defparam \wait_start_gluclock~56_I .lut_mask = "6500";
defparam \wait_start_gluclock~56_I .operation_mode = "normal";
defparam \wait_start_gluclock~56_I .output_mode = "comb_only";
defparam \wait_start_gluclock~56_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D13
flex10ke_lcell \always19~42_I (
// Equation(s):
// \always19~42  = !\a~dataout [12] & port_wr & \wait_start_gluclock~56 

        .dataa(vcc),
        .datab(a_12),
        .datac(port_wr),
        .datad(\wait_start_gluclock~56 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always19~42 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always19~42_I .clock_enable_mode = "false";
defparam \always19~42_I .lut_mask = "3000";
defparam \always19~42_I .operation_mode = "normal";
defparam \always19~42_I .output_mode = "comb_only";
defparam \always19~42_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D5
flex10ke_lcell \iowr_reg~I (
// Equation(s):
// iowr_reg = DFFEA(!\iorq_n~dataout  & !\wr_n~dataout , GLOBAL(\clkz_in~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(iorq_n),
        .datad(wr_n),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(iowr_reg),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \iowr_reg~I .clock_enable_mode = "false";
defparam \iowr_reg~I .lut_mask = "000f";
defparam \iowr_reg~I .operation_mode = "normal";
defparam \iowr_reg~I .output_mode = "reg_only";
defparam \iowr_reg~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D12
flex10ke_lcell \sd_start_toggle~I (
// Equation(s):
// sd_start_toggle = DFFEA(!sd_start_toggle, GLOBAL(\clkz_in~dataout ), , , \always26~82 , , )

        .dataa(\always26~82 ),
        .datab(vcc),
        .datac(vcc),
        .datad(sd_start_toggle),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(sd_start_toggle),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sd_start_toggle~I .clock_enable_mode = "true";
defparam \sd_start_toggle~I .lut_mask = "00ff";
defparam \sd_start_toggle~I .operation_mode = "normal";
defparam \sd_start_toggle~I .output_mode = "reg_only";
defparam \sd_start_toggle~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D12
flex10ke_lcell \sd_stgl[0]~I (
// Equation(s):
// sd_stgl[0] = DFFEA(sd_start_toggle, GLOBAL(\fclk~dataout ), , , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(sd_start_toggle),
        .aclr(gnd),
        .aload(gnd),
        .clk(fclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(sd_stgl[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \sd_stgl[0]~I .clock_enable_mode = "false";
defparam \sd_stgl[0]~I .lut_mask = "ff00";
defparam \sd_stgl[0]~I .operation_mode = "normal";
defparam \sd_stgl[0]~I .output_mode = "reg_only";
defparam \sd_stgl[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F3
flex10ke_lcell \peff7_int[7]~I (
// Equation(s):
// peff7_int[7] = DFFEA(\d[7]~0 , GLOBAL(\clkz_in~dataout ), rst_out_n, , \always19~42 , , )

        .dataa(\always19~42 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_7),
        .aclr(!rst_n),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(peff7_int[7]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \peff7_int[7]~I .clock_enable_mode = "true";
defparam \peff7_int[7]~I .lut_mask = "ff00";
defparam \peff7_int[7]~I .operation_mode = "normal";
defparam \peff7_int[7]~I .output_mode = "reg_only";
defparam \peff7_int[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D13
flex10ke_lcell \wait_start_gluclock~57_I (
// Equation(s):
// \wait_start_gluclock~57  = \wait_start_gluclock~56  & peff7_int[7]

        .dataa(vcc),
        .datab(vcc),
        .datac(\wait_start_gluclock~56 ),
        .datad(peff7_int[7]),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\wait_start_gluclock~57 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_start_gluclock~57_I .clock_enable_mode = "false";
defparam \wait_start_gluclock~57_I .lut_mask = "f000";
defparam \wait_start_gluclock~57_I .operation_mode = "normal";
defparam \wait_start_gluclock~57_I .output_mode = "comb_only";
defparam \wait_start_gluclock~57_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D13
flex10ke_lcell \wait_write~358_I (
// Equation(s):
// \wait_write~358  = port_wr & (\Equal16~50  # !\a~dataout [14] & \wait_start_gluclock~57 )

        .dataa(a_14),
        .datab(\wait_start_gluclock~57 ),
        .datac(\Equal16~50 ),
        .datad(port_wr),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\wait_write~358 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_write~358_I .clock_enable_mode = "false";
defparam \wait_write~358_I .lut_mask = "f400";
defparam \wait_write~358_I .operation_mode = "normal";
defparam \wait_write~358_I .output_mode = "comb_only";
defparam \wait_write~358_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D13
flex10ke_lcell \gluclock_addr[0]~56_I (
// Equation(s):
// \gluclock_addr[0]~56  = !\a~dataout [13] & \wait_start_gluclock~56  & peff7_int[7] & port_wr

        .dataa(a_13),
        .datab(\wait_start_gluclock~56 ),
        .datac(peff7_int[7]),
        .datad(port_wr),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\gluclock_addr[0]~56 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \gluclock_addr[0]~56_I .clock_enable_mode = "false";
defparam \gluclock_addr[0]~56_I .lut_mask = "4000";
defparam \gluclock_addr[0]~56_I .operation_mode = "normal";
defparam \gluclock_addr[0]~56_I .output_mode = "comb_only";
defparam \gluclock_addr[0]~56_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H14
flex10ke_lcell \Selector7~1871_I (
// Equation(s):
// \Selector7~1918  = !wait_reg_0 & \a~dataout [1] & \a~dataout [0] # !\a~dataout [5]

        .dataa(a_5),
        .datab(wait_reg_0),
        .datac(a_1),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1871 ),
        .regout(),
        .cout(),
        .cascout(\Selector7~1918 ));
// synopsys translate_off
defparam \Selector7~1871_I .clock_enable_mode = "false";
defparam \Selector7~1871_I .lut_mask = "7555";
defparam \Selector7~1871_I .operation_mode = "normal";
defparam \Selector7~1871_I .output_mode = "none";
defparam \Selector7~1871_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H14
flex10ke_lcell \Selector7~1897_I (
// Equation(s):
// \Selector7~1897  = (\a~dataout [7] & \a~dataout [6] & (\a~dataout [2] $ !\a~dataout [5])) & CASCADE(\Selector7~1918 )

        .dataa(a_2),
        .datab(a_5),
        .datac(a_7),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector7~1918 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1897 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector7~1897_I .clock_enable_mode = "false";
defparam \Selector7~1897_I .lut_mask = "9000";
defparam \Selector7~1897_I .operation_mode = "normal";
defparam \Selector7~1897_I .output_mode = "comb_only";
defparam \Selector7~1897_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H28
flex10ke_lcell \Selector7~1856_I (
// Equation(s):
// \Selector7~1856  = !\a~dataout [1] & !\a~dataout [0]

        .dataa(vcc),
        .datab(vcc),
        .datac(a_1),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1856 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector7~1856_I .clock_enable_mode = "false";
defparam \Selector7~1856_I .lut_mask = "000f";
defparam \Selector7~1856_I .operation_mode = "normal";
defparam \Selector7~1856_I .output_mode = "comb_only";
defparam \Selector7~1856_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H24
flex10ke_lcell \Selector7~1861_I (
// Equation(s):
// \Selector7~1861  = \a~dataout [0] & \a~dataout [7]

        .dataa(vcc),
        .datab(vcc),
        .datac(a_0),
        .datad(a_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1861 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector7~1861_I .clock_enable_mode = "false";
defparam \Selector7~1861_I .lut_mask = "f000";
defparam \Selector7~1861_I .operation_mode = "normal";
defparam \Selector7~1861_I .output_mode = "comb_only";
defparam \Selector7~1861_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_E26
flex10ke_lcell \Selector2~1450_I (
// Equation(s):
// \Selector2~1450  = \a~dataout [10] & (musy_5) # !\a~dataout [10] & musx_5

        .dataa(vcc),
        .datab(a_10),
        .datac(musx_5),
        .datad(musy_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector2~1450 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector2~1450_I .clock_enable_mode = "false";
defparam \Selector2~1450_I .lut_mask = "fc30";
defparam \Selector2~1450_I .operation_mode = "normal";
defparam \Selector2~1450_I .output_mode = "comb_only";
defparam \Selector2~1450_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_E26
flex10ke_lcell \Selector2~1451_I (
// Equation(s):
// \Selector2~1451  = \a~dataout [8] & (\Selector2~1450 ) # !\a~dataout [8] & musbtn_5 # !\Selector7~1861 

        .dataa(\Selector7~1861 ),
        .datab(a_8),
        .datac(musbtn_5),
        .datad(\Selector2~1450 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector2~1451 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector2~1451_I .clock_enable_mode = "false";
defparam \Selector2~1451_I .lut_mask = "fd75";
defparam \Selector2~1451_I .operation_mode = "normal";
defparam \Selector2~1451_I .output_mode = "comb_only";
defparam \Selector2~1451_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_E27
flex10ke_lcell \Equal9~59_I (
// Equation(s):
// \Equal9~59  = !\a~dataout [5] & \a~dataout [6]

        .dataa(vcc),
        .datab(vcc),
        .datac(a_5),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal9~59 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal9~59_I .clock_enable_mode = "false";
defparam \Equal9~59_I .lut_mask = "0f00";
defparam \Equal9~59_I .operation_mode = "normal";
defparam \Equal9~59_I .output_mode = "comb_only";
defparam \Equal9~59_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H24
flex10ke_lcell \Selector2~1449_I (
// Equation(s):
// \Selector2~1449  = \a~dataout [6] & \a~dataout [5] & (\a~dataout [0] # !\a~dataout [7]) # !\a~dataout [6] & (\a~dataout [7] # \a~dataout [5] # !\a~dataout [0])

        .dataa(a_6),
        .datab(a_7),
        .datac(a_0),
        .datad(a_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector2~1449 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector2~1449_I .clock_enable_mode = "false";
defparam \Selector2~1449_I .lut_mask = "f745";
defparam \Selector2~1449_I .operation_mode = "normal";
defparam \Selector2~1449_I .output_mode = "comb_only";
defparam \Selector2~1449_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_E31
flex10ke_lcell \Selector1~1382_I (
// Equation(s):
// \Selector1~1382  = \a~dataout [10] & (musy_6) # !\a~dataout [10] & musx_6

        .dataa(vcc),
        .datab(a_10),
        .datac(musx_6),
        .datad(musy_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector1~1382 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector1~1382_I .clock_enable_mode = "false";
defparam \Selector1~1382_I .lut_mask = "fc30";
defparam \Selector1~1382_I .operation_mode = "normal";
defparam \Selector1~1382_I .output_mode = "comb_only";
defparam \Selector1~1382_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_E31
flex10ke_lcell \Selector1~1383_I (
// Equation(s):
// \Selector1~1383  = \a~dataout [8] & (\Selector1~1382 ) # !\a~dataout [8] & musbtn_6

        .dataa(vcc),
        .datab(a_8),
        .datac(musbtn_6),
        .datad(\Selector1~1382 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector1~1383 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector1~1383_I .clock_enable_mode = "false";
defparam \Selector1~1383_I .lut_mask = "fc30";
defparam \Selector1~1383_I .operation_mode = "normal";
defparam \Selector1~1383_I .output_mode = "comb_only";
defparam \Selector1~1383_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_E33
flex10ke_lcell \Selector1~1380_I (
// Equation(s):
// \Selector1~1380  = \a~dataout [7] $ \a~dataout [6] # !\a~dataout [1] # !\a~dataout [2]

        .dataa(a_2),
        .datab(a_1),
        .datac(a_7),
        .datad(a_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector1~1380 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector1~1380_I .clock_enable_mode = "false";
defparam \Selector1~1380_I .lut_mask = "7ff7";
defparam \Selector1~1380_I .operation_mode = "normal";
defparam \Selector1~1380_I .output_mode = "comb_only";
defparam \Selector1~1380_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_E33
flex10ke_lcell \Selector1~1381_I (
// Equation(s):
// \Selector1~1381  = \Selector1~1380  # !\a~dataout [0] & (cfg0_reg_out_2 # !\a~dataout [5])

        .dataa(a_0),
        .datab(a_5),
        .datac(cfg0_reg_out_2),
        .datad(\Selector1~1380 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector1~1381 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector1~1381_I .clock_enable_mode = "false";
defparam \Selector1~1381_I .lut_mask = "ff51";
defparam \Selector1~1381_I .operation_mode = "normal";
defparam \Selector1~1381_I .output_mode = "comb_only";
defparam \Selector1~1381_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_E33
flex10ke_lcell \Selector1~1379_I (
// Equation(s):
// \Selector1~1379  = \a~dataout [5] & (drq_sync_1 & \a~dataout [0] # !\a~dataout [6])

        .dataa(a_6),
        .datab(drq_sync_1),
        .datac(a_0),
        .datad(a_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector1~1379 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector1~1379_I .clock_enable_mode = "false";
defparam \Selector1~1379_I .lut_mask = "d500";
defparam \Selector1~1379_I .operation_mode = "normal";
defparam \Selector1~1379_I .output_mode = "comb_only";
defparam \Selector1~1379_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_E19
flex10ke_lcell \Selector0~1452_I (
// Equation(s):
// \Selector0~1452  = \a~dataout [10] & (musy_7) # !\a~dataout [10] & musx_7

        .dataa(vcc),
        .datab(a_10),
        .datac(musx_7),
        .datad(musy_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector0~1452 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector0~1452_I .clock_enable_mode = "false";
defparam \Selector0~1452_I .lut_mask = "fc30";
defparam \Selector0~1452_I .operation_mode = "normal";
defparam \Selector0~1452_I .output_mode = "comb_only";
defparam \Selector0~1452_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_E19
flex10ke_lcell \Selector0~1453_I (
// Equation(s):
// \Selector0~1453  = !\a~dataout [5] & (\a~dataout [8] & (\Selector0~1452 ) # !\a~dataout [8] & musbtn_7)

        .dataa(a_5),
        .datab(a_8),
        .datac(musbtn_7),
        .datad(\Selector0~1452 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector0~1453 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector0~1453_I .clock_enable_mode = "false";
defparam \Selector0~1453_I .lut_mask = "5410";
defparam \Selector0~1453_I .operation_mode = "normal";
defparam \Selector0~1453_I .output_mode = "comb_only";
defparam \Selector0~1453_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H24
flex10ke_lcell \Selector0~1450_I (
// Equation(s):
// \Selector0~1450  = \a~dataout [6] & (intrq_sync_1 & \a~dataout [5]) # !\a~dataout [6] & (\a~dataout [7] # \a~dataout [5])

        .dataa(a_6),
        .datab(a_7),
        .datac(intrq_sync_1),
        .datad(a_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector0~1450 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector0~1450_I .clock_enable_mode = "false";
defparam \Selector0~1450_I .lut_mask = "f544";
defparam \Selector0~1450_I .operation_mode = "normal";
defparam \Selector0~1450_I .output_mode = "comb_only";
defparam \Selector0~1450_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H24
flex10ke_lcell \Selector0~1451_I (
// Equation(s):
// \Selector0~1451  = \Selector0~1450  # !\a~dataout [0] # !\a~dataout [1] # !\a~dataout [2]

        .dataa(a_2),
        .datab(a_1),
        .datac(a_0),
        .datad(\Selector0~1450 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector0~1451 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector0~1451_I .clock_enable_mode = "false";
defparam \Selector0~1451_I .lut_mask = "ff7f";
defparam \Selector0~1451_I .operation_mode = "normal";
defparam \Selector0~1451_I .output_mode = "comb_only";
defparam \Selector0~1451_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B8
flex10ke_lcell \idewrreg[0]~I (
// Equation(s):
// idewrreg[0] = DFFEA(\d[0]~7 , GLOBAL(\clkz_in~dataout ), , , \always11~20 , , )

        .dataa(\always11~20 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idewrreg[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idewrreg[0]~I .clock_enable_mode = "true";
defparam \idewrreg[0]~I .lut_mask = "ff00";
defparam \idewrreg[0]~I .operation_mode = "normal";
defparam \idewrreg[0]~I .output_mode = "reg_only";
defparam \idewrreg[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B9
flex10ke_lcell \idewrreg[1]~I (
// Equation(s):
// idewrreg[1] = DFFEA(\d[1]~6 , GLOBAL(\clkz_in~dataout ), , , \always11~20 , , )

        .dataa(\always11~20 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idewrreg[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idewrreg[1]~I .clock_enable_mode = "true";
defparam \idewrreg[1]~I .lut_mask = "ff00";
defparam \idewrreg[1]~I .operation_mode = "normal";
defparam \idewrreg[1]~I .output_mode = "reg_only";
defparam \idewrreg[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B12
flex10ke_lcell \idewrreg[2]~I (
// Equation(s):
// idewrreg[2] = DFFEA(\d[2]~5 , GLOBAL(\clkz_in~dataout ), , , \always11~20 , , )

        .dataa(\always11~20 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idewrreg[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idewrreg[2]~I .clock_enable_mode = "true";
defparam \idewrreg[2]~I .lut_mask = "ff00";
defparam \idewrreg[2]~I .operation_mode = "normal";
defparam \idewrreg[2]~I .output_mode = "reg_only";
defparam \idewrreg[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B14
flex10ke_lcell \idewrreg[3]~I (
// Equation(s):
// idewrreg[3] = DFFEA(\d[3]~4 , GLOBAL(\clkz_in~dataout ), , , \always11~20 , , )

        .dataa(\always11~20 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idewrreg[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idewrreg[3]~I .clock_enable_mode = "true";
defparam \idewrreg[3]~I .lut_mask = "ff00";
defparam \idewrreg[3]~I .operation_mode = "normal";
defparam \idewrreg[3]~I .output_mode = "reg_only";
defparam \idewrreg[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B14
flex10ke_lcell \idewrreg[4]~I (
// Equation(s):
// idewrreg[4] = DFFEA(\d[4]~3 , GLOBAL(\clkz_in~dataout ), , , \always11~20 , , )

        .dataa(\always11~20 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idewrreg[4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idewrreg[4]~I .clock_enable_mode = "true";
defparam \idewrreg[4]~I .lut_mask = "ff00";
defparam \idewrreg[4]~I .operation_mode = "normal";
defparam \idewrreg[4]~I .output_mode = "reg_only";
defparam \idewrreg[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B16
flex10ke_lcell \idewrreg[5]~I (
// Equation(s):
// idewrreg[5] = DFFEA(\d[5]~2 , GLOBAL(\clkz_in~dataout ), , , \always11~20 , , )

        .dataa(\always11~20 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idewrreg[5]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idewrreg[5]~I .clock_enable_mode = "true";
defparam \idewrreg[5]~I .lut_mask = "ff00";
defparam \idewrreg[5]~I .operation_mode = "normal";
defparam \idewrreg[5]~I .output_mode = "reg_only";
defparam \idewrreg[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D20
flex10ke_lcell \idewrreg[6]~I (
// Equation(s):
// idewrreg[6] = DFFEA(\d[6]~1 , GLOBAL(\clkz_in~dataout ), , , \always11~20 , , )

        .dataa(\always11~20 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idewrreg[6]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idewrreg[6]~I .clock_enable_mode = "true";
defparam \idewrreg[6]~I .lut_mask = "ff00";
defparam \idewrreg[6]~I .operation_mode = "normal";
defparam \idewrreg[6]~I .output_mode = "reg_only";
defparam \idewrreg[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D20
flex10ke_lcell \idewrreg[7]~I (
// Equation(s):
// idewrreg[7] = DFFEA(\d[7]~0 , GLOBAL(\clkz_in~dataout ), , , \always11~20 , , )

        .dataa(\always11~20 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idewrreg[7]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idewrreg[7]~I .clock_enable_mode = "true";
defparam \idewrreg[7]~I .lut_mask = "ff00";
defparam \idewrreg[7]~I .operation_mode = "normal";
defparam \idewrreg[7]~I .output_mode = "reg_only";
defparam \idewrreg[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D5
flex10ke_lcell \always10~0_I (
// Equation(s):
// \always10~0  = port_wr & \Equal1~41 

        .dataa(vcc),
        .datab(vcc),
        .datac(port_wr),
        .datad(\Equal1~41 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\always10~0 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \always10~0_I .clock_enable_mode = "false";
defparam \always10~0_I .lut_mask = "f000";
defparam \always10~0_I .operation_mode = "normal";
defparam \always10~0_I .output_mode = "comb_only";
defparam \always10~0_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_E22
flex10ke_lcell \idewrreg[8]~I (
// Equation(s):
// idewrreg[8] = DFFEA(\d[0]~7 , GLOBAL(\clkz_in~dataout ), , , \always10~0 , , )

        .dataa(\always10~0 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idewrreg[8]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idewrreg[8]~I .clock_enable_mode = "true";
defparam \idewrreg[8]~I .lut_mask = "ff00";
defparam \idewrreg[8]~I .operation_mode = "normal";
defparam \idewrreg[8]~I .output_mode = "reg_only";
defparam \idewrreg[8]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_E20
flex10ke_lcell \idewrreg[9]~I (
// Equation(s):
// idewrreg[9] = DFFEA(\d[1]~6 , GLOBAL(\clkz_in~dataout ), , , \always10~0 , , )

        .dataa(\always10~0 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idewrreg[9]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idewrreg[9]~I .clock_enable_mode = "true";
defparam \idewrreg[9]~I .lut_mask = "ff00";
defparam \idewrreg[9]~I .operation_mode = "normal";
defparam \idewrreg[9]~I .output_mode = "reg_only";
defparam \idewrreg[9]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B17
flex10ke_lcell \idewrreg[10]~I (
// Equation(s):
// idewrreg[10] = DFFEA(\d[2]~5 , GLOBAL(\clkz_in~dataout ), , , \always10~0 , , )

        .dataa(\always10~0 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idewrreg[10]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idewrreg[10]~I .clock_enable_mode = "true";
defparam \idewrreg[10]~I .lut_mask = "ff00";
defparam \idewrreg[10]~I .operation_mode = "normal";
defparam \idewrreg[10]~I .output_mode = "reg_only";
defparam \idewrreg[10]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_C15
flex10ke_lcell \idewrreg[11]~I (
// Equation(s):
// idewrreg[11] = DFFEA(\d[3]~4 , GLOBAL(\clkz_in~dataout ), , , \always10~0 , , )

        .dataa(\always10~0 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idewrreg[11]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idewrreg[11]~I .clock_enable_mode = "true";
defparam \idewrreg[11]~I .lut_mask = "ff00";
defparam \idewrreg[11]~I .operation_mode = "normal";
defparam \idewrreg[11]~I .output_mode = "reg_only";
defparam \idewrreg[11]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B14
flex10ke_lcell \idewrreg[12]~I (
// Equation(s):
// idewrreg[12] = DFFEA(\d[4]~3 , GLOBAL(\clkz_in~dataout ), , , \always10~0 , , )

        .dataa(\always10~0 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idewrreg[12]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idewrreg[12]~I .clock_enable_mode = "true";
defparam \idewrreg[12]~I .lut_mask = "ff00";
defparam \idewrreg[12]~I .operation_mode = "normal";
defparam \idewrreg[12]~I .output_mode = "reg_only";
defparam \idewrreg[12]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_C11
flex10ke_lcell \idewrreg[13]~I (
// Equation(s):
// idewrreg[13] = DFFEA(\d[5]~2 , GLOBAL(\clkz_in~dataout ), , , \always10~0 , , )

        .dataa(\always10~0 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idewrreg[13]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idewrreg[13]~I .clock_enable_mode = "true";
defparam \idewrreg[13]~I .lut_mask = "ff00";
defparam \idewrreg[13]~I .operation_mode = "normal";
defparam \idewrreg[13]~I .output_mode = "reg_only";
defparam \idewrreg[13]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_B10
flex10ke_lcell \idewrreg[14]~I (
// Equation(s):
// idewrreg[14] = DFFEA(\d[6]~1 , GLOBAL(\clkz_in~dataout ), , , \always10~0 , , )

        .dataa(\always10~0 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idewrreg[14]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idewrreg[14]~I .clock_enable_mode = "true";
defparam \idewrreg[14]~I .lut_mask = "ff00";
defparam \idewrreg[14]~I .operation_mode = "normal";
defparam \idewrreg[14]~I .output_mode = "reg_only";
defparam \idewrreg[14]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B10
flex10ke_lcell \idewrreg[15]~I (
// Equation(s):
// idewrreg[15] = DFFEA(\d[7]~0 , GLOBAL(\clkz_in~dataout ), , , \always10~0 , , )

        .dataa(\always10~0 ),
        .datab(vcc),
        .datac(vcc),
        .datad(d_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idewrreg[15]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idewrreg[15]~I .clock_enable_mode = "true";
defparam \idewrreg[15]~I .lut_mask = "ff00";
defparam \idewrreg[15]~I .operation_mode = "normal";
defparam \idewrreg[15]~I .output_mode = "reg_only";
defparam \idewrreg[15]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H36
flex10ke_lcell \Selector0~1462_I (
// Equation(s):
// \Selector0~1462  = wait_reg_7 # !\a~dataout [0] # !\a~dataout [1]

        .dataa(vcc),
        .datab(a_1),
        .datac(a_0),
        .datad(wait_reg_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector0~1462 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector0~1462_I .clock_enable_mode = "false";
defparam \Selector0~1462_I .lut_mask = "ff3f";
defparam \Selector0~1462_I .operation_mode = "normal";
defparam \Selector0~1462_I .output_mode = "comb_only";
defparam \Selector0~1462_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H36
flex10ke_lcell \Selector0~1463_I (
// Equation(s):
// \Selector0~1481  = \a~dataout [5] & !\Selector0~1462  # !\a~dataout [5] & (!\ide_d[7]~8  & \Selector7~1856 )

        .dataa(\Selector0~1462 ),
        .datab(ide_d_7),
        .datac(a_5),
        .datad(\Selector7~1856 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector0~1463 ),
        .regout(),
        .cout(),
        .cascout(\Selector0~1481 ));
// synopsys translate_off
defparam \Selector0~1463_I .clock_enable_mode = "false";
defparam \Selector0~1463_I .lut_mask = "5350";
defparam \Selector0~1463_I .operation_mode = "normal";
defparam \Selector0~1463_I .output_mode = "none";
defparam \Selector0~1463_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_D24
flex10ke_lcell \dataout~111_I (
// Equation(s):
// \dataout~116  = !\iorq_n~dataout  & !\rd_n~dataout  & (!\Equal17~39  # !pre_bc1)

        .dataa(iorq_n),
        .datab(rd_n),
        .datac(pre_bc1),
        .datad(\Equal17~39 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\dataout~111 ),
        .regout(),
        .cout(),
        .cascout(\dataout~116 ));
// synopsys translate_off
defparam \dataout~111_I .clock_enable_mode = "false";
defparam \dataout~111_I .lut_mask = "0111";
defparam \dataout~111_I .operation_mode = "normal";
defparam \dataout~111_I .output_mode = "none";
defparam \dataout~111_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_D4
flex10ke_lcell \idein_lo_rd~25_I (
// Equation(s):
// \idein_lo_rd~25  = !ide_rd_trig & port_rd & \Equal23~24 

        .dataa(vcc),
        .datab(ide_rd_trig),
        .datac(port_rd),
        .datad(\Equal23~24 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\idein_lo_rd~25 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idein_lo_rd~25_I .clock_enable_mode = "false";
defparam \idein_lo_rd~25_I .lut_mask = "3000";
defparam \idein_lo_rd~25_I .operation_mode = "normal";
defparam \idein_lo_rd~25_I .output_mode = "comb_only";
defparam \idein_lo_rd~25_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H3
flex10ke_lcell \idehiin[0]~I (
// Equation(s):
// idehiin[0] = DFFEA(\ide_d[8]~7 , GLOBAL(\clkz_in~dataout ), , , \idein_lo_rd~25 , , )

        .dataa(\idein_lo_rd~25 ),
        .datab(vcc),
        .datac(vcc),
        .datad(ide_d_8),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idehiin[0]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idehiin[0]~I .clock_enable_mode = "true";
defparam \idehiin[0]~I .lut_mask = "ff00";
defparam \idehiin[0]~I .operation_mode = "normal";
defparam \idehiin[0]~I .output_mode = "reg_only";
defparam \idehiin[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H5
flex10ke_lcell \Selector7~1876_I (
// Equation(s):
// \Selector7~1876  = !\a~dataout [2] & \a~dataout [0] & (idehiin[0] # !\Equal19~29 )

        .dataa(a_2),
        .datab(\Equal19~29 ),
        .datac(idehiin[0]),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1876 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector7~1876_I .clock_enable_mode = "false";
defparam \Selector7~1876_I .lut_mask = "5100";
defparam \Selector7~1876_I .operation_mode = "normal";
defparam \Selector7~1876_I .output_mode = "comb_only";
defparam \Selector7~1876_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H6
flex10ke_lcell \Selector7~1874_I (
// Equation(s):
// \Selector7~1874  = !\a~dataout [7] & !\a~dataout [5] & dout_0 # !\Selector7~1873 

        .dataa(\Selector7~1873 ),
        .datab(a_7),
        .datac(a_5),
        .datad(dout_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1874 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector7~1874_I .clock_enable_mode = "false";
defparam \Selector7~1874_I .lut_mask = "5755";
defparam \Selector7~1874_I .operation_mode = "normal";
defparam \Selector7~1874_I .output_mode = "comb_only";
defparam \Selector7~1874_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H11
flex10ke_lcell \Selector7~1875_I (
// Equation(s):
// \Selector7~1875  = \Selector7~1874  # \Equal0~44  & (wait_reg_0 # !\always6~2 )

        .dataa(\always6~2 ),
        .datab(wait_reg_0),
        .datac(\Equal0~44 ),
        .datad(\Selector7~1874 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1875 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector7~1875_I .clock_enable_mode = "false";
defparam \Selector7~1875_I .lut_mask = "ffd0";
defparam \Selector7~1875_I .operation_mode = "normal";
defparam \Selector7~1875_I .output_mode = "comb_only";
defparam \Selector7~1875_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H5
flex10ke_lcell \Selector7~1877_I (
// Equation(s):
// \Selector7~1924  = !\Selector7~1876  & (\a~dataout [1] & !\Selector7~1875  & \a~dataout [2] # !\a~dataout [1] & (!\a~dataout [2]))

        .dataa(\Selector7~1876 ),
        .datab(\Selector7~1875 ),
        .datac(a_1),
        .datad(a_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1877 ),
        .regout(),
        .cout(),
        .cascout(\Selector7~1924 ));
// synopsys translate_off
defparam \Selector7~1877_I .clock_enable_mode = "false";
defparam \Selector7~1877_I .lut_mask = "1005";
defparam \Selector7~1877_I .operation_mode = "normal";
defparam \Selector7~1877_I .output_mode = "none";
defparam \Selector7~1877_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D26
flex10ke_lcell \Equal1~42_I (
// Equation(s):
// \Equal1~42  = !\a~dataout [7] & !\a~dataout [5]

        .dataa(vcc),
        .datab(vcc),
        .datac(a_7),
        .datad(a_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Equal1~42 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Equal1~42_I .clock_enable_mode = "false";
defparam \Equal1~42_I .lut_mask = "000f";
defparam \Equal1~42_I .operation_mode = "normal";
defparam \Equal1~42_I .output_mode = "comb_only";
defparam \Equal1~42_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I32
flex10ke_lcell \Selector7~1895_I (
// Equation(s):
// \Selector7~1937  = kbd_32 & \a~dataout [8] & (\a~dataout [13] # !kbd_37) # !kbd_32 & (\a~dataout [13] # !kbd_37)

        .dataa(kbd_32),
        .datab(kbd_37),
        .datac(a_13),
        .datad(a_8),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1895 ),
        .regout(),
        .cout(),
        .cascout(\Selector7~1937 ));
// synopsys translate_off
defparam \Selector7~1895_I .clock_enable_mode = "false";
defparam \Selector7~1895_I .lut_mask = "f351";
defparam \Selector7~1895_I .operation_mode = "normal";
defparam \Selector7~1895_I .output_mode = "none";
defparam \Selector7~1895_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I32
flex10ke_lcell \Selector7~1901_I (
// Equation(s):
// \Selector7~1901  = (kbd_36 & \a~dataout [12] & (\a~dataout [11] # !kbd_35) # !kbd_36 & (\a~dataout [11] # !kbd_35)) & CASCADE(\Selector7~1937 )

        .dataa(kbd_36),
        .datab(kbd_35),
        .datac(a_11),
        .datad(a_12),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector7~1937 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1901 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector7~1901_I .clock_enable_mode = "false";
defparam \Selector7~1901_I .lut_mask = "f351";
defparam \Selector7~1901_I .operation_mode = "normal";
defparam \Selector7~1901_I .output_mode = "comb_only";
defparam \Selector7~1901_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_I30
flex10ke_lcell \Selector7~1893_I (
// Equation(s):
// \Selector7~1934  = kbd_39 & \a~dataout [15] & (\a~dataout [10] # !kbd_34) # !kbd_39 & (\a~dataout [10] # !kbd_34)

        .dataa(kbd_39),
        .datab(kbd_34),
        .datac(a_10),
        .datad(a_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1893 ),
        .regout(),
        .cout(),
        .cascout(\Selector7~1934 ));
// synopsys translate_off
defparam \Selector7~1893_I .clock_enable_mode = "false";
defparam \Selector7~1893_I .lut_mask = "f351";
defparam \Selector7~1893_I .operation_mode = "normal";
defparam \Selector7~1893_I .output_mode = "none";
defparam \Selector7~1893_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I30
flex10ke_lcell \Selector7~1900_I (
// Equation(s):
// \Selector7~1900  = (kbd_38 & \a~dataout [14] & (\a~dataout [9] # !kbd_33) # !kbd_38 & (\a~dataout [9] # !kbd_33)) & CASCADE(\Selector7~1934 )

        .dataa(kbd_38),
        .datab(kbd_33),
        .datac(a_9),
        .datad(a_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector7~1934 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1900 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector7~1900_I .clock_enable_mode = "false";
defparam \Selector7~1900_I .lut_mask = "f351";
defparam \Selector7~1900_I .operation_mode = "normal";
defparam \Selector7~1900_I .output_mode = "comb_only";
defparam \Selector7~1900_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I32
flex10ke_lcell \Selector7~1884_I (
// Equation(s):
// \Selector7~1884  = \a~dataout [5] & (\Selector7~1901  & \Selector7~1900  # !\Selector7~1883 )

        .dataa(\Selector7~1883 ),
        .datab(\Selector7~1901 ),
        .datac(\Selector7~1900 ),
        .datad(a_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1884 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector7~1884_I .clock_enable_mode = "false";
defparam \Selector7~1884_I .lut_mask = "d500";
defparam \Selector7~1884_I .operation_mode = "normal";
defparam \Selector7~1884_I .output_mode = "comb_only";
defparam \Selector7~1884_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_E35
flex10ke_lcell \Selector7~1879_I (
// Equation(s):
// \Selector7~1879  = \a~dataout [10] & (musy_0) # !\a~dataout [10] & musx_0

        .dataa(vcc),
        .datab(a_10),
        .datac(musx_0),
        .datad(musy_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1879 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector7~1879_I .clock_enable_mode = "false";
defparam \Selector7~1879_I .lut_mask = "fc30";
defparam \Selector7~1879_I .operation_mode = "normal";
defparam \Selector7~1879_I .output_mode = "comb_only";
defparam \Selector7~1879_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_E35
flex10ke_lcell \Selector7~1880_I (
// Equation(s):
// \Selector7~1880  = \a~dataout [8] & (\Selector7~1879 ) # !\a~dataout [8] & musbtn_0 # !\Selector7~1861 

        .dataa(\Selector7~1861 ),
        .datab(a_8),
        .datac(musbtn_0),
        .datad(\Selector7~1879 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1880 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector7~1880_I .clock_enable_mode = "false";
defparam \Selector7~1880_I .lut_mask = "fd75";
defparam \Selector7~1880_I .operation_mode = "normal";
defparam \Selector7~1880_I .output_mode = "comb_only";
defparam \Selector7~1880_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_E35
flex10ke_lcell \Selector7~1885_I (
// Equation(s):
// \Selector7~1931  = !\Selector7~1884  & \Equal0~46  & (!\Equal9~59  # !\Selector7~1880 )

        .dataa(\Selector7~1884 ),
        .datab(\Selector7~1880 ),
        .datac(\Equal9~59 ),
        .datad(\Equal0~46 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector7~1885 ),
        .regout(),
        .cout(),
        .cascout(\Selector7~1931 ));
// synopsys translate_off
defparam \Selector7~1885_I .clock_enable_mode = "false";
defparam \Selector7~1885_I .lut_mask = "1500";
defparam \Selector7~1885_I .operation_mode = "normal";
defparam \Selector7~1885_I .output_mode = "none";
defparam \Selector7~1885_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H32
flex10ke_lcell \idehiin[1]~I (
// Equation(s):
// idehiin[1] = DFFEA(\ide_d[9]~6 , GLOBAL(\clkz_in~dataout ), , , \idein_lo_rd~25 , , )

        .dataa(\idein_lo_rd~25 ),
        .datab(vcc),
        .datac(vcc),
        .datad(ide_d_9),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idehiin[1]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idehiin[1]~I .clock_enable_mode = "true";
defparam \idehiin[1]~I .lut_mask = "ff00";
defparam \idehiin[1]~I .operation_mode = "normal";
defparam \idehiin[1]~I .output_mode = "reg_only";
defparam \idehiin[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H32
flex10ke_lcell \Selector6~1387_I (
// Equation(s):
// \Selector6~1387  = !\a~dataout [2] & \a~dataout [0] & (idehiin[1] # !\Equal19~29 )

        .dataa(a_2),
        .datab(\Equal19~29 ),
        .datac(idehiin[1]),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector6~1387 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector6~1387_I .clock_enable_mode = "false";
defparam \Selector6~1387_I .lut_mask = "5100";
defparam \Selector6~1387_I .operation_mode = "normal";
defparam \Selector6~1387_I .output_mode = "comb_only";
defparam \Selector6~1387_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H11
flex10ke_lcell \Selector6~1385_I (
// Equation(s):
// \Selector6~1385  = !\a~dataout [7] & !\a~dataout [5] & dout_1 # !\Selector7~1873 

        .dataa(\Selector7~1873 ),
        .datab(a_7),
        .datac(a_5),
        .datad(dout_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector6~1385 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector6~1385_I .clock_enable_mode = "false";
defparam \Selector6~1385_I .lut_mask = "5755";
defparam \Selector6~1385_I .operation_mode = "normal";
defparam \Selector6~1385_I .output_mode = "comb_only";
defparam \Selector6~1385_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H11
flex10ke_lcell \Selector6~1386_I (
// Equation(s):
// \Selector6~1386  = \Selector6~1385  # \Equal0~44  & (wait_reg_1 # !\always6~2 )

        .dataa(\always6~2 ),
        .datab(wait_reg_1),
        .datac(\Equal0~44 ),
        .datad(\Selector6~1385 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector6~1386 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector6~1386_I .clock_enable_mode = "false";
defparam \Selector6~1386_I .lut_mask = "ffd0";
defparam \Selector6~1386_I .operation_mode = "normal";
defparam \Selector6~1386_I .output_mode = "comb_only";
defparam \Selector6~1386_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H32
flex10ke_lcell \Selector6~1388_I (
// Equation(s):
// \Selector6~1424  = !\Selector6~1387  & (\a~dataout [1] & !\Selector6~1386  & \a~dataout [2] # !\a~dataout [1] & (!\a~dataout [2]))

        .dataa(\Selector6~1387 ),
        .datab(\Selector6~1386 ),
        .datac(a_1),
        .datad(a_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector6~1388 ),
        .regout(),
        .cout(),
        .cascout(\Selector6~1424 ));
// synopsys translate_off
defparam \Selector6~1388_I .clock_enable_mode = "false";
defparam \Selector6~1388_I .lut_mask = "1005";
defparam \Selector6~1388_I .operation_mode = "normal";
defparam \Selector6~1388_I .output_mode = "none";
defparam \Selector6~1388_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_I35
flex10ke_lcell \Selector6~1405_I (
// Equation(s):
// \Selector6~1436  = kbd_24 & \a~dataout [8] & (\a~dataout [13] # !kbd_29) # !kbd_24 & (\a~dataout [13] # !kbd_29)

        .dataa(kbd_24),
        .datab(kbd_29),
        .datac(a_13),
        .datad(a_8),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector6~1405 ),
        .regout(),
        .cout(),
        .cascout(\Selector6~1436 ));
// synopsys translate_off
defparam \Selector6~1405_I .clock_enable_mode = "false";
defparam \Selector6~1405_I .lut_mask = "f351";
defparam \Selector6~1405_I .operation_mode = "normal";
defparam \Selector6~1405_I .output_mode = "none";
defparam \Selector6~1405_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_I35
flex10ke_lcell \Selector6~1411_I (
// Equation(s):
// \Selector6~1411  = (kbd_28 & \a~dataout [12] & (\a~dataout [11] # !kbd_27) # !kbd_28 & (\a~dataout [11] # !kbd_27)) & CASCADE(\Selector6~1436 )

        .dataa(kbd_28),
        .datab(kbd_27),
        .datac(a_11),
        .datad(a_12),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector6~1436 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector6~1411 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector6~1411_I .clock_enable_mode = "false";
defparam \Selector6~1411_I .lut_mask = "f351";
defparam \Selector6~1411_I .operation_mode = "normal";
defparam \Selector6~1411_I .output_mode = "comb_only";
defparam \Selector6~1411_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_I36
flex10ke_lcell \Selector6~1403_I (
// Equation(s):
// \Selector6~1433  = kbd_31 & \a~dataout [15] & (\a~dataout [10] # !kbd_26) # !kbd_31 & (\a~dataout [10] # !kbd_26)

        .dataa(kbd_31),
        .datab(kbd_26),
        .datac(a_10),
        .datad(a_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector6~1403 ),
        .regout(),
        .cout(),
        .cascout(\Selector6~1433 ));
// synopsys translate_off
defparam \Selector6~1403_I .clock_enable_mode = "false";
defparam \Selector6~1403_I .lut_mask = "f351";
defparam \Selector6~1403_I .operation_mode = "normal";
defparam \Selector6~1403_I .output_mode = "none";
defparam \Selector6~1403_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_I36
flex10ke_lcell \Selector6~1410_I (
// Equation(s):
// \Selector6~1410  = (kbd_30 & \a~dataout [14] & (\a~dataout [9] # !kbd_25) # !kbd_30 & (\a~dataout [9] # !kbd_25)) & CASCADE(\Selector6~1433 )

        .dataa(kbd_30),
        .datab(kbd_25),
        .datac(a_9),
        .datad(a_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector6~1433 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector6~1410 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector6~1410_I .clock_enable_mode = "false";
defparam \Selector6~1410_I .lut_mask = "f351";
defparam \Selector6~1410_I .operation_mode = "normal";
defparam \Selector6~1410_I .output_mode = "comb_only";
defparam \Selector6~1410_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_I36
flex10ke_lcell \Selector6~1394_I (
// Equation(s):
// \Selector6~1394  = \a~dataout [5] & (\Selector6~1411  & \Selector6~1410  # !\Selector7~1883 )

        .dataa(\Selector7~1883 ),
        .datab(\Selector6~1411 ),
        .datac(\Selector6~1410 ),
        .datad(a_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector6~1394 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector6~1394_I .clock_enable_mode = "false";
defparam \Selector6~1394_I .lut_mask = "d500";
defparam \Selector6~1394_I .operation_mode = "normal";
defparam \Selector6~1394_I .output_mode = "comb_only";
defparam \Selector6~1394_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_E31
flex10ke_lcell \Selector6~1390_I (
// Equation(s):
// \Selector6~1390  = \a~dataout [10] & (musy_1) # !\a~dataout [10] & musx_1

        .dataa(vcc),
        .datab(a_10),
        .datac(musx_1),
        .datad(musy_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector6~1390 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector6~1390_I .clock_enable_mode = "false";
defparam \Selector6~1390_I .lut_mask = "fc30";
defparam \Selector6~1390_I .operation_mode = "normal";
defparam \Selector6~1390_I .output_mode = "comb_only";
defparam \Selector6~1390_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_I32
flex10ke_lcell \Selector6~1391_I (
// Equation(s):
// \Selector6~1391  = \a~dataout [8] & (\Selector6~1390 ) # !\a~dataout [8] & musbtn_1 # !\Selector7~1861 

        .dataa(\Selector7~1861 ),
        .datab(a_8),
        .datac(musbtn_1),
        .datad(\Selector6~1390 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector6~1391 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector6~1391_I .clock_enable_mode = "false";
defparam \Selector6~1391_I .lut_mask = "fd75";
defparam \Selector6~1391_I .operation_mode = "normal";
defparam \Selector6~1391_I .output_mode = "comb_only";
defparam \Selector6~1391_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H33
flex10ke_lcell \Selector6~1395_I (
// Equation(s):
// \Selector6~1430  = !\Selector6~1394  & \Equal0~46  & (!\Equal9~59  # !\Selector6~1391 )

        .dataa(\Selector6~1394 ),
        .datab(\Selector6~1391 ),
        .datac(\Equal9~59 ),
        .datad(\Equal0~46 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector6~1395 ),
        .regout(),
        .cout(),
        .cascout(\Selector6~1430 ));
// synopsys translate_off
defparam \Selector6~1395_I .clock_enable_mode = "false";
defparam \Selector6~1395_I .lut_mask = "1500";
defparam \Selector6~1395_I .operation_mode = "normal";
defparam \Selector6~1395_I .output_mode = "none";
defparam \Selector6~1395_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H32
flex10ke_lcell \idehiin[2]~I (
// Equation(s):
// idehiin[2] = DFFEA(\ide_d[10]~5 , GLOBAL(\clkz_in~dataout ), , , \idein_lo_rd~25 , , )

        .dataa(\idein_lo_rd~25 ),
        .datab(vcc),
        .datac(vcc),
        .datad(ide_d_10),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idehiin[2]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idehiin[2]~I .clock_enable_mode = "true";
defparam \idehiin[2]~I .lut_mask = "ff00";
defparam \idehiin[2]~I .operation_mode = "normal";
defparam \idehiin[2]~I .output_mode = "reg_only";
defparam \idehiin[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H32
flex10ke_lcell \Selector5~1387_I (
// Equation(s):
// \Selector5~1387  = !\a~dataout [2] & \a~dataout [0] & (idehiin[2] # !\Equal19~29 )

        .dataa(a_2),
        .datab(\Equal19~29 ),
        .datac(idehiin[2]),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector5~1387 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector5~1387_I .clock_enable_mode = "false";
defparam \Selector5~1387_I .lut_mask = "5100";
defparam \Selector5~1387_I .operation_mode = "normal";
defparam \Selector5~1387_I .output_mode = "comb_only";
defparam \Selector5~1387_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H6
flex10ke_lcell \Selector5~1385_I (
// Equation(s):
// \Selector5~1385  = !\a~dataout [7] & !\a~dataout [5] & dout_2 # !\Selector7~1873 

        .dataa(\Selector7~1873 ),
        .datab(a_7),
        .datac(a_5),
        .datad(dout_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector5~1385 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector5~1385_I .clock_enable_mode = "false";
defparam \Selector5~1385_I .lut_mask = "5755";
defparam \Selector5~1385_I .operation_mode = "normal";
defparam \Selector5~1385_I .output_mode = "comb_only";
defparam \Selector5~1385_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H6
flex10ke_lcell \Selector5~1386_I (
// Equation(s):
// \Selector5~1386  = \Selector5~1385  # \Equal0~44  & (wait_reg_2 # !\always6~2 )

        .dataa(\always6~2 ),
        .datab(wait_reg_2),
        .datac(\Equal0~44 ),
        .datad(\Selector5~1385 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector5~1386 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector5~1386_I .clock_enable_mode = "false";
defparam \Selector5~1386_I .lut_mask = "ffd0";
defparam \Selector5~1386_I .operation_mode = "normal";
defparam \Selector5~1386_I .output_mode = "comb_only";
defparam \Selector5~1386_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H32
flex10ke_lcell \Selector5~1388_I (
// Equation(s):
// \Selector5~1424  = !\Selector5~1387  & (\a~dataout [1] & !\Selector5~1386  & \a~dataout [2] # !\a~dataout [1] & (!\a~dataout [2]))

        .dataa(\Selector5~1387 ),
        .datab(\Selector5~1386 ),
        .datac(a_1),
        .datad(a_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector5~1388 ),
        .regout(),
        .cout(),
        .cascout(\Selector5~1424 ));
// synopsys translate_off
defparam \Selector5~1388_I .clock_enable_mode = "false";
defparam \Selector5~1388_I .lut_mask = "1005";
defparam \Selector5~1388_I .operation_mode = "normal";
defparam \Selector5~1388_I .output_mode = "none";
defparam \Selector5~1388_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_B27
flex10ke_lcell \Selector5~1405_I (
// Equation(s):
// \Selector5~1436  = kbd_16 & \a~dataout [8] & (\a~dataout [13] # !kbd_21) # !kbd_16 & (\a~dataout [13] # !kbd_21)

        .dataa(kbd_16),
        .datab(kbd_21),
        .datac(a_13),
        .datad(a_8),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector5~1405 ),
        .regout(),
        .cout(),
        .cascout(\Selector5~1436 ));
// synopsys translate_off
defparam \Selector5~1405_I .clock_enable_mode = "false";
defparam \Selector5~1405_I .lut_mask = "f351";
defparam \Selector5~1405_I .operation_mode = "normal";
defparam \Selector5~1405_I .output_mode = "none";
defparam \Selector5~1405_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_B27
flex10ke_lcell \Selector5~1411_I (
// Equation(s):
// \Selector5~1411  = (kbd_20 & \a~dataout [12] & (\a~dataout [11] # !kbd_19) # !kbd_20 & (\a~dataout [11] # !kbd_19)) & CASCADE(\Selector5~1436 )

        .dataa(kbd_20),
        .datab(kbd_19),
        .datac(a_11),
        .datad(a_12),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector5~1436 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector5~1411 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector5~1411_I .clock_enable_mode = "false";
defparam \Selector5~1411_I .lut_mask = "f351";
defparam \Selector5~1411_I .operation_mode = "normal";
defparam \Selector5~1411_I .output_mode = "comb_only";
defparam \Selector5~1411_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B22
flex10ke_lcell \Selector5~1403_I (
// Equation(s):
// \Selector5~1433  = kbd_23 & \a~dataout [15] & (\a~dataout [10] # !kbd_18) # !kbd_23 & (\a~dataout [10] # !kbd_18)

        .dataa(kbd_23),
        .datab(kbd_18),
        .datac(a_10),
        .datad(a_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector5~1403 ),
        .regout(),
        .cout(),
        .cascout(\Selector5~1433 ));
// synopsys translate_off
defparam \Selector5~1403_I .clock_enable_mode = "false";
defparam \Selector5~1403_I .lut_mask = "f351";
defparam \Selector5~1403_I .operation_mode = "normal";
defparam \Selector5~1403_I .output_mode = "none";
defparam \Selector5~1403_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B22
flex10ke_lcell \Selector5~1410_I (
// Equation(s):
// \Selector5~1410  = (kbd_22 & \a~dataout [14] & (\a~dataout [9] # !kbd_17) # !kbd_22 & (\a~dataout [9] # !kbd_17)) & CASCADE(\Selector5~1433 )

        .dataa(kbd_22),
        .datab(kbd_17),
        .datac(a_9),
        .datad(a_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector5~1433 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector5~1410 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector5~1410_I .clock_enable_mode = "false";
defparam \Selector5~1410_I .lut_mask = "f351";
defparam \Selector5~1410_I .operation_mode = "normal";
defparam \Selector5~1410_I .output_mode = "comb_only";
defparam \Selector5~1410_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_B27
flex10ke_lcell \Selector5~1394_I (
// Equation(s):
// \Selector5~1394  = \a~dataout [5] & (\Selector5~1411  & \Selector5~1410  # !\Selector7~1883 )

        .dataa(\Selector7~1883 ),
        .datab(\Selector5~1411 ),
        .datac(\Selector5~1410 ),
        .datad(a_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector5~1394 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector5~1394_I .clock_enable_mode = "false";
defparam \Selector5~1394_I .lut_mask = "d500";
defparam \Selector5~1394_I .operation_mode = "normal";
defparam \Selector5~1394_I .output_mode = "comb_only";
defparam \Selector5~1394_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_E34
flex10ke_lcell \Selector5~1390_I (
// Equation(s):
// \Selector5~1390  = \a~dataout [10] & (musy_2) # !\a~dataout [10] & musx_2

        .dataa(vcc),
        .datab(a_10),
        .datac(musx_2),
        .datad(musy_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector5~1390 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector5~1390_I .clock_enable_mode = "false";
defparam \Selector5~1390_I .lut_mask = "fc30";
defparam \Selector5~1390_I .operation_mode = "normal";
defparam \Selector5~1390_I .output_mode = "comb_only";
defparam \Selector5~1390_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_E34
flex10ke_lcell \Selector5~1391_I (
// Equation(s):
// \Selector5~1391  = \a~dataout [8] & (\Selector5~1390 ) # !\a~dataout [8] & musbtn_2 # !\Selector7~1861 

        .dataa(\Selector7~1861 ),
        .datab(a_8),
        .datac(musbtn_2),
        .datad(\Selector5~1390 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector5~1391 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector5~1391_I .clock_enable_mode = "false";
defparam \Selector5~1391_I .lut_mask = "fd75";
defparam \Selector5~1391_I .operation_mode = "normal";
defparam \Selector5~1391_I .output_mode = "comb_only";
defparam \Selector5~1391_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_E34
flex10ke_lcell \Selector5~1395_I (
// Equation(s):
// \Selector5~1430  = !\Selector5~1394  & \Equal0~46  & (!\Equal9~59  # !\Selector5~1391 )

        .dataa(\Selector5~1394 ),
        .datab(\Selector5~1391 ),
        .datac(\Equal9~59 ),
        .datad(\Equal0~46 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector5~1395 ),
        .regout(),
        .cout(),
        .cascout(\Selector5~1430 ));
// synopsys translate_off
defparam \Selector5~1395_I .clock_enable_mode = "false";
defparam \Selector5~1395_I .lut_mask = "1500";
defparam \Selector5~1395_I .operation_mode = "normal";
defparam \Selector5~1395_I .output_mode = "none";
defparam \Selector5~1395_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H3
flex10ke_lcell \idehiin[3]~I (
// Equation(s):
// idehiin[3] = DFFEA(\ide_d[11]~4 , GLOBAL(\clkz_in~dataout ), , , \idein_lo_rd~25 , , )

        .dataa(\idein_lo_rd~25 ),
        .datab(vcc),
        .datac(vcc),
        .datad(ide_d_11),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idehiin[3]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idehiin[3]~I .clock_enable_mode = "true";
defparam \idehiin[3]~I .lut_mask = "ff00";
defparam \idehiin[3]~I .operation_mode = "normal";
defparam \idehiin[3]~I .output_mode = "reg_only";
defparam \idehiin[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H17
flex10ke_lcell \Selector4~1387_I (
// Equation(s):
// \Selector4~1387  = !\a~dataout [2] & \a~dataout [0] & (idehiin[3] # !\Equal19~29 )

        .dataa(a_2),
        .datab(\Equal19~29 ),
        .datac(idehiin[3]),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector4~1387 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector4~1387_I .clock_enable_mode = "false";
defparam \Selector4~1387_I .lut_mask = "5100";
defparam \Selector4~1387_I .operation_mode = "normal";
defparam \Selector4~1387_I .output_mode = "comb_only";
defparam \Selector4~1387_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H15
flex10ke_lcell \Selector4~1385_I (
// Equation(s):
// \Selector4~1385  = !\a~dataout [7] & !\a~dataout [5] & dout_3 # !\Selector7~1873 

        .dataa(\Selector7~1873 ),
        .datab(a_7),
        .datac(a_5),
        .datad(dout_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector4~1385 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector4~1385_I .clock_enable_mode = "false";
defparam \Selector4~1385_I .lut_mask = "5755";
defparam \Selector4~1385_I .operation_mode = "normal";
defparam \Selector4~1385_I .output_mode = "comb_only";
defparam \Selector4~1385_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H15
flex10ke_lcell \Selector4~1386_I (
// Equation(s):
// \Selector4~1386  = \Selector4~1385  # \Equal0~44  & (wait_reg_3 # !\always6~2 )

        .dataa(\always6~2 ),
        .datab(wait_reg_3),
        .datac(\Equal0~44 ),
        .datad(\Selector4~1385 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector4~1386 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector4~1386_I .clock_enable_mode = "false";
defparam \Selector4~1386_I .lut_mask = "ffd0";
defparam \Selector4~1386_I .operation_mode = "normal";
defparam \Selector4~1386_I .output_mode = "comb_only";
defparam \Selector4~1386_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H17
flex10ke_lcell \Selector4~1388_I (
// Equation(s):
// \Selector4~1424  = !\Selector4~1387  & (\a~dataout [1] & !\Selector4~1386  & \a~dataout [2] # !\a~dataout [1] & (!\a~dataout [2]))

        .dataa(\Selector4~1387 ),
        .datab(\Selector4~1386 ),
        .datac(a_1),
        .datad(a_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector4~1388 ),
        .regout(),
        .cout(),
        .cascout(\Selector4~1424 ));
// synopsys translate_off
defparam \Selector4~1388_I .clock_enable_mode = "false";
defparam \Selector4~1388_I .lut_mask = "1005";
defparam \Selector4~1388_I .operation_mode = "normal";
defparam \Selector4~1388_I .output_mode = "none";
defparam \Selector4~1388_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_B29
flex10ke_lcell \Selector4~1405_I (
// Equation(s):
// \Selector4~1436  = kbd_8 & \a~dataout [8] & (\a~dataout [13] # !kbd_13) # !kbd_8 & (\a~dataout [13] # !kbd_13)

        .dataa(kbd_8),
        .datab(kbd_13),
        .datac(a_13),
        .datad(a_8),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector4~1405 ),
        .regout(),
        .cout(),
        .cascout(\Selector4~1436 ));
// synopsys translate_off
defparam \Selector4~1405_I .clock_enable_mode = "false";
defparam \Selector4~1405_I .lut_mask = "f351";
defparam \Selector4~1405_I .operation_mode = "normal";
defparam \Selector4~1405_I .output_mode = "none";
defparam \Selector4~1405_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_B29
flex10ke_lcell \Selector4~1411_I (
// Equation(s):
// \Selector4~1411  = (kbd_12 & \a~dataout [12] & (\a~dataout [11] # !kbd_11) # !kbd_12 & (\a~dataout [11] # !kbd_11)) & CASCADE(\Selector4~1436 )

        .dataa(kbd_12),
        .datab(kbd_11),
        .datac(a_11),
        .datad(a_12),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector4~1436 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector4~1411 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector4~1411_I .clock_enable_mode = "false";
defparam \Selector4~1411_I .lut_mask = "f351";
defparam \Selector4~1411_I .operation_mode = "normal";
defparam \Selector4~1411_I .output_mode = "comb_only";
defparam \Selector4~1411_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_B24
flex10ke_lcell \Selector4~1403_I (
// Equation(s):
// \Selector4~1433  = kbd_15 & \a~dataout [15] & (\a~dataout [10] # !kbd_10) # !kbd_15 & (\a~dataout [10] # !kbd_10)

        .dataa(kbd_15),
        .datab(kbd_10),
        .datac(a_10),
        .datad(a_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector4~1403 ),
        .regout(),
        .cout(),
        .cascout(\Selector4~1433 ));
// synopsys translate_off
defparam \Selector4~1403_I .clock_enable_mode = "false";
defparam \Selector4~1403_I .lut_mask = "f351";
defparam \Selector4~1403_I .operation_mode = "normal";
defparam \Selector4~1403_I .output_mode = "none";
defparam \Selector4~1403_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_B24
flex10ke_lcell \Selector4~1410_I (
// Equation(s):
// \Selector4~1410  = (kbd_14 & \a~dataout [14] & (\a~dataout [9] # !kbd_9) # !kbd_14 & (\a~dataout [9] # !kbd_9)) & CASCADE(\Selector4~1433 )

        .dataa(kbd_14),
        .datab(kbd_9),
        .datac(a_9),
        .datad(a_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector4~1433 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector4~1410 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector4~1410_I .clock_enable_mode = "false";
defparam \Selector4~1410_I .lut_mask = "f351";
defparam \Selector4~1410_I .operation_mode = "normal";
defparam \Selector4~1410_I .output_mode = "comb_only";
defparam \Selector4~1410_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_B24
flex10ke_lcell \Selector4~1394_I (
// Equation(s):
// \Selector4~1394  = \a~dataout [5] & (\Selector4~1411  & \Selector4~1410  # !\Selector7~1883 )

        .dataa(\Selector7~1883 ),
        .datab(\Selector4~1411 ),
        .datac(\Selector4~1410 ),
        .datad(a_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector4~1394 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector4~1394_I .clock_enable_mode = "false";
defparam \Selector4~1394_I .lut_mask = "d500";
defparam \Selector4~1394_I .operation_mode = "normal";
defparam \Selector4~1394_I .output_mode = "comb_only";
defparam \Selector4~1394_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_E29
flex10ke_lcell \Selector4~1390_I (
// Equation(s):
// \Selector4~1390  = \a~dataout [10] & (musy_3) # !\a~dataout [10] & musx_3

        .dataa(vcc),
        .datab(a_10),
        .datac(musx_3),
        .datad(musy_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector4~1390 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector4~1390_I .clock_enable_mode = "false";
defparam \Selector4~1390_I .lut_mask = "fc30";
defparam \Selector4~1390_I .operation_mode = "normal";
defparam \Selector4~1390_I .output_mode = "comb_only";
defparam \Selector4~1390_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_E29
flex10ke_lcell \Selector4~1391_I (
// Equation(s):
// \Selector4~1391  = \a~dataout [8] & (\Selector4~1390 ) # !\a~dataout [8] & musbtn_3 # !\Selector7~1861 

        .dataa(\Selector7~1861 ),
        .datab(a_8),
        .datac(musbtn_3),
        .datad(\Selector4~1390 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector4~1391 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector4~1391_I .clock_enable_mode = "false";
defparam \Selector4~1391_I .lut_mask = "fd75";
defparam \Selector4~1391_I .operation_mode = "normal";
defparam \Selector4~1391_I .output_mode = "comb_only";
defparam \Selector4~1391_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_E29
flex10ke_lcell \Selector4~1395_I (
// Equation(s):
// \Selector4~1430  = !\Selector4~1394  & \Equal0~46  & (!\Equal9~59  # !\Selector4~1391 )

        .dataa(\Selector4~1394 ),
        .datab(\Selector4~1391 ),
        .datac(\Equal9~59 ),
        .datad(\Equal0~46 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector4~1395 ),
        .regout(),
        .cout(),
        .cascout(\Selector4~1430 ));
// synopsys translate_off
defparam \Selector4~1395_I .clock_enable_mode = "false";
defparam \Selector4~1395_I .lut_mask = "1500";
defparam \Selector4~1395_I .operation_mode = "normal";
defparam \Selector4~1395_I .output_mode = "none";
defparam \Selector4~1395_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H3
flex10ke_lcell \idehiin[4]~I (
// Equation(s):
// idehiin[4] = DFFEA(\ide_d[12]~3 , GLOBAL(\clkz_in~dataout ), , , \idein_lo_rd~25 , , )

        .dataa(\idein_lo_rd~25 ),
        .datab(vcc),
        .datac(vcc),
        .datad(ide_d_12),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idehiin[4]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idehiin[4]~I .clock_enable_mode = "true";
defparam \idehiin[4]~I .lut_mask = "ff00";
defparam \idehiin[4]~I .operation_mode = "normal";
defparam \idehiin[4]~I .output_mode = "reg_only";
defparam \idehiin[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H27
flex10ke_lcell \Selector3~1387_I (
// Equation(s):
// \Selector3~1387  = !\a~dataout [2] & \a~dataout [0] & (idehiin[4] # !\Equal19~29 )

        .dataa(a_2),
        .datab(\Equal19~29 ),
        .datac(idehiin[4]),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector3~1387 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector3~1387_I .clock_enable_mode = "false";
defparam \Selector3~1387_I .lut_mask = "5100";
defparam \Selector3~1387_I .operation_mode = "normal";
defparam \Selector3~1387_I .output_mode = "comb_only";
defparam \Selector3~1387_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H15
flex10ke_lcell \Selector3~1385_I (
// Equation(s):
// \Selector3~1385  = !\a~dataout [7] & !\a~dataout [5] & dout_4 # !\Selector7~1873 

        .dataa(\Selector7~1873 ),
        .datab(a_7),
        .datac(a_5),
        .datad(dout_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector3~1385 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector3~1385_I .clock_enable_mode = "false";
defparam \Selector3~1385_I .lut_mask = "5755";
defparam \Selector3~1385_I .operation_mode = "normal";
defparam \Selector3~1385_I .output_mode = "comb_only";
defparam \Selector3~1385_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H15
flex10ke_lcell \Selector3~1386_I (
// Equation(s):
// \Selector3~1386  = \Selector3~1385  # \Equal0~44  & (wait_reg_4 # !\always6~2 )

        .dataa(\always6~2 ),
        .datab(wait_reg_4),
        .datac(\Equal0~44 ),
        .datad(\Selector3~1385 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector3~1386 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector3~1386_I .clock_enable_mode = "false";
defparam \Selector3~1386_I .lut_mask = "ffd0";
defparam \Selector3~1386_I .operation_mode = "normal";
defparam \Selector3~1386_I .output_mode = "comb_only";
defparam \Selector3~1386_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H27
flex10ke_lcell \Selector3~1388_I (
// Equation(s):
// \Selector3~1424  = !\Selector3~1387  & (\a~dataout [1] & !\Selector3~1386  & \a~dataout [2] # !\a~dataout [1] & (!\a~dataout [2]))

        .dataa(\Selector3~1387 ),
        .datab(\Selector3~1386 ),
        .datac(a_1),
        .datad(a_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector3~1388 ),
        .regout(),
        .cout(),
        .cascout(\Selector3~1424 ));
// synopsys translate_off
defparam \Selector3~1388_I .clock_enable_mode = "false";
defparam \Selector3~1388_I .lut_mask = "1005";
defparam \Selector3~1388_I .operation_mode = "normal";
defparam \Selector3~1388_I .output_mode = "none";
defparam \Selector3~1388_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A32
flex10ke_lcell \Selector3~1405_I (
// Equation(s):
// \Selector3~1436  = kbd_0 & \a~dataout [8] & (\a~dataout [13] # !kbd_5) # !kbd_0 & (\a~dataout [13] # !kbd_5)

        .dataa(kbd_0),
        .datab(kbd_5),
        .datac(a_13),
        .datad(a_8),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector3~1405 ),
        .regout(),
        .cout(),
        .cascout(\Selector3~1436 ));
// synopsys translate_off
defparam \Selector3~1405_I .clock_enable_mode = "false";
defparam \Selector3~1405_I .lut_mask = "f351";
defparam \Selector3~1405_I .operation_mode = "normal";
defparam \Selector3~1405_I .output_mode = "none";
defparam \Selector3~1405_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A32
flex10ke_lcell \Selector3~1411_I (
// Equation(s):
// \Selector3~1411  = (kbd_4 & \a~dataout [12] & (\a~dataout [11] # !kbd_3) # !kbd_4 & (\a~dataout [11] # !kbd_3)) & CASCADE(\Selector3~1436 )

        .dataa(kbd_4),
        .datab(kbd_3),
        .datac(a_11),
        .datad(a_12),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector3~1436 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector3~1411 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector3~1411_I .clock_enable_mode = "false";
defparam \Selector3~1411_I .lut_mask = "f351";
defparam \Selector3~1411_I .operation_mode = "normal";
defparam \Selector3~1411_I .output_mode = "comb_only";
defparam \Selector3~1411_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_A23
flex10ke_lcell \Selector3~1403_I (
// Equation(s):
// \Selector3~1433  = kbd_7 & \a~dataout [15] & (\a~dataout [10] # !kbd_2) # !kbd_7 & (\a~dataout [10] # !kbd_2)

        .dataa(kbd_7),
        .datab(kbd_2),
        .datac(a_10),
        .datad(a_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector3~1403 ),
        .regout(),
        .cout(),
        .cascout(\Selector3~1433 ));
// synopsys translate_off
defparam \Selector3~1403_I .clock_enable_mode = "false";
defparam \Selector3~1403_I .lut_mask = "f351";
defparam \Selector3~1403_I .operation_mode = "normal";
defparam \Selector3~1403_I .output_mode = "none";
defparam \Selector3~1403_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_A23
flex10ke_lcell \Selector3~1410_I (
// Equation(s):
// \Selector3~1410  = (kbd_6 & \a~dataout [14] & (\a~dataout [9] # !kbd_1) # !kbd_6 & (\a~dataout [9] # !kbd_1)) & CASCADE(\Selector3~1433 )

        .dataa(kbd_6),
        .datab(kbd_1),
        .datac(a_9),
        .datad(a_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(\Selector3~1433 ),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector3~1410 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector3~1410_I .clock_enable_mode = "false";
defparam \Selector3~1410_I .lut_mask = "f351";
defparam \Selector3~1410_I .operation_mode = "normal";
defparam \Selector3~1410_I .output_mode = "comb_only";
defparam \Selector3~1410_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A23
flex10ke_lcell \Selector3~1394_I (
// Equation(s):
// \Selector3~1394  = \a~dataout [5] & (\Selector3~1411  & \Selector3~1410  # !\Selector7~1883 )

        .dataa(\Selector7~1883 ),
        .datab(\Selector3~1411 ),
        .datac(\Selector3~1410 ),
        .datad(a_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector3~1394 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector3~1394_I .clock_enable_mode = "false";
defparam \Selector3~1394_I .lut_mask = "d500";
defparam \Selector3~1394_I .operation_mode = "normal";
defparam \Selector3~1394_I .output_mode = "comb_only";
defparam \Selector3~1394_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_E19
flex10ke_lcell \Selector3~1390_I (
// Equation(s):
// \Selector3~1390  = \a~dataout [10] & (musy_4) # !\a~dataout [10] & musx_4

        .dataa(vcc),
        .datab(a_10),
        .datac(musx_4),
        .datad(musy_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector3~1390 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector3~1390_I .clock_enable_mode = "false";
defparam \Selector3~1390_I .lut_mask = "fc30";
defparam \Selector3~1390_I .operation_mode = "normal";
defparam \Selector3~1390_I .output_mode = "comb_only";
defparam \Selector3~1390_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_E26
flex10ke_lcell \Selector3~1391_I (
// Equation(s):
// \Selector3~1391  = \a~dataout [8] & (\Selector3~1390 ) # !\a~dataout [8] & musbtn_4 # !\Selector7~1861 

        .dataa(\Selector7~1861 ),
        .datab(a_8),
        .datac(musbtn_4),
        .datad(\Selector3~1390 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector3~1391 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector3~1391_I .clock_enable_mode = "false";
defparam \Selector3~1391_I .lut_mask = "fd75";
defparam \Selector3~1391_I .operation_mode = "normal";
defparam \Selector3~1391_I .output_mode = "comb_only";
defparam \Selector3~1391_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A23
flex10ke_lcell \Selector3~1395_I (
// Equation(s):
// \Selector3~1430  = !\Selector3~1394  & \Equal0~46  & (!\Equal9~59  # !\Selector3~1391 )

        .dataa(\Selector3~1394 ),
        .datab(\Selector3~1391 ),
        .datac(\Equal9~59 ),
        .datad(\Equal0~46 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector3~1395 ),
        .regout(),
        .cout(),
        .cascout(\Selector3~1430 ));
// synopsys translate_off
defparam \Selector3~1395_I .clock_enable_mode = "false";
defparam \Selector3~1395_I .lut_mask = "1500";
defparam \Selector3~1395_I .operation_mode = "normal";
defparam \Selector3~1395_I .output_mode = "none";
defparam \Selector3~1395_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H3
flex10ke_lcell \idehiin[5]~I (
// Equation(s):
// idehiin[5] = DFFEA(\ide_d[13]~2 , GLOBAL(\clkz_in~dataout ), , , \idein_lo_rd~25 , , )

        .dataa(\idein_lo_rd~25 ),
        .datab(vcc),
        .datac(vcc),
        .datad(ide_d_13),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idehiin[5]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idehiin[5]~I .clock_enable_mode = "true";
defparam \idehiin[5]~I .lut_mask = "ff00";
defparam \idehiin[5]~I .operation_mode = "normal";
defparam \idehiin[5]~I .output_mode = "reg_only";
defparam \idehiin[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H8
flex10ke_lcell \Selector2~1464_I (
// Equation(s):
// \Selector2~1464  = !\a~dataout [2] & \a~dataout [0] & (idehiin[5] # !\Equal19~29 )

        .dataa(a_2),
        .datab(\Equal19~29 ),
        .datac(idehiin[5]),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector2~1464 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector2~1464_I .clock_enable_mode = "false";
defparam \Selector2~1464_I .lut_mask = "5100";
defparam \Selector2~1464_I .operation_mode = "normal";
defparam \Selector2~1464_I .output_mode = "comb_only";
defparam \Selector2~1464_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H11
flex10ke_lcell \Selector2~1462_I (
// Equation(s):
// \Selector2~1462  = !\a~dataout [7] & !\a~dataout [5] & dout_5 # !\Selector7~1873 

        .dataa(\Selector7~1873 ),
        .datab(a_7),
        .datac(a_5),
        .datad(dout_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector2~1462 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector2~1462_I .clock_enable_mode = "false";
defparam \Selector2~1462_I .lut_mask = "5755";
defparam \Selector2~1462_I .operation_mode = "normal";
defparam \Selector2~1462_I .output_mode = "comb_only";
defparam \Selector2~1462_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H11
flex10ke_lcell \Selector2~1463_I (
// Equation(s):
// \Selector2~1463  = \Selector2~1462  # \Equal0~44  & (wait_reg_5 # !\always6~2 )

        .dataa(\always6~2 ),
        .datab(wait_reg_5),
        .datac(\Equal0~44 ),
        .datad(\Selector2~1462 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector2~1463 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector2~1463_I .clock_enable_mode = "false";
defparam \Selector2~1463_I .lut_mask = "ffd0";
defparam \Selector2~1463_I .operation_mode = "normal";
defparam \Selector2~1463_I .output_mode = "comb_only";
defparam \Selector2~1463_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H8
flex10ke_lcell \Selector2~1465_I (
// Equation(s):
// \Selector2~1482  = !\Selector2~1464  & (\a~dataout [1] & !\Selector2~1463  & \a~dataout [2] # !\a~dataout [1] & (!\a~dataout [2]))

        .dataa(\Selector2~1464 ),
        .datab(\Selector2~1463 ),
        .datac(a_1),
        .datad(a_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector2~1465 ),
        .regout(),
        .cout(),
        .cascout(\Selector2~1482 ));
// synopsys translate_off
defparam \Selector2~1465_I .clock_enable_mode = "false";
defparam \Selector2~1465_I .lut_mask = "1005";
defparam \Selector2~1465_I .operation_mode = "normal";
defparam \Selector2~1465_I .output_mode = "none";
defparam \Selector2~1465_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_H34
flex10ke_lcell \idehiin[6]~I (
// Equation(s):
// idehiin[6] = DFFEA(\ide_d[14]~1 , GLOBAL(\clkz_in~dataout ), , , \idein_lo_rd~25 , , )

        .dataa(\idein_lo_rd~25 ),
        .datab(vcc),
        .datac(vcc),
        .datad(ide_d_14),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idehiin[6]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idehiin[6]~I .clock_enable_mode = "true";
defparam \idehiin[6]~I .lut_mask = "ff00";
defparam \idehiin[6]~I .operation_mode = "normal";
defparam \idehiin[6]~I .output_mode = "reg_only";
defparam \idehiin[6]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H34
flex10ke_lcell \Selector1~1396_I (
// Equation(s):
// \Selector1~1396  = !\a~dataout [2] & \a~dataout [0] & (idehiin[6] # !\Equal19~29 )

        .dataa(a_2),
        .datab(\Equal19~29 ),
        .datac(idehiin[6]),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector1~1396 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector1~1396_I .clock_enable_mode = "false";
defparam \Selector1~1396_I .lut_mask = "5100";
defparam \Selector1~1396_I .operation_mode = "normal";
defparam \Selector1~1396_I .output_mode = "comb_only";
defparam \Selector1~1396_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H11
flex10ke_lcell \Selector1~1394_I (
// Equation(s):
// \Selector1~1394  = !\a~dataout [7] & !\a~dataout [5] & dout_6 # !\Selector7~1873 

        .dataa(\Selector7~1873 ),
        .datab(a_7),
        .datac(a_5),
        .datad(dout_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector1~1394 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector1~1394_I .clock_enable_mode = "false";
defparam \Selector1~1394_I .lut_mask = "5755";
defparam \Selector1~1394_I .operation_mode = "normal";
defparam \Selector1~1394_I .output_mode = "comb_only";
defparam \Selector1~1394_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_H11
flex10ke_lcell \Selector1~1395_I (
// Equation(s):
// \Selector1~1395  = \Selector1~1394  # \Equal0~44  & (wait_reg_6 # !\always6~2 )

        .dataa(\always6~2 ),
        .datab(wait_reg_6),
        .datac(\Equal0~44 ),
        .datad(\Selector1~1394 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector1~1395 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector1~1395_I .clock_enable_mode = "false";
defparam \Selector1~1395_I .lut_mask = "ffd0";
defparam \Selector1~1395_I .operation_mode = "normal";
defparam \Selector1~1395_I .output_mode = "comb_only";
defparam \Selector1~1395_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H34
flex10ke_lcell \Selector1~1397_I (
// Equation(s):
// \Selector1~1416  = !\Selector1~1396  & (\a~dataout [1] & !\Selector1~1395  & \a~dataout [2] # !\a~dataout [1] & (!\a~dataout [2]))

        .dataa(\Selector1~1396 ),
        .datab(\Selector1~1395 ),
        .datac(a_1),
        .datad(a_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector1~1397 ),
        .regout(),
        .cout(),
        .cascout(\Selector1~1416 ));
// synopsys translate_off
defparam \Selector1~1397_I .clock_enable_mode = "false";
defparam \Selector1~1397_I .lut_mask = "1005";
defparam \Selector1~1397_I .operation_mode = "normal";
defparam \Selector1~1397_I .output_mode = "none";
defparam \Selector1~1397_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H23
flex10ke_lcell \idehiin[7]~I (
// Equation(s):
// idehiin[7] = DFFEA(\ide_d[15]~0 , GLOBAL(\clkz_in~dataout ), , , \idein_lo_rd~25 , , )

        .dataa(\idein_lo_rd~25 ),
        .datab(vcc),
        .datac(vcc),
        .datad(ide_d_15),
        .aclr(gnd),
        .aload(gnd),
        .clk(zclk),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(idehiin[7]),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \idehiin[7]~I .clock_enable_mode = "true";
defparam \idehiin[7]~I .lut_mask = "ff00";
defparam \idehiin[7]~I .operation_mode = "normal";
defparam \idehiin[7]~I .output_mode = "reg_only";
defparam \idehiin[7]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H23
flex10ke_lcell \Selector0~1466_I (
// Equation(s):
// \Selector0~1466  = !\a~dataout [2] & \a~dataout [0] & (idehiin[7] # !\Equal19~29 )

        .dataa(a_2),
        .datab(\Equal19~29 ),
        .datac(idehiin[7]),
        .datad(a_0),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector0~1466 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector0~1466_I .clock_enable_mode = "false";
defparam \Selector0~1466_I .lut_mask = "5100";
defparam \Selector0~1466_I .operation_mode = "normal";
defparam \Selector0~1466_I .output_mode = "comb_only";
defparam \Selector0~1466_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_H6
flex10ke_lcell \Selector0~1464_I (
// Equation(s):
// \Selector0~1464  = !\a~dataout [7] & !\a~dataout [5] & dout_7 # !\Selector7~1873 

        .dataa(\Selector7~1873 ),
        .datab(a_7),
        .datac(a_5),
        .datad(dout_7),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector0~1464 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector0~1464_I .clock_enable_mode = "false";
defparam \Selector0~1464_I .lut_mask = "5755";
defparam \Selector0~1464_I .operation_mode = "normal";
defparam \Selector0~1464_I .output_mode = "comb_only";
defparam \Selector0~1464_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H6
flex10ke_lcell \Selector0~1465_I (
// Equation(s):
// \Selector0~1465  = \Selector0~1464  # \Equal0~44  & (wait_reg_7 # !\always6~2 )

        .dataa(\always6~2 ),
        .datab(wait_reg_7),
        .datac(\Equal0~44 ),
        .datad(\Selector0~1464 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector0~1465 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector0~1465_I .clock_enable_mode = "false";
defparam \Selector0~1465_I .lut_mask = "ffd0";
defparam \Selector0~1465_I .operation_mode = "normal";
defparam \Selector0~1465_I .output_mode = "comb_only";
defparam \Selector0~1465_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H23
flex10ke_lcell \Selector0~1467_I (
// Equation(s):
// \Selector0~1486  = !\Selector0~1466  & (\a~dataout [1] & !\Selector0~1465  & \a~dataout [2] # !\a~dataout [1] & (!\a~dataout [2]))

        .dataa(\Selector0~1466 ),
        .datab(\Selector0~1465 ),
        .datac(a_1),
        .datad(a_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector0~1467 ),
        .regout(),
        .cout(),
        .cascout(\Selector0~1486 ));
// synopsys translate_off
defparam \Selector0~1467_I .clock_enable_mode = "false";
defparam \Selector0~1467_I .lut_mask = "1005";
defparam \Selector0~1467_I .operation_mode = "normal";
defparam \Selector0~1467_I .output_mode = "none";
defparam \Selector0~1467_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H28
flex10ke_lcell \Selector6~1383_I (
// Equation(s):
// \Selector6~1383  = wait_reg_1 # !\a~dataout [0] # !\a~dataout [1]

        .dataa(vcc),
        .datab(a_1),
        .datac(a_0),
        .datad(wait_reg_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector6~1383 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector6~1383_I .clock_enable_mode = "false";
defparam \Selector6~1383_I .lut_mask = "ff3f";
defparam \Selector6~1383_I .operation_mode = "normal";
defparam \Selector6~1383_I .output_mode = "comb_only";
defparam \Selector6~1383_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H28
flex10ke_lcell \Selector6~1384_I (
// Equation(s):
// \Selector6~1419  = \a~dataout [5] & !\Selector6~1383  # !\a~dataout [5] & (!\ide_d[1]~14  & \Selector7~1856 )

        .dataa(\Selector6~1383 ),
        .datab(ide_d_1),
        .datac(a_5),
        .datad(\Selector7~1856 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector6~1384 ),
        .regout(),
        .cout(),
        .cascout(\Selector6~1419 ));
// synopsys translate_off
defparam \Selector6~1384_I .clock_enable_mode = "false";
defparam \Selector6~1384_I .lut_mask = "5350";
defparam \Selector6~1384_I .operation_mode = "normal";
defparam \Selector6~1384_I .output_mode = "none";
defparam \Selector6~1384_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H28
flex10ke_lcell \Selector5~1383_I (
// Equation(s):
// \Selector5~1383  = wait_reg_2 # !\a~dataout [0] # !\a~dataout [1]

        .dataa(vcc),
        .datab(a_1),
        .datac(a_0),
        .datad(wait_reg_2),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector5~1383 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector5~1383_I .clock_enable_mode = "false";
defparam \Selector5~1383_I .lut_mask = "ff3f";
defparam \Selector5~1383_I .operation_mode = "normal";
defparam \Selector5~1383_I .output_mode = "comb_only";
defparam \Selector5~1383_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC5_H28
flex10ke_lcell \Selector5~1384_I (
// Equation(s):
// \Selector5~1419  = \a~dataout [5] & !\Selector5~1383  # !\a~dataout [5] & (!\ide_d[2]~13  & \Selector7~1856 )

        .dataa(\Selector5~1383 ),
        .datab(ide_d_2),
        .datac(a_5),
        .datad(\Selector7~1856 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector5~1384 ),
        .regout(),
        .cout(),
        .cascout(\Selector5~1419 ));
// synopsys translate_off
defparam \Selector5~1384_I .clock_enable_mode = "false";
defparam \Selector5~1384_I .lut_mask = "5350";
defparam \Selector5~1384_I .operation_mode = "normal";
defparam \Selector5~1384_I .output_mode = "none";
defparam \Selector5~1384_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H12
flex10ke_lcell \Selector4~1383_I (
// Equation(s):
// \Selector4~1383  = wait_reg_3 # !\a~dataout [0] # !\a~dataout [1]

        .dataa(vcc),
        .datab(a_1),
        .datac(a_0),
        .datad(wait_reg_3),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector4~1383 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector4~1383_I .clock_enable_mode = "false";
defparam \Selector4~1383_I .lut_mask = "ff3f";
defparam \Selector4~1383_I .operation_mode = "normal";
defparam \Selector4~1383_I .output_mode = "comb_only";
defparam \Selector4~1383_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_H14
flex10ke_lcell \Selector4~1384_I (
// Equation(s):
// \Selector4~1419  = \a~dataout [5] & !\Selector4~1383  # !\a~dataout [5] & (!\ide_d[3]~12  & \Selector7~1856 )

        .dataa(\Selector4~1383 ),
        .datab(ide_d_3),
        .datac(a_5),
        .datad(\Selector7~1856 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector4~1384 ),
        .regout(),
        .cout(),
        .cascout(\Selector4~1419 ));
// synopsys translate_off
defparam \Selector4~1384_I .clock_enable_mode = "false";
defparam \Selector4~1384_I .lut_mask = "5350";
defparam \Selector4~1384_I .operation_mode = "normal";
defparam \Selector4~1384_I .output_mode = "none";
defparam \Selector4~1384_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H12
flex10ke_lcell \Selector3~1383_I (
// Equation(s):
// \Selector3~1383  = wait_reg_4 # !\a~dataout [0] # !\a~dataout [1]

        .dataa(vcc),
        .datab(a_1),
        .datac(a_0),
        .datad(wait_reg_4),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector3~1383 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector3~1383_I .clock_enable_mode = "false";
defparam \Selector3~1383_I .lut_mask = "ff3f";
defparam \Selector3~1383_I .operation_mode = "normal";
defparam \Selector3~1383_I .output_mode = "comb_only";
defparam \Selector3~1383_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H27
flex10ke_lcell \Selector3~1384_I (
// Equation(s):
// \Selector3~1419  = \a~dataout [5] & !\Selector3~1383  # !\a~dataout [5] & (!\ide_d[4]~11  & \Selector7~1856 )

        .dataa(\Selector3~1383 ),
        .datab(ide_d_4),
        .datac(a_5),
        .datad(\Selector7~1856 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector3~1384 ),
        .regout(),
        .cout(),
        .cascout(\Selector3~1419 ));
// synopsys translate_off
defparam \Selector3~1384_I .clock_enable_mode = "false";
defparam \Selector3~1384_I .lut_mask = "5350";
defparam \Selector3~1384_I .operation_mode = "normal";
defparam \Selector3~1384_I .output_mode = "none";
defparam \Selector3~1384_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_H14
flex10ke_lcell \Selector2~1460_I (
// Equation(s):
// \Selector2~1460  = wait_reg_5 # !\a~dataout [0] # !\a~dataout [1]

        .dataa(vcc),
        .datab(a_1),
        .datac(a_0),
        .datad(wait_reg_5),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector2~1460 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector2~1460_I .clock_enable_mode = "false";
defparam \Selector2~1460_I .lut_mask = "ff3f";
defparam \Selector2~1460_I .operation_mode = "normal";
defparam \Selector2~1460_I .output_mode = "comb_only";
defparam \Selector2~1460_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H14
flex10ke_lcell \Selector2~1461_I (
// Equation(s):
// \Selector2~1477  = \a~dataout [5] & !\Selector2~1460  # !\a~dataout [5] & (!\ide_d[5]~10  & \Selector7~1856 )

        .dataa(\Selector2~1460 ),
        .datab(ide_d_5),
        .datac(a_5),
        .datad(\Selector7~1856 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector2~1461 ),
        .regout(),
        .cout(),
        .cascout(\Selector2~1477 ));
// synopsys translate_off
defparam \Selector2~1461_I .clock_enable_mode = "false";
defparam \Selector2~1461_I .lut_mask = "5350";
defparam \Selector2~1461_I .operation_mode = "normal";
defparam \Selector2~1461_I .output_mode = "none";
defparam \Selector2~1461_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_H36
flex10ke_lcell \Selector1~1392_I (
// Equation(s):
// \Selector1~1392  = wait_reg_6 # !\a~dataout [0] # !\a~dataout [1]

        .dataa(vcc),
        .datab(a_1),
        .datac(a_0),
        .datad(wait_reg_6),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector1~1392 ),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \Selector1~1392_I .clock_enable_mode = "false";
defparam \Selector1~1392_I .lut_mask = "ff3f";
defparam \Selector1~1392_I .operation_mode = "normal";
defparam \Selector1~1392_I .output_mode = "comb_only";
defparam \Selector1~1392_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_H36
flex10ke_lcell \Selector1~1393_I (
// Equation(s):
// \Selector1~1411  = \a~dataout [5] & !\Selector1~1392  # !\a~dataout [5] & (!\ide_d[6]~9  & \Selector7~1856 )

        .dataa(\Selector1~1392 ),
        .datab(ide_d_6),
        .datac(a_5),
        .datad(\Selector7~1856 ),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(\Selector1~1393 ),
        .regout(),
        .cout(),
        .cascout(\Selector1~1411 ));
// synopsys translate_off
defparam \Selector1~1393_I .clock_enable_mode = "false";
defparam \Selector1~1393_I .lut_mask = "5350";
defparam \Selector1~1393_I .operation_mode = "normal";
defparam \Selector1~1393_I .output_mode = "none";
defparam \Selector1~1393_I .packed_mode = "false";
// synopsys translate_on

endmodule

module zwait (
        rst_out_n,
        waits_1,
        waits_0,
        WideNor0,
        spics_n_sync_1,
        spics_n_sync_2,
        sel_waitreg,
        wait_start_comport,
        wait_start_gluclock,
        WideNor01,
        devpor,
        devclrn,
        devoe);
input   rst_out_n;
output  waits_1;
output  waits_0;
output  WideNor0;
input   spics_n_sync_1;
input   spics_n_sync_2;
input   sel_waitreg;
input   wait_start_comport;
input   wait_start_gluclock;
output  WideNor01;
input   devpor;
input   devclrn;
input   devoe;

wire gnd = 1'b0;
wire vcc = 1'b1;

wire wait_off_n;


// atom is at LC6_D3
flex10ke_lcell \waits[1]~I (
// Equation(s):
// waits_1 = DFFEA(VCC, wait_start_comport, !wait_off_n, , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(wait_off_n),
        .aload(gnd),
        .clk(wait_start_comport),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(waits_1),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \waits[1]~I .clock_enable_mode = "false";
defparam \waits[1]~I .lut_mask = "ffff";
defparam \waits[1]~I .operation_mode = "normal";
defparam \waits[1]~I .output_mode = "reg_only";
defparam \waits[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_D3
flex10ke_lcell \waits[0]~I (
// Equation(s):
// waits_0 = DFFEA(VCC, wait_start_gluclock, !wait_off_n, , , , )

        .dataa(vcc),
        .datab(vcc),
        .datac(vcc),
        .datad(vcc),
        .aclr(wait_off_n),
        .aload(gnd),
        .clk(wait_start_gluclock),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(),
        .regout(waits_0),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \waits[0]~I .clock_enable_mode = "false";
defparam \waits[0]~I .lut_mask = "ffff";
defparam \waits[0]~I .operation_mode = "normal";
defparam \waits[0]~I .output_mode = "reg_only";
defparam \waits[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_D3
flex10ke_lcell \WideNor0~I (
// Equation(s):
// WideNor0 = !waits_0 & !waits_1

        .dataa(vcc),
        .datab(vcc),
        .datac(waits_0),
        .datad(waits_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(WideNor0),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \WideNor0~I .clock_enable_mode = "false";
defparam \WideNor0~I .lut_mask = "000f";
defparam \WideNor0~I .operation_mode = "normal";
defparam \WideNor0~I .output_mode = "comb_only";
defparam \WideNor0~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D3
flex10ke_lcell \WideNor0~1_I (
// Equation(s):
// WideNor01 = !waits_0 & !waits_1

        .dataa(vcc),
        .datab(vcc),
        .datac(waits_0),
        .datad(waits_1),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(WideNor01),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \WideNor0~1_I .clock_enable_mode = "false";
defparam \WideNor0~1_I .lut_mask = "000f";
defparam \WideNor0~1_I .operation_mode = "normal";
defparam \WideNor0~1_I .output_mode = "comb_only";
defparam \WideNor0~1_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D3
flex10ke_lcell \wait_off_n~I (
// Equation(s):
// wait_off_n = !spics_n_sync_2 & spics_n_sync_1 & sel_waitreg # !rst_out_n

        .dataa(rst_out_n),
        .datab(spics_n_sync_2),
        .datac(spics_n_sync_1),
        .datad(sel_waitreg),
        .aclr(gnd),
        .aload(gnd),
        .clk(gnd),
        .cin(gnd),
        .cascin(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .combout(wait_off_n),
        .regout(),
        .cout(),
        .cascout());
// synopsys translate_off
defparam \wait_off_n~I .clock_enable_mode = "false";
defparam \wait_off_n~I .lut_mask = "7555";
defparam \wait_off_n~I .operation_mode = "normal";
defparam \wait_off_n~I .output_mode = "comb_only";
defparam \wait_off_n~I .packed_mode = "false";
// synopsys translate_on

endmodule