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  1. // TurboFMpro project
  2. // (C) 2018 NedoPC
  3.  
  4. // configuration control:
  5. //  "port" Fx writes, jumpers -- inputs
  6. // config signals -- outputs
  7.  
  8. module cfg
  9. (
  10.         input  wire clk,
  11.         input  wire rst_n,
  12.  
  13.         input  wire [7:0] d, // data bus to latch config "port" writes from
  14.         input  wire       wrstb, // write strobe
  15.  
  16.         input  wire [1:0] mode, // 00 - single AY, 01 - turbo AY
  17.                                 // 10 - turbo FM,  11 - turbo FM + SAA
  18.  
  19.  
  20.         // for bus
  21.         output wire ym_sel,
  22.         output wire ym_stat,
  23.         output wire saa_sel,
  24.  
  25.         // for DAC gate
  26.         output wire fm_dac_ena
  27. );
  28.  
  29.         reg [3:0] cfg_port;
  30.  
  31.  
  32.         // conf[0] - YM curchip select ( 0 - select D0, 1 - select D1, !!!1 after reset!!! )
  33.         // conf[1] - YM stat reg select ( 1 - read register, 0 - read status )
  34.         // conf[2] - YM fm part disable ( 0 - enable, 1 - disable )
  35.         // conf[3] - SAA enable ( 0 - enable, 1 - disable )
  36.         always @(posedge clk, negedge rst_n)
  37.         if( !rst_n )
  38.                 cfg_port <= 4'b1111;
  39.         else if( wrstb )
  40.                 cfg_port <= d[3:0];
  41.  
  42.  
  43.         // make outputs
  44.         assign ym_sel = cfg_port[0] || (mode==2'b00); // select chip #1 forever when turbo anything is disabled
  45.        
  46.         assign ym_stat = mode[1] && !cfg_port[2] && !cfg_port[1]; // no status reads are possible when fm disabled either in config reg or by mode[1:0]
  47.  
  48.         assign saa_sel = !cfg_port[3] && (mode==2'b11);
  49.  
  50.  
  51.         assign fm_dac_ena = mode[1] && !cfg_port[2];
  52.  
  53. endmodule
  54.  
  55.