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  1.         cpu     kenbak
  2.         page    0
  3.  
  4.         org     4               ; locations 0..3 are registers
  5.  
  6. dest:
  7.  
  8.         ; the original machine instructions, which carry the
  9.         ; indirect flag in the instruction's mnemonic:
  10.  
  11.         irp     instr,jpd,jpi,jmd,jmi
  12.         instr   a,nz,dest
  13.         instr   b,non-zero,dest
  14.         instr   x,z,dest
  15.         instr   unconditional,zero,dest
  16.         instr   a,n,dest
  17.         instr   b,negative,dest
  18.         instr   x,p,dest
  19.         instr   unconditional,positive,dest
  20.         instr   a,pnz,dest
  21.         instr   b,positive-non-zero,dest
  22.         endm
  23.  
  24.         irp     instr,jpd,jpi,jmd,jmi
  25.         instr   dest
  26.         endm
  27.  
  28.         ; more generic variants, that relocate the indirect flag to
  29.         ; the addressing mode, similar to arithmetic/logic instructions:
  30.  
  31.         irp     instr,jp,jm
  32.         instr   a,nz,dest
  33.         instr   b,non-zero,dest
  34.         instr   x,z,dest
  35.         instr   unconditional,zero,dest
  36.         instr   a,n,dest
  37.         instr   b,negative,dest
  38.         instr   x,p,dest
  39.         instr   unconditional,positive,dest
  40.         instr   a,pnz,dest
  41.         instr   b,positive-non-zero,dest
  42.         instr   a,nz,(dest)
  43.         instr   b,non-zero,(dest)
  44.         instr   x,z,(dest)
  45.         instr   unconditional,zero,(dest)
  46.         instr   a,n,(dest)
  47.         instr   b,negative,(dest)
  48.         instr   x,p,(dest)
  49.         instr   unconditional,positive,(dest)
  50.         instr   a,pnz,(dest)
  51.         instr   b,positive-non-zero,(dest)
  52.         endm
  53.  
  54.         irp     instr,jp,jm
  55.         instr   dest
  56.         instr   (dest)
  57.         endm
  58.  
  59.         ; SKP0 and SKP1 will always skip two bytes, it is the programmer's
  60.         ; resposibility that this is either one two-byte insn or two one-byte insns.
  61.         ; One may optionally add a skip target.  While this won't show up in the
  62.         ; machine code, the assembler can verify if actually two bytes are skipped:
  63.  
  64.         skp0    6,12h
  65.         skp1    6,12h
  66.  
  67.         skp0    6,12h,next1
  68.         add     a,a
  69. next1:
  70.  
  71.         skp1    6,12h,next2
  72.         noop
  73.         noop
  74. next2:
  75.  
  76.         if      mompass>1
  77.         expect  1376
  78.         endif
  79.         skp1    6,12h,next3
  80.         if      mompass>1
  81.         endexpect
  82.         endif
  83.         halt
  84. next3:
  85.  
  86.         set0    6,12h
  87.         set1    6,12h
  88.  
  89.         irp     instr,sftl,sftr,rotl,rotr
  90.         irp     reg,a,b
  91.         instr   reg
  92.         instr   1,reg
  93.         instr   4,reg
  94.         endm
  95.         endm
  96.