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ifndef __reg72521inc ; avoid multiple inclusion__reg72521inc equ 1savelisting off ; no listing over this file;****************************************************************************;* *;* AS 1.42 - File REG72521.INC *;* *;* contains SFR and Bit Definitions for ST72521 *;* *;* Source: ST72521 Data Sheet, Rev. 5, May 2005 *;* *;****************************************************************************;----------------------------------------------------------------------------; Memory AddressesRAMSTART label $0080 ; start address internal RAMswitch substr(MOMCPUNAME,9,1)case "6"RAMEND label $047f ; end " " "case "9"RAMEND label $087f ; end " " "elsecasefatal "cannot deduce RAM size"endcase;----------------------------------------------------------------------------; Interrupt VectorsPWM_ART_vect label $ffe0 ; PWM ART interruptI2C_vect label $ffe2 ; I2C Peripheral interruptsAVD_vect label $ffe4 ; Auxiliary Voltage detector interruptSCI_vect label $ffe6 ; SCI Interrupt VectorTIMB_vect label $ffe8 ; TIMER B Interrupt VectorTIMA_vect label $ffea ; TIMER A Interrupt VectorSPI_vect label $ffec ; SPI Interrupt VectorCAN_vect label $ffee ; CAN Interrupt VectorEI3_vect label $fff0 ; External Interrupt Vector B7..4EI2_vect label $fff2 ; External Interrupt Vector B3..0EI1_vect label $fff4 ; External Interrupt Vector F2..0EI0_vect label $fff6 ; External Interrupt Vector A3..0MCC_RTC_vect label $fff8 ; Main clock controller time base interruptTLI_vect label $fffa ; External top level interruptTRAP_vect label $fffc ; TRAP (software) Interrupt VectorRESET_vect label $fffe ; RESET Vector;----------------------------------------------------------------------------; GPIOinclude "gpio.inc"__defgpio "PA",$0000__defgpio "PB",$0003__defgpio "PC",$0006__defgpio "PD",$0009__defgpio "PE",$000c__defgpio "PF",$000f__defgpio "PG",$0012__defgpio "PH",$0015;----------------------------------------------------------------------------; Miscellaneous;----------------------------------------------------------------------------; I2Cinclude "i2c.inc"__defi2c $0018;----------------------------------------------------------------------------; SPIinclude "spi2.inc"__defspi $0021;----------------------------------------------------------------------------; ITCISPR0 label $0024 ; Interrupt Software Priority Register 0I0_0 bit ISPR0,0 ; TLII1_0 bit ISPR0,1I0_1 bit ISPR0,2 ; MCC+SII1_1 bit ISPR0,3I0_2 bit ISPR0,4 ; EI0I1_2 bit ISPR0,5I0_3 bit ISPR0,6 ; EI1I1_3 bit ISPR0,7ISPR1 label $0025 ; Interrupt Software Priority Register 1I0_4 bit ISPR1,0 ; EI2I1_4 bit ISPR1,1I0_5 bit ISPR1,2 ; EI3I1_5 bit ISPR1,3I0_6 bit ISPR1,4I1_6 bit ISPR1,5I0_7 bit ISPR1,6 ; SPII1_7 bit ISPR1,7ISPR2 label $0026 ; Interrupt Software Priority Register 2I0_8 bit ISPR2,0 ; Timer AI1_8 bit ISPR2,1I0_9 bit ISPR2,2 ; Timer BI1_9 bit ISPR2,3I0_10 bit ISPR2,4 ; SCII1_10 bit ISPR2,5I0_11 bit ISPR2,6 ; AVDI1_11 bit ISPR2,7ISPR3 label $0027 ; Interrupt Software Priority Register 3I0_12 bit ISPR3,0 ; I2CI1_12 bit ISPR3,1I0_13 bit ISPR3,2 ; PWMARTI1_13 bit ISPR3,3EICR label $0028 ; External Interrupt Control RegisterIS1 bfield EICR,6,2 ; ei2 and ei3 sensitivityIPB bit EICR,5 ; Interrupt polarity for port BIS2 bfield EICR,3,2 ; ei0 and ei1 sensitivityIPA bit EICR,2 ; Interrupt polarity for port ATLIS bit EICR,1 ; TLI sensitivityTLIE bit EICR,0 ; TLI enable;----------------------------------------------------------------------------; FlashFCSR label $0029 ; Flash Control/Status Register;----------------------------------------------------------------------------; WatchdogWDGCR label $002a ; Watchdog Control RegisterWDGA bit WDGCR,7 ; Activation bit;----------------------------------------------------------------------------SICSR label $002b ; System Integrity Control/Status RegisterAVDS bit SICSR,7 ; Voltage Detection selectionAVDIE bit SICSR,6 ; Voltage Detector interrupt enableAVDF bit SICSR,5 ; Voltage Detector flagLVDRF bit SICSR,4 ; LVD reset flagWDGRF bit SICSR,0 ; Watchdog reset flag;----------------------------------------------------------------------------; MCCMCCSR label $002c ; Main Clock Control / Status RegisterMCO bit MCCSR,7 ; Main clock out selectionCP bfield MCCSR,5,2 ; CPU clock prescalerSMS bit MCCSR,4 ; Slow mode selectTB bfield MCCSR,2,2 ; Time base controlOIE bit MCCSR,1 ; Oscillator interrupt enableOIF bit MCCSR,0 ; Oscillator interrupt flagMCCBCR label $002d ; Main Clock Controller: Beep Control RegisterBC bfield MCCBCR,0,2 ; Beep control;----------------------------------------------------------------------------; Timer A/Binclude "timer.inc"__deftimer "TA",$0030__deftimer "TB",$0040;----------------------------------------------------------------------------; Serial Communications Interfaceinclude "sci2.inc"__defsci2 $0050,5;----------------------------------------------------------------------------; CANCANISR label $005a ; CAN Interrupt Status RegisterRXIF3 bit CANISR,7 ; Receive Interrupt Flag for Buffer 3RXIF2 bit CANISR,6 ; Receive Interrupt Flag for Buffer 2RXIF1 bit CANISR,5 ; Receive Interrupt Flag for Buffer 1TXIF bit CANISR,4 ; Transmit Interrupt FlagSCIF bit CANISR,3 ; Status Change Interrupt FlagORIF bit CANISR,2 ; Overrun Interrupt FlagTEIF bit CANISR,1 ; Transmit Error Interrupt FlagEPND bit CANISR,0 ; Error Interrupt PendingCANICR label $005b ; CAN Interrupt Control RegisterESCI bit CANICR,6 ; Extended Status Change InterruptRXIE bit CANICR,5 ; Receive Interrupt EnableTXIE bit CANICR,4 ; Transmit Interrupt EnableSCIE bit CANICR,3 ; Status Change Interrupt EnableORIE bit CANICR,2 ; Overrun Interrupt EnableTEIE bit CANICR,1 ; Transmit Error Interrupt EnableCANCSR label $005c ; CAN Control / Status RegisterBOFF bit CANCSR,6 ; Bus-Off StateEPSV bit CANCSR,5 ; Error Passive StateSRTE bit CANCSR,4 ; Simultaneous Receive/Transmit EnableNRTX bit CANCSR,3 ; No RetransmissionFSYN bit CANCSR,2 ; Fast SynchronizationWKPS bit CANCSR,1 ; Wake-up PulseRUN bit CANCSR,0 ; CAN EnableCANBRPR label $005d ; CAN Baud Rate Prescaler RegisterRJW bfield CANBRPR,6,2 ; maximum number of time quanta by which a bit period may be shortened or lengthened to achieve resynchronizationBRP bfield CANBRPR,0,6 ; CAN system clock cycleCANBTR label $005e ; CAN Bit Timing RegisterBS2 bfield CANBTR,4,3 ; length of Bit Segment 2BS1 bfield CANBTR,0,4 ; length of Bit Segment 1CANPSR label $005f ; CAN Page Selection RegisterCAN_P0 label $0060 ; Paged RegistersCAN_P1 label $0061CAN_P2 label $0062CAN_P3 label $0063CAN_P4 label $0064CAN_P5 label $0065CAN_P6 label $0066CAN_P7 label $0067CAN_P8 label $0068CAN_P9 label $0069CAN_P10 label $006aCAN_P11 label $006bCAN_P12 label $006cCAN_P13 label $006dCAN_P14 label $006eCAN_P15 label $006fCAN_LIDHR label CAN_P0 ; [Page 0] Last Identifier High RegisterCAN_LIDLR label CAN_P1 ; [Page 0] Last Identifier Low RegisterCAN_TECR label CAN_P14 ; [Page 0] Transmit Error Counter RegisterCAN_RECR label CAN_P15 ; [Page 0] Receive Error Counter Register__N set 1rept 3__NS set "\{__N}"CAN_IDHR{__NS} label CAN_P0 ; [Page 1..3] Identifier High RegisterCAN_IDLR{__NS} label CAN_P1 ; [Page 1..3] Identifier Low RegisterCAN_DATA0{__NS} label CAN_P2 ; [Page 1..3] Data RegistersCAN_DATA1{__NS} label CAN_P3 ; [Page 1..3]CAN_DATA2{__NS} label CAN_P4 ; [Page 1..3]CAN_DATA3{__NS} label CAN_P5 ; [Page 1..3]CAN_DATA4{__NS} label CAN_P6 ; [Page 1..3]CAN_DATA5{__NS} label CAN_P7 ; [Page 1..3]CAN_DATA6{__NS} label CAN_P8 ; [Page 1..3]CAN_DATA7{__NS} label CAN_P9 ; [Page 1..3]CAN_BCSR{__NS} label CAN_P15 ; [Page 1..3] Buffer Control/Status RegisterCAN_ACC{__NS} bit CAN_BCSR{__NS},3; Acceptance CodeCAN_RDY{__NS} bit CAN_BCSR{__NS},2; Message ReadyCAN_BUSY{__NS} bit CAN_BCSR{__NS},1; Busy BufferCAN_LOCK{__NS} bit CAN_BCSR{__NS},0; Lock Buffer__N set __N+1endmCAN_FHR0 label CAN_P0 ; [Page 4] Filter High Register 0CAN_FLR0 label CAN_P1 ; [Page 4] Filter Low Register 0CAN_MHR0 label CAN_P2 ; [Page 4] Mask High Register 0CAN_MLR0 label CAN_P3 ; [Page 4] Mask Low Register 0CAN_FHR1 label CAN_P4 ; [Page 4] Filter High Register 1CAN_FLR1 label CAN_P5 ; [Page 4] Filter Low Register 1CAN_MHR1 label CAN_P6 ; [Page 4] Mask High Register 1CAN_MLR1 label CAN_P7 ; [Page 4] Mask Low Register 1;----------------------------------------------------------------------------; Analog/Digital Converterinclude "adc10.inc"__defadc10 $0070;----------------------------------------------------------------------------; PWM ARTinclude "pwm_art.inc"__defpwmart $0073restoreendif ; __reg72521inc