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ifndef __regu355inc__regu355inc equ 1savelisting off ; no listing over this file;****************************************************************************;* *;* AS 1.42 - File REGU355.INC *;* *;* Contains Bit & Register Definitions for AT43USB355 *;* *;****************************************************************************;----------------------------------------------------------------------------; Memory Limits; no EEPROM!RAMSTART equ 0x60,dataRAMEND equ 0x45f,dataFLASHEND label 0x5fff;----------------------------------------------------------------------------; Chip ConfigurationMCUCR port 0x35 ; MCU General Control RegisterSM avrbit MCUCR,4 ; Choose Idle/Power Down ModeSE avrbit MCUCR,5 ; Enable Sleep Mode;----------------------------------------------------------------------------; GPIOPINA port 0x19 ; Port A @ 0x19 (IO) ff.PINB port 0x16 ; Port B @ 0x16 (IO) ff.PIND port 0x10 ; Port D @ 0x10 (IO) ff.PINF port 0x04 ; Port F @ 0x04 (IO) ff.;----------------------------------------------------------------------------; Interrupt Vectorsenumconf 1,codeenum INT0_vect=1 ; External Interrupt Request 0nextenum INT1_vect ; External Interrupt Request 1nextenum TIMER1_CAPT_vect ; Timer/Counter 1 Capture Eventnextenum TIMER1_COMPA_vect ; Timer/Counter 1 Compare Match Anextenum TIMER1_COMPB_vect ; Timer/Counter 1 Compare Match Bnextenum TIMER1_OVF_vect ; Timer/Counter 1 Overflownextenum TIMER0_OVF_vect ; Timer/Counter 0 Overflownextenum SPI_STC_vect ; SPI Serial Transfer Completenextenum Reserved1_vectnextenum Reserved2_vectnextenum ADC_vect ; ADC Conversion Completenextenum ANA_COMP_vect ; Analog Comparatornextenum USB_HW_vect ; USB Hardware;----------------------------------------------------------------------------; External InterruptsISC00 avrbit MCUCR,0 ; External Interrupt 0 Sense ControlISC01 avrbit MCUCR,1ISC10 avrbit MCUCR,2 ; External Interrupt 1 Sense ControlISC11 avrbit MCUCR,3GIMSK port 0x3b ; General Interrupt Mask RegisterINT0 avrbit GIMSK,6 ; Enable External Interrupt 0INT1 avrbit GIMSK,7 ; Enable External Interrupt 1GIFR port 0x3a ; External Interrupt-FlagsINTF0 avrbit GIFR,6 ; External Interrupt 0 OccuredINTF1 avrbit GIFR,7 ; External Interrupt 1 Occured;----------------------------------------------------------------------------; TimersTCCR0 port 0x33 ; Timer/Counter 0 Control RegisterCS00 avrbit TCCR0,0 ; Clock SelectCS01 avrbit TCCR0,1CS02 avrbit TCCR0,2TCNT0 port 0x32 ; Timer/Counter 0 ValueTCCR1A port 0x2f ; Timer/Counter 1 Control Register APWM10 avrbit TCCR1A,0 ; Mode of Pulse Width ModulatorPWM11 avrbit TCCR1A,1COM1B0 avrbit TCCR1A,4 ; Timer/Counter 1 Compare Mode BCOM1B1 avrbit TCCR1A,5COM1A0 avrbit TCCR1A,6 ; Timer/Counter 1 Compare Mode ACOM1A1 avrbit TCCR1A,7TCCR1B port 0x2e ; Timer/Counter 1 Control Register BCS10 avrbit TCCR1B,0 ; Timer/Counter Clock SelectCS11 avrbit TCCR1B,1CS12 avrbit TCCR1B,2CTC1 avrbit TCCR1B,3 ; Clear after Equality?ICES1 avrbit TCCR1B,6 ; Capture Slope SelectionICNC1 avrbit TCCR1B,7 ; Capture Noise FilterTCNT1L port 0x2c ; Timer/Counter 1 Value LSBTCNT1H port 0x2d ; Timer/Counter 1 Value MSBOCR1AL port 0x2a ; Timer/Counter 1 Output Compare Value A LSBOCR1AH port 0x2b ; Timer/Counter 1 Output Compare Value A MSBOCR1BL port 0x28 ; Timer/Counter 1 Output Compare Value B LSBOCR1BH port 0x29 ; Timer/Counter 1 Output Compare Value B MSBICR1L port 0x24 ; Timer/Counter 1 Input Capture Value LSBICR1H port 0x25 ; Timer/Counter 1 Input Capture Value MSBTIMSK port 0x39 ; Timer Interrupt Mask RegisterTOIE0 avrbit TIMSK,1 ; Timer/Counter 0 Overflow Interrupt EnableTICIE1 avrbit TIMSK,3 ; Timer/Counter 1 Input Capture Interrupt EnableOCIE1B avrbit TIMSK,5 ; Timer/Counter 1 Output Compare Interrupt Enable BOCIE1A avrbit TIMSK,6 ; Timer/Counter 1 Output Compare Interrupt Enable ATOIE1 avrbit TIMSK,7 ; Timer/Counter 1 Overflow Interrupt EnableTIFR port 0x38 ; Timer Interrupt Flag Register;----------------------------------------------------------------------------; Watchdog Timerinclude "wdm21.inc"WDTOE avrbit WDTCR,4 ; Turn-Off Enable;----------------------------------------------------------------------------; SPIinclude "spi90.inc";----------------------------------------------------------------------------; A/D ConverterADMUX port 0x08 ; Multiplexer SelectionMUX3 avrbit ADMUX,3 ; MultiplexerMUX2 avrbit ADMUX,2MUX1 avrbit ADMUX,1MUX0 avrbit ADMUX,0ADCSR port 0x07 ; Control/Status RegisterADEN avrbit ADCSR,7 ; Enable ADCADSC avrbit ADCSR,6 ; Start ConversionADFR avrbit ADCSR,5 ; Free Running SelectADIF avrbit ADCSR,4 ; Interrupt FlagADIE avrbit ADCSR,3 ; Interrupt EnableADPS2 avrbit ADCSR,2 ; Prescaler SelectADPS1 avrbit ADCSR,1ADPS0 avrbit ADCSR,0ADCH port 0x03 ; Data RegisterADCL port 0x02;----------------------------------------------------------------------------; USBFCAR3 sfr 0x1fa2 ; Function End-point 3 Control and Acknowledge RegisterFCAR2 sfr 0x1fa3 ; Function End-point 2 Control and Acknowledge RegisterFCAR1 sfr 0x1fa4 ; Function End-point 1 Control and Acknowledge RegisterFCAR0 sfr 0x1fa5 ; Function End-point 0 Control and Acknowledge RegisterHCAR0 sfr 0x1fa7 ; Hub End-point 0 Control and Acknowledge RegisterPSTATE2 sfr 0x1fa9 ; Hub Port 2 Bus State RegisterPSTATE3 sfr 0x1faa ; Hub Port 3 Bus State RegisterHPSCR1 sfr 0x1fb0 ; Hub Port 1 Status Change RegisterHPSCR2 sfr 0x1fb1 ; Hub Port 2 Status Change RegisterHPSCR3 sfr 0x1fb2 ; Hub Port 3 Status Change RegisterHPSTAT1 sfr 0x1fb8 ; Hub Port 1 Status RegisterHPSTAT2 sfr 0x1fb9 ; Hub Port 2 Status RegisterHPSTAT3 sfr 0x1fba ; Hub Port 3 Status RegisterHPCON sfr 0x1fc5 ; Hub Port Control RegisterHSTR sfr 0x1fc7 ; Hub Status RegisterFBYTE_CNT3 sfr 0x1fca ; Function End-point 3 Byte Count RegisterFBYTE_CNT2 sfr 0x1fcb ; Function End-point 2 Byte Count RegisterFBYTE_CNT1 sfr 0x1fcc ; Function End-point 1 Byte Count RegisterFBYTE_CNT0 sfr 0x1fcd ; Function End-point 0 Byte Count RegisterHBYTE_CNT0 sfr 0x1fcf ; Hub End-point 0 Byte Count RegisterFDR3 sfr 0x1fd2 ; Function End-point 3 FIFO Data RegisterFDR2 sfr 0x1fd3 ; Function End-point 2 FIFO Data RegisterFDR1 sfr 0x1fd4 ; Function End-point 1 FIFO Data RegisterFDR0 sfr 0x1fd5 ; Function End-point 0 FIFO Data RegisterHDR0 sfr 0x1fd7 ; Hub End-point 0 FIFO Data RegisterFCSR3 sfr 0x1fda ; Function Controller End-point 3 Service Routine RegisterFCSR2 sfr 0x1fdb ; Function Controller End-point 2 Service Routine RegisterFCSR1 sfr 0x1fdc ; Function Controller End-point 1 Service Routine RegisterFCSR0 sfr 0x1fdd ; Function Controller End-point 0 Service Routine RegisterHCSR0 sfr 0x1fdf ; Hub Controller End-point 0 Service Routine RegisterFEND_P3_CNTR sfr 0x1fe2 ; Function End-point 3 Control RegisterFEND_P2_CNTR sfr 0x1fe3 ; Function End-point 2 Control RegisterFEND_P1_CNTR sfr 0x1fe4 ; Function End-point 1 Control RegisterFEND_P0_CNTR sfr 0x1fe5 ; Function End-point 0 Control RegisterHEND_P0_CNTR sfr 0x1fe7 ; Hub End-point 0 Control RegisterFADDR sfr 0x1fee ; Function Address RegisterHADDR sfr 0x1fef ; Hub Address RegisterUOVCER sfr 0x1ff2 ; Overcurrent Detect RegisterUIER sfr 0x1ff3 ; USB Interrupt Enable RegisterSOF_IE avrbit UIER,7 ; Enable Start of Frame InterruptEOF2_IE avrbit UIER,6 ; Enable EOF2 InterruptFEP3_IE avrbit UIER,4 ; Enable Function End-point 3 InterruptHEP0_IE avrbit UIER,3 ; Enable Hub End-point 0 InterruptFEP2_IE avrbit UIER,2 ; Enable Function End-point 2 InterruptFEP1_IE avrbit UIER,1 ; Enable Function End-point 1 InterruptFEP0_IE avrbit UIER,0 ; Enable Function End-point 0 InterruptUIAR sfr 0x1ff5 ; USB Interrupt Acknowledge RegisterSOF_INTACK avrbit UIAR,7 ; Start of Frame Interrupt AcknowledgeEOF2_INTACK avrbit UIAR,5 ; EOF2 Interrupt AcknowledgeFEP3_INTACK avrbit UIAR,4 ; Function End-point 3 Interrupt AcknowledgeHEP0_INTACK avrbit UIAR,3 ; Hub End-point 0 Interrupt AcknowledgeFEP2_INTACK avrbit UIAR,2 ; Function End-point 2 Interrupt AcknowledgeFEP1_INTACK avrbit UIAR,1 ; Function End-point 1 Interrupt AcknowledgeFEP0_INTACK avrbit UIAR,0 ; Function End-point 0 Interrupt AcknowledgeUIMSKR sfr 0x1ff6 ; USB Interrupt Mask RegisterSOF_IMSK avrbit UIMSKR,7 ; Start of Frame Interrupt MaskEOF2_IMSK avrbit UIMSKR,5 ; EOF2 Interrupt MaskFEP3_IMSK avrbit UIMSKR,4 ; Function End-point 3 Interrupt MaskHEP0_IMSK avrbit UIMSKR,3 ; Hub End-point 0 Interrupt MaskFEP2_IMSK avrbit UIMSKR,2 ; Function End-point 2 Interrupt MaskFEP1_IMSK avrbit UIMSKR,1 ; Function End-point 1 Interrupt MaskFEP0_IMSK avrbit UIMSKR,0 ; Function End-point 0 Interrupt MaskUISR sfr 0x1ff7 ; USB Interrupt Status RegisterSOF_INT avrbit UISR,7 ; Start of Frame InterruptEOF2_INT avrbit UISR,5 ; EOF2 InterruptFE3_INT avrbit UISR,4 ; Function End-point 3 InterruptHEP0_INT avrbit UISR,3 ; Hub End-point 0 InterruptFE2_INT avrbit UISR,2 ; Function End-point 2 InterruptFE1_INT avrbit UISR,1 ; Function End-point 1 InterruptFE0_INT avrbit UISR,0 ; Function End-point 0 InterruptSPRSMSK sfr 0x1ff8 ; Suspend/Resume Interrupt Mask RegisterBUS_INT_MSK avrbit SPRSMSK,3 ; USB Reset Interrupt MaskFRWUP_INT_MSK avrbit SPRSMSK,2 ; Function Remote Wakeup Interrupt MaskRSM_INT_MSK avrbit SPRSMSK,1 ; Resume Interrupt MaskGLB_SUSP_INT_MSK avrbit SPRSMSK,0 ; Global Suspend Interrupt EnableSPRSIE sfr 0x1ff9 ; Suspend/Resume Interrupt Enable RegisterBUS_IE avrbit SPRSIE,3 ; USB Reset Interrupt EnableFRWUP_IE avrbit SPRSIE,2 ; Function Remote Wakeup Interrupt EnableRSM_IE avrbit SPRSIE,1 ; Resume Interrupt EnableGLB_SUSP_IE avrbit SPRSIE,0 ; Global Suspend Interrupt EnableSPRSR sfr 0x1ffa ; Suspend/Resume RegisterBUS_INT avrbit SPRSR,3 ; USB Bus InterruptFRWUP_INT avrbit SPRSR,2 ; Function Remote WakeupRSM_INT avrbit SPRSR,1 ; ResumeGLB_SUSP_INT avrbit SPRSR,0 ; Global SuspendGLB_STATE sfr 0x1ffb ; Global State RegisterFRM_NUM_L sfr 0x1ffc ; Frame Number Low RegisterFRM_NUM_H sfr 0x1ffd ; Frame Number High Registerrestore ; re-enable listingendif ; __regu355inc