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Flow report for main
Mon Nov 14 18:42:11 2011
Quartus II Version 9.0 Build 132 02/25/2009 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Flow Summary
  3. Flow Settings
  4. Flow Non-Default Global Settings
  5. Flow Elapsed Time
  6. Flow OS Summary
  7. Flow Log



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2009 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+--------------------------------------------------------------------+
; Flow Summary                                                       ;
+-------------------------+------------------------------------------+
; Flow Status             ; Successful - Mon Nov 14 18:42:11 2011    ;
; Quartus II Version      ; 9.0 Build 132 02/25/2009 SJ Full Version ;
; Revision Name           ; main                                     ;
; Top-level Entity Name   ; main                                     ;
; Family                  ; ACEX1K                                   ;
; Device                  ; EP1K50QC208-3                            ;
; Timing Models           ; Final                                    ;
; Met timing requirements ; No                                       ;
; Total logic elements    ; 241 / 2,880 ( 8 % )                      ;
; Total pins              ; 147 / 147 ( 100 % )                      ;
; Total memory bits       ; 15,360 / 40,960 ( 38 % )                 ;
; Total PLLs              ; 0                                        ;
+-------------------------+------------------------------------------+


+-----------------------------------------+
; Flow Settings                           ;
+-------------------+---------------------+
; Option            ; Setting             ;
+-------------------+---------------------+
; Start date & time ; 11/14/2011 18:41:53 ;
; Main task         ; Compilation         ;
; Revision Name     ; main                ;
+-------------------+---------------------+


+-------------------------------------------------------------------------------------------------+
; Flow Non-Default Global Settings                                                                ;
+-----------------------+------------------------------+---------------+-------------+------------+
; Assignment Name       ; Value                        ; Default Value ; Entity Name ; Section Id ;
+-----------------------+------------------------------+---------------+-------------+------------+
; COMPILER_SIGNATURE_ID ; 163627096360.132128531303744 ; --            ; --          ; --         ;
+-----------------------+------------------------------+---------------+-------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------+
; Flow Elapsed Time                                                                                                           ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Module Name             ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Analysis & Synthesis    ; 00:00:05     ; 1.0                     ; 174 MB              ; 00:00:02                           ;
; Fitter                  ; 00:00:05     ; 1.0                     ; 159 MB              ; 00:00:03                           ;
; Assembler               ; 00:00:02     ; 1.0                     ; 153 MB              ; 00:00:02                           ;
; Classic Timing Analyzer ; 00:00:00     ; 1.0                     ; 122 MB              ; 00:00:00                           ;
; Total                   ; 00:00:12     ; --                      ; --                  ; 00:00:07                           ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+


+---------------------------------------------------------------------------------------+
; Flow OS Summary                                                                       ;
+-------------------------+------------------+------------+------------+----------------+
; Module Name             ; Machine Hostname ; OS Name    ; OS Version ; Processor type ;
+-------------------------+------------------+------------+------------+----------------+
; Analysis & Synthesis    ; ewgeny           ; Windows XP ; 5.1        ; i686           ;
; Fitter                  ; ewgeny           ; Windows XP ; 5.1        ; i686           ;
; Assembler               ; ewgeny           ; Windows XP ; 5.1        ; i686           ;
; Classic Timing Analyzer ; ewgeny           ; Windows XP ; 5.1        ; i686           ;
+-------------------------+------------------+------------+------------+----------------+


------------
; Flow Log ;
------------
quartus_map --read_settings_files=on --write_settings_files=off fpga -c main
quartus_fit --read_settings_files=off --write_settings_files=off fpga -c main
quartus_asm --read_settings_files=off --write_settings_files=off fpga -c main
quartus_tan --read_settings_files=off --write_settings_files=off fpga -c main