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  1. // ZX-Evo Base Configuration (c) NedoPC 2008,2009,2010,2011,2012,2013,2014
  2. //
  3. // generates horizontal vga sync, double the rate of TV horizontal sync
  4.  
  5. /*
  6.     This file is part of ZX-Evo Base Configuration firmware.
  7.  
  8.     ZX-Evo Base Configuration firmware is free software:
  9.     you can redistribute it and/or modify it under the terms of
  10.     the GNU General Public License as published by
  11.     the Free Software Foundation, either version 3 of the License, or
  12.     (at your option) any later version.
  13.  
  14.     ZX-Evo Base Configuration firmware is distributed in the hope that
  15.     it will be useful, but WITHOUT ANY WARRANTY; without even
  16.     the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  17.     See the GNU General Public License for more details.
  18.  
  19.     You should have received a copy of the GNU General Public License
  20.     along with ZX-Evo Base Configuration firmware.
  21.     If not, see <http://www.gnu.org/licenses/>.
  22. */
  23.  
  24. `include "../include/tune.v"
  25.  
  26. module video_vga_sync_h(
  27.  
  28.         input  wire clk,
  29.  
  30.         output reg  vga_hsync,
  31.  
  32.         output reg  scanout_start,
  33.  
  34.         input  wire hsync_start
  35. );
  36.  
  37.         localparam HSYNC_END    = 10'd106;
  38.         localparam SCANOUT_BEG  = 10'd156;
  39.  
  40.         localparam HPERIOD = 10'd896;
  41.  
  42.  
  43.  
  44.         reg [9:0] hcount;
  45.  
  46.         initial
  47.         begin
  48.                 hcount = 9'd0;
  49.                 vga_hsync = 1'b0;
  50.         end
  51.  
  52.  
  53.  
  54.         always @(posedge clk)
  55.         begin
  56.                         if( hsync_start )
  57.                                 hcount <= 10'd2;
  58.                         else if ( hcount==(HPERIOD-9'd1) )
  59.                                 hcount <= 10'd0;
  60.                         else
  61.                                 hcount <= hcount + 9'd1;
  62.         end
  63.  
  64.  
  65.         always @(posedge clk)
  66.         begin
  67.                 if( !hcount )
  68.                         vga_hsync <= 1'b1;
  69.                 else if( hcount==HSYNC_END )
  70.                         vga_hsync <= 1'b0;
  71.         end
  72.  
  73.  
  74.         always @(posedge clk)
  75.         begin
  76.                 if( hcount==SCANOUT_BEG )
  77.                         scanout_start <= 1'b1;
  78.                 else
  79.                         scanout_start <= 1'b0;
  80.         end
  81.  
  82.  
  83. endmodule
  84.  
  85.