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  1. // ZX-Evo Base Configuration (c) NedoPC 2008,2009,2010,2011,2012,2013,2014
  2. //
  3. // generates vertical blank, sync and window.
  4.  
  5. /*
  6.     This file is part of ZX-Evo Base Configuration firmware.
  7.  
  8.     ZX-Evo Base Configuration firmware is free software:
  9.     you can redistribute it and/or modify it under the terms of
  10.     the GNU General Public License as published by
  11.     the Free Software Foundation, either version 3 of the License, or
  12.     (at your option) any later version.
  13.  
  14.     ZX-Evo Base Configuration firmware is distributed in the hope that
  15.     it will be useful, but WITHOUT ANY WARRANTY; without even
  16.     the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  17.     See the GNU General Public License for more details.
  18.  
  19.     You should have received a copy of the GNU General Public License
  20.     along with ZX-Evo Base Configuration firmware.
  21.     If not, see <http://www.gnu.org/licenses/>.
  22. */
  23.  
  24.  
  25. // H is period of horizontal sync;
  26. // from the last non-blanked line:
  27. // 3H is pre-blank,
  28. // 2.xxH is vertical sync (slightly more than 2H, all hsync edges preserved)
  29. // vblank is total of 25H
  30.  
  31. `include "../include/tune.v"
  32.  
  33. module video_sync_v(
  34.  
  35.         input  wire        clk,
  36.  
  37.         input  wire        hsync_start, // synchronizing signal
  38.         input  wire        line_start,  // to end vsync some time after hsync has ended
  39.  
  40.         input  wire        hint_start,
  41.  
  42.  
  43.  
  44.         // atm video mode input
  45.         input  wire        mode_atm_n_pent,
  46.  
  47.         input  wire        mode_60hz,
  48.  
  49.  
  50.         output reg         vblank,
  51.         output reg         vsync,
  52.  
  53.         output reg         int_start, // one-shot positive pulse marking beginning of INT for Z80
  54.  
  55.         output reg         vpix // vertical picture marker: active when there is line with pixels in it, not just a border. changes with hsync edge
  56. );
  57.  
  58.  
  59.  
  60.  
  61.  
  62.         localparam VBLNK_BEG = 9'd00;
  63.         localparam VSYNC_BEG = 9'd08;
  64.         localparam VSYNC_END = 9'd11;
  65.         localparam VBLNK_END = 9'd32;
  66.  
  67.         localparam INT_BEG = 9'd0;
  68.  
  69.         // pentagon (x192)
  70.         localparam VPIX_BEG_PENT = 9'd080;
  71.         localparam VPIX_END_PENT = 9'd272;
  72.  
  73.         // ATM (x200)
  74.         localparam VPIX_BEG_ATM = 9'd076;
  75.         localparam VPIX_END_ATM = 9'd276;
  76.  
  77.         localparam VPERIOD = 9'd320; // pentagono foreva!
  78.  
  79.         // ntsc
  80.         localparam VSYNC60_BEG = 9'd04;
  81.         localparam VSYNC60_END = 9'd07;
  82.         localparam VBLNK60_END = 9'd22;
  83.         // pentagon (x192)
  84.         localparam VPIX60_BEG_PENT = 9'd046;
  85.         localparam VPIX60_END_PENT = 9'd238;
  86.         // ATM (x200)
  87.         localparam VPIX60_BEG_ATM = 9'd042;
  88.         localparam VPIX60_END_ATM = 9'd242;
  89.         //
  90.         localparam VPERIOD60 = 9'd262;
  91.  
  92.         reg [8:0] vcount;
  93.         reg mode60;
  94.  
  95.  
  96.  
  97.  
  98.         initial
  99.         begin
  100.                 vcount = 9'd0;
  101.                 vsync = 1'b0;
  102.                 vblank = 1'b0;
  103.                 vpix = 1'b0;
  104.                 int_start = 1'b0;
  105.         end
  106.  
  107.         always @(posedge clk) if( hsync_start )
  108.         begin
  109.                 if( vcount==((mode60?VPERIOD60:VPERIOD)-9'd1) )
  110.                 begin
  111.                         vcount <= 9'd0;
  112.                         mode60 <= mode_60hz;
  113.                 end
  114.                 else
  115.                         vcount <= vcount + 9'd1;
  116.         end
  117.  
  118.  
  119.  
  120.         always @(posedge clk) if( hsync_start )
  121.         begin
  122.                 if( vcount==VBLNK_BEG )
  123.                         vblank <= 1'b1;
  124.                 else if( vcount==(mode60?VBLNK60_END:VBLNK_END) )
  125.                         vblank <= 1'b0;
  126.         end
  127.  
  128.  
  129.         always @(posedge clk)
  130.         begin
  131.                 if( (vcount==(mode60?VSYNC60_BEG:VSYNC_BEG)) && hsync_start )
  132.                         vsync <= 1'b1;
  133.                 else if( (vcount==(mode60?VSYNC60_END:VSYNC_END)) && line_start  )
  134.                         vsync <= 1'b0;
  135.         end
  136.  
  137.  
  138.         always @(posedge clk)
  139.         begin
  140.                 if( (vcount==INT_BEG) && hint_start )
  141.                         int_start <= 1'b1;
  142.                 else
  143.                         int_start <= 1'b0;
  144.         end
  145.  
  146.  
  147.  
  148.         always @(posedge clk) if( hsync_start )
  149.         begin
  150.                 if( vcount==(mode60?(mode_atm_n_pent ? VPIX60_BEG_ATM : VPIX60_BEG_PENT):(mode_atm_n_pent ? VPIX_BEG_ATM : VPIX_BEG_PENT)) )
  151.                         vpix <= 1'b1;
  152.                 else if( vcount==(mode60?(mode_atm_n_pent ? VPIX60_END_ATM : VPIX60_END_PENT):(mode_atm_n_pent ? VPIX_END_ATM : VPIX_END_PENT)) )
  153.                         vpix <= 1'b0;
  154.         end
  155.  
  156.  
  157. endmodule
  158.  
  159.