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  1. // ZX-Evo Base Configuration (c) NedoPC 2008,2009,2010,2011,2012,2013,2014
  2. //
  3. // just DOS signal control
  4.  
  5. /*
  6.     This file is part of ZX-Evo Base Configuration firmware.
  7.  
  8.     ZX-Evo Base Configuration firmware is free software:
  9.     you can redistribute it and/or modify it under the terms of
  10.     the GNU General Public License as published by
  11.     the Free Software Foundation, either version 3 of the License, or
  12.     (at your option) any later version.
  13.  
  14.     ZX-Evo Base Configuration firmware is distributed in the hope that
  15.     it will be useful, but WITHOUT ANY WARRANTY; without even
  16.     the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  17.     See the GNU General Public License for more details.
  18.  
  19.     You should have received a copy of the GNU General Public License
  20.     along with ZX-Evo Base Configuration firmware.
  21.     If not, see <http://www.gnu.org/licenses/>.
  22. */
  23.  
  24. `include "../include/tune.v"
  25.  
  26. module zdos(
  27.  
  28.         input  wire        fclk,
  29.         input  wire        rst_n,
  30.  
  31.  
  32.         input  wire        dos_turn_on,
  33.         input  wire        dos_turn_off,
  34.  
  35.         input  wire        cpm_n,
  36.         input  wire        atm_pen2, // atm palette write enable
  37.  
  38.  
  39.         output reg         dos,
  40.  
  41.  
  42.         // for clearing trdemu_wr_disable
  43.         input  wire        zpos,
  44.         input  wire        m1_n,
  45.  
  46.  
  47.         // control of page #FE for emulation
  48.         output reg         in_trdemu,
  49.  
  50.         input  wire        in_nmi, // not exiting trdemu mode when also in nmi mode
  51.  
  52.         input  wire        clr_nmi, // out (#BE),a
  53.         input  wire        vg_rdwr_fclk,
  54.         input  wire [ 3:0] fdd_mask,
  55.         input  wire [ 1:0] vg_a,
  56.         input  wire        romnram,
  57.  
  58.         output reg         trdemu_wr_disable
  59. );
  60.  
  61.         wire trdemu_on = vg_rdwr_fclk && fdd_mask[vg_a] && dos && romnram && !atm_pen2;
  62.  
  63.  
  64.         // control of 'DOS' signal
  65.         always @(posedge fclk, negedge rst_n)
  66.         if( !rst_n )
  67.         begin
  68.                 dos = 1'b1;
  69.         end
  70.         else // posedge fclk
  71.         begin
  72.                 if( !cpm_n )
  73.                         dos <= 1'b1;
  74.                 else if( dos_turn_off )
  75.                         dos <= 1'b0;
  76.                 else if( dos_turn_on )
  77.                         dos <= 1'b1;
  78.         end
  79.  
  80.  
  81.         // vg emulator RAM turn on/off
  82.         always @(posedge fclk, negedge rst_n)
  83.         if( !rst_n )
  84.                 in_trdemu <= 1'b0;
  85.         else if( clr_nmi && !in_nmi )
  86.                 in_trdemu <= 1'b0;
  87.         else if( trdemu_on )
  88.                 in_trdemu <= 1'b1;
  89.  
  90.  
  91.         // wr disable for trdemu RAM page
  92.         always @(posedge fclk, negedge rst_n)
  93.         if( !rst_n )
  94.                 trdemu_wr_disable <= 1'b0;
  95.         else if( zpos && !m1_n )
  96.                 trdemu_wr_disable <= 1'b0;
  97.         else if( trdemu_on )
  98.                 trdemu_wr_disable <= 1'b1;
  99.  
  100.  
  101. endmodule
  102.  
  103.  
  104.