Subversion Repositories zxusbnet

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#               top_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#               assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY MAX3000A
set_global_assignment -name DEVICE "EPM3128ATC100-10"
set_global_assignment -name TOP_LEVEL_ENTITY top
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "7.2 SP3"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:32:27  OCTOBER 13, 2012"
set_global_assignment -name LAST_QUARTUS_VERSION "7.2 SP3"
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
set_global_assignment -name MAX7000_OPTIMIZATION_TECHNIQUE AREA
set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP"
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 10
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_global_assignment -name MAX7000_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
set_global_assignment -name SLOW_SLEW_RATE ON
set_global_assignment -name AUTO_TURBO_BIT OFF

set_location_assignment PIN_52 -to za[14]
set_location_assignment PIN_54 -to za[13]
set_location_assignment PIN_56 -to za[12]
set_location_assignment PIN_57 -to za[11]
set_location_assignment PIN_100 -to za[10]
set_location_assignment PIN_98 -to za[9]
set_location_assignment PIN_99 -to za[8]
set_location_assignment PIN_97 -to za[7]
set_location_assignment PIN_90 -to zb
set_location_assignment PIN_92 -to za[6]
set_location_assignment PIN_93 -to za[5]
set_location_assignment PIN_94 -to za[4]
set_location_assignment PIN_79 -to za[3]
set_location_assignment PIN_75 -to za[2]
set_location_assignment PIN_69 -to za[1]
set_location_assignment PIN_67 -to za[0]


set_location_assignment PIN_58 -to zd[7]
set_location_assignment PIN_60 -to zd[0]
set_location_assignment PIN_61 -to zd[1]
set_location_assignment PIN_63 -to zd[2]
set_location_assignment PIN_64 -to zd[6]
set_location_assignment PIN_68 -to zd[5]
set_location_assignment PIN_71 -to zd[3]
set_location_assignment PIN_76 -to zd[4]
set_location_assignment PIN_81 -to ziorqge
set_location_assignment PIN_83 -to zblkrom
set_location_assignment PIN_84 -to zmreq_n
set_location_assignment PIN_85 -to ziorq_n
set_location_assignment PIN_7 -to zrd_n
set_location_assignment PIN_88 -to zwr_n
set_location_assignment PIN_89 -to zrst_n
set_location_assignment PIN_96 -to zcsrom_n

set_location_assignment PIN_20 -to bd[0]
set_location_assignment PIN_6 -to w5300_addr[6]
set_location_assignment PIN_16 -to bd[5]
set_location_assignment PIN_23 -to w5300_addr[2]
set_location_assignment PIN_29 -to bd[1]
set_location_assignment PIN_41 -to sl811_cs_n
set_location_assignment PIN_14 -to w5300_addr[7]
set_location_assignment PIN_13 -to bd[6]
set_location_assignment PIN_21 -to w5300_addr[3]
set_location_assignment PIN_37 -to bd[2]
set_location_assignment PIN_9 -to sl811_a0
set_location_assignment PIN_25 -to w5300_addr[8]
set_location_assignment PIN_8 -to sl811_rst_n
set_location_assignment PIN_31 -to w5300_addr[4]
set_location_assignment PIN_40 -to bd[3]
set_location_assignment PIN_36 -to bwr_n
set_location_assignment PIN_17 -to w5300_addr[9]
set_location_assignment PIN_30 -to sl811_intrq
set_location_assignment PIN_19 -to w5300_addr[5]
set_location_assignment PIN_32 -to bd[4]
set_location_assignment PIN_10 -to w5300_rst_n
set_location_assignment PIN_35 -to w5300_addr[1]
set_location_assignment PIN_12 -to sl811_ms_n
set_location_assignment PIN_87 -to fclk
set_location_assignment PIN_80 -to zint_n
set_location_assignment PIN_28 -to usb_clk


set_location_assignment PIN_42 -to usb_power
set_location_assignment PIN_44 -to w5300_addr[0]
set_location_assignment PIN_45 -to w5300_cs_n
set_location_assignment PIN_46 -to w5300_int_n
set_location_assignment PIN_47 -to bd[7]
set_location_assignment PIN_48 -to brd_n



set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim (Verilog)"
set_global_assignment -name EDA_NETLIST_WRITER_OUTPUT_DIR ../rtl/tb -section_id eda_simulation
set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VERILOG -section_id eda_simulation
set_global_assignment -name EDA_MAP_ILLEGAL_CHARACTERS ON -section_id eda_simulation
set_global_assignment -name EDA_MAINTAIN_DESIGN_HIERARCHY ON -section_id eda_simulation
set_global_assignment -name EDA_SETUP_HOLD_DETECTION_INPUT_REGISTERS_BIDIR_PINS_DISABLED ON -section_id eda_simulation


set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF

set_global_assignment -name FMAX_REQUIREMENT "48 MHz" -section_id fclock
set_instance_assignment -name CLOCK_SETTINGS fclock -to fclk


set_global_assignment -name VERILOG_FILE top.v