Subversion Repositories pentevo

zx-mode:
screen0: disp = $14000 (byte) = $A000 (word)
(1010)
screen1: disp = $1C000 (byte) = $E000 (word)
(1110)

next are word addresses.
given horiz screen word counter hcnt[3:0] (16 words, 0-15) and vert line counter vcnt[7:0] (192 lines, 0-191)
address are as follow (word address):
pixaddr = { vcnt[7:6],vcnt[2:0],vcnt[5:3],hcnt[3:0] } + disp
attraddr= { vcnt[7:3],hcnt[3:0] } + disp + $0C00

fetch sequence: pix, attr.
render sequence: {pix[0],attr[2]}, {pix[1],attr[3]} (buffer is byte-addressable)


p16c mode (pentagon 16 colors):
scr0: +0pg4, +0pg5, +$2000pg4, +$2000pg5
scr1: +0pg6, +0pg7, +$2000pg6, +$2000pg7

byte= IiGRBgrb, left pixel is igrb, right pixel is IGRB

1000 is equal to 0000

screen0: disp0 = $8000, disp1 = $A000, disp2 = $9000, disp3 = $B000

read sequence: lane2, lane1, lane4, lane3 (same as x320 mode)
1010, 1000, 1011, 1001

screen1: disp0 = $C000, disp1 = $E000, disp2 = $D000, disp3 = $F000
1110, 1100, 1111, 1101

render sequence: {2pix[2], 2pix[0], 2pix[6], 2pix[4], 2pix[3], 2pix[1], 2pix[7], 2pix[5]}


8 adjacent pixels: a b c d e f g h
a b - disp0, c d - disp1, e f - disp2, g h - disp3
word read is for two adjacent 8pixels blocks
byte IiGRBgrb, left pixel is igrb, right is IGRB





-- atm modes --

pages:                  0      1      2      3      4      5      6      7
pages WORD addresses: #0000, #2000, #4000, #6000, #8000, #A000, #C000, #E000.


txt mode:

symbols, page 5(7)
byte lanes for EVEN symbolpositions: #01C0, #0200, #0240, ..., #07C0 (step is #40)
byte lanes for ODD  symbolpositions: #21C0, #2200, #2240, ..., #27C0.
only first 40 bytes from every lane used (display is 80x25)

attrs, page 1(3)
byte lanes for EVEN attrs: #21C0, ...
           for ODD       : #01C0, ... (swapped from symbols)

BW required: 1/4 (twice faster than ZX attr mode since x640 pixels)

attr structure: ink={D6,D2,D1,D0}, paper={D7,D5,D4,D3}

absolute word addresses:
even syms: #A0E0, #A100, #A120, ..., #A3E0 (step is #20)
odd  syms: #B0E0, #B100, #B120, ..., #B3E0
even attr: #30E0, #3100, #3120, ..., #33E0
odd  attr: #20E0, #2100, #2120, ..., #23E0

read sequence: evensyms, evenattr, oddsyms, oddattr - to have time to fetch syms from fontrom
1010, 0011, 1011, 0010

absolute addrs, alt. screen:
even syms: #E0E0, #E100, #E120, ..., #E3E0
odd  syms: #F0E0, #F100, #F120, ..., #F3E0
even attr: #70E0, #7100, #7120, ..., #73E0
odd  attr: #60E0, #6100, #6120, ..., #63E0

1110, 0111, 1111, 0110

render sequence: {sym[0],attr[2]}, {sym[4],attr[6]}, {sym[1],attr[3]}, {sym[5],attr[7]}


achtung!!! FUCK ATM! wrong textmode fetch! etcetcetc...





x640 mode:

pixels, page 5(7)
byte lanes for EVEN pixels: #0000, #0028, #0050, ..., #1F18 (step is #28)
byte lanes for ODD  pixels: #2000, #2028, #2050, ..., #3F18.

attrs (per pixel byte), page 1(3)
byte lanes for EVEN attrs: #0000, #0028, .......
               ODD       : #2000, #2028, ....... (EXACTLY same as for pixels)

BW required: 1/4 (twice faster than ZX attr mode since x640 pixels)

attr structure: ink={D6,D2,D1,D0}, paper={D7,D5,D4,D3}

abs. word addrs, pri. screen:

even pixs: #A000, #A014, #A028, ..., #AF8C (step is #14)
odd  pixs: #B000, #B014, #B028, ..., #BF8C
even attr: #2000, #2014, #2028, ..., #2F8C
odd  attr: #3000, #3014, #3028, ..., #3F8C

read sequence: evenpix, evenattr, oddpix, oddattr - to have same places for attrs as in text mode
1010, 0010, 1011, 0011

abs. word addrs, sec. screen:

even pixs: #E000, #E014, #E028, ..., #EF8C
odd  pixs: #F000, #F014, #F028, ..., #FF8C
even attr: #6000, #6014, #6028, ..., #6F8C
odd  attr: #7000, #7014, #7028, ..., #7F8C

1110, 0110, 1111, 0111

render sequence: {pix[0],attr[2]}, {pix[4],attr[6]}, {pix[1],attr[3]}, {pix[5],attr[7]}


x320 mode:

just pixels, pages 5 and 1 (7 and 3).
1st byte lane: pg1(3), #0000, #0028, #0050, ..., #1F18 (step is #28)
2nd byte lane: pg5(7), #0000, #0028, #0050, ..., #1F18
3rd byte lane: pg1(3), #2000, #2028, #2050, ..., #3F18
4th byte lane: pg5(7), #2000, #2028, #2050, ..., #3F18

pixels are taken from byte lanes in increasing order.

every byte gives then 2 pixels: pixel0={D6,D2,D1,D0}, pixel1={D7,D5,D4,D3}

BW required: 1/4 (same as p16c mode).

abs. word addrs, pri. screen:

1st lane: #2000, #2014, #2028, ..., #2F8C (step is #14)
2nd lane: #A000, #A014, #A028, ..., #AF8C
3rd lane: #3000, #3014, #3028, ..., #3F8C
4th lane: #B000, #B014, #B028, ..., #BF8C

read sequence: lane2, lane1, lane4, lane3 - to be consistent with x640 fetches (same sequence of addresses)
1010, 0010, 1011, 0011

abs. word addrs, sec. screen:

1st lane: #6000, #6014, #6028, ..., #6F8C
2nd lane: #E000, #E014, #E028, ..., #EF8C
3rd lane: #7000, #7014, #7028, ..., #7F8C
4th lane: #F000, #F014, #F028, ..., #FF8C

1110, 0110, 1111, 0111

render sequence: {2pix[2],2pix[0],2pix[6],2pix[4],2pix[3],2pix[1],2pix[7],2pix[5]}



group numbers:

0 - buf[0], buf[2] : 000, 010
1 - buf[4], buf[6] : 100, 110
2 - buf[1], buf[3] : 001, 011
3 - buf[5], buf[7] : 101, 111

zx mode: only 0 and 2 used

pix numbers: 0..7 for bit modes (zx, phm, ahm, txt),
0..3 for 16c modes (p16c, a16c)