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                waits[6:2] <= 5'd0;
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                waits[6:2] <= 5'd0;
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        end
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        end
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        assign spiint_n = ~|waits;
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`ifndef SIMULATE
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`ifndef SIMULATE
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        assign spiint_n = ~|waits;
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        assign wait_n = spiint_n ? 1'bZ : 1'b0;
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        assign wait_n = spiint_n ? 1'bZ : 1'b0;
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`else
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`else
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        assign spiint_n = 1'b1;
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        assign wait_n = 1'bZ;
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        assign wait_n = 1'bZ;
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`endif
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`endif
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endmodule
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endmodule
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