Details | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1186 | savelij | 1 | ifndef __stm8s207mbinc ; avoid multiple inclusion |
| 2 | __stm8s207mbinc equ 1 |
||
| 3 | |||
| 4 | save |
||
| 5 | listing off ; no listing over this file |
||
| 6 | |||
| 7 | ;**************************************************************************** |
||
| 8 | ;* * |
||
| 9 | ;* AS 1.42 - File REG207MB.INC * |
||
| 10 | ;* * |
||
| 11 | ;* contains SFR and Bit Definitions for: * |
||
| 12 | ;* STM8S207MB, STM8S207M8, STM8S207RB, STM8S207R8, STM8S207R6 * |
||
| 13 | ;* STM8S207CB, STM8S207C8, STM8S207C6, STM8S207SB, STM8S207S8 * |
||
| 14 | ;* STM8S207S6, STM8S207K8, STM8S207K6 * |
||
| 15 | ;* * |
||
| 16 | ;* source: DocID14733 Rev 13 * |
||
| 17 | ;* * |
||
| 18 | ;**************************************************************************** |
||
| 19 | |||
| 20 | ;---------------------------------------------------------------------------- |
||
| 21 | ; Memory Addresses |
||
| 22 | |||
| 23 | E2START label $4000 ; start address internal EEPROM |
||
| 24 | switch MOMCPUNAME ; couldn't find a scheme... |
||
| 25 | case "STM8S207K6","STM8S207K8","STM8S207S6","STM8S207C6","STM8S207R6" |
||
| 26 | E2END label E2START+$3ff |
||
| 27 | case "STM8S207S8","STM8S207SB","STM8S207C8","STM8S207R8" |
||
| 28 | E2END label E2START+$5ff |
||
| 29 | elsecase |
||
| 30 | E2END label E2START+$7ff |
||
| 31 | endcase |
||
| 32 | |||
| 33 | FLASHSTART label $8000 ; start address internal Flash |
||
| 34 | |||
| 35 | BLSTART label $6000 ; start address boot loader |
||
| 36 | BLEND label $67ff ; end " " " |
||
| 37 | |||
| 38 | RAMSTART label $0000 ; start address internal RAM |
||
| 39 | RAMEND label $17ff ; end " " " |
||
| 40 | |||
| 41 | include "uid.inc" |
||
| 42 | __defuid $48cd |
||
| 43 | |||
| 44 | ;---------------------------------------------------------------------------- |
||
| 45 | ; Option Bytes |
||
| 46 | |||
| 47 | OPT0 label $4800 ; Read-out protection |
||
| 48 | ROP bfield OPT0,0,8 |
||
| 49 | OPT1 label $4801 ; User boot code |
||
| 50 | UBC bfield OPT1,0,8 |
||
| 51 | NOPT1 label $4802 |
||
| 52 | NUBC bfield NOPT1,0,8 |
||
| 53 | OPT2 label $4803 ; Alternate function remapping |
||
| 54 | AFR bfield OPT2,0,8 |
||
| 55 | NOPT2 label $4804 |
||
| 56 | NAFR bfield NOPT2,0,8 |
||
| 57 | OPT3 label $4805 ; Misc. option |
||
| 58 | LSI_EN bit OPT3,3 ; Low speed internal clock enable |
||
| 59 | IWDG_HW bit OPT3,2 ; Independent watchdog |
||
| 60 | WWDG_HW bit OPT3,1 ; Window watchdog activation |
||
| 61 | WWDG_HALT bit OPT3,0 ; Window watchdog reset on halt |
||
| 62 | NOPT3 label $4806 |
||
| 63 | NLSI_EN bit NOPT3,3 |
||
| 64 | NIWDG_HW bit NOPT3,2 |
||
| 65 | NWWDG_HW bit NOPT3,1 |
||
| 66 | NWWDG_HALT bit NOPT3,0 |
||
| 67 | OPT4 label $4807 ; Clock option |
||
| 68 | EXTCLK bit OPT4,3 ; External clock selection |
||
| 69 | CKAWUSEL bit OPT4,2 ; Auto wakeup unit/clock |
||
| 70 | PRSC1 bit OPT4,1 ; AWU clock prescaler |
||
| 71 | PRSC0 bit OPT4,0 |
||
| 72 | NOPT4 label $4808 |
||
| 73 | NEXTCLK bit NOPT4,3 |
||
| 74 | NCKAWUSEL bit NOPT4,2 |
||
| 75 | NPRSC1 bit NOPT4,1 |
||
| 76 | NPRSC0 bit NOPT4,0 |
||
| 77 | OPT5 label $4809 ; HSE clock startup |
||
| 78 | HSECNT bfield OPT5,0,8 |
||
| 79 | NOPT5 label $480a |
||
| 80 | NHSECNT bfield NOPT5,0,8 |
||
| 81 | OPT6 label $480b ; Reserved |
||
| 82 | NOPT6 label $480c |
||
| 83 | OPT7 label $480d ; Flash wait states |
||
| 84 | WAITSTATE bit OPT7,0 |
||
| 85 | NOPT7 label $480e |
||
| 86 | NWAITSTATE bit NOPT7,0 |
||
| 87 | OPTBL label $487e ; Boot Loader |
||
| 88 | BL bfield OPTBL,0,8 |
||
| 89 | NOPTBL label $487f |
||
| 90 | NBL bfield NOPTBL,0,8 |
||
| 91 | |||
| 92 | ;---------------------------------------------------------------------------- |
||
| 93 | ; Vectors |
||
| 94 | |||
| 95 | RESET_vect label $8000 ; Reset |
||
| 96 | TRAP_vect label $8004 ; Software interrupt |
||
| 97 | TLI_vect label $8008 ; External top level interrupt |
||
| 98 | AWU_vect label $800c ; Auto wake up from halt |
||
| 99 | CLK_vect label $8010 ; Clock controller |
||
| 100 | EXTI0_vect label $8014 ; Port A external interrupts |
||
| 101 | EXTI1_vect label $8018 ; Port B external interrupts |
||
| 102 | EXTI2_vect label $801c ; Port C external interrupts |
||
| 103 | EXTI3_vect label $8020 ; Port D external interrupts |
||
| 104 | EXTI4_vect label $8024 ; Port E external interrupts |
||
| 105 | SPI_vect label $8030 ; End of transfer |
||
| 106 | TIM1_vect label $8034 ; TIM1 update/overflow/underflow/trigger/break |
||
| 107 | TIM1_CAPT_vect label $8038 ; TIM1 capture/compare |
||
| 108 | TIM2_vect label $803c ; TIM2 update /overflow |
||
| 109 | TIM2_CAPT_vect label $8040 ; TIM2 capture/compare |
||
| 110 | TIM3_vect label $8044 |
||
| 111 | TIM3_CAPT_vect label $8048 |
||
| 112 | UART1_TX_vect label $804c ; Tx complete |
||
| 113 | UART1_RX_vect label $8050 ; Receive register DATA FULL |
||
| 114 | I2C_vect label $8054 ; I2C interrupt |
||
| 115 | UART3_TX_vect label $8058 ; Tx complete |
||
| 116 | UART3_RX_vect label $805c ; Receive register DATA FULL |
||
| 117 | ADC2_vect label $8060 ; ADC1 end of conversion/analog watchdog interrupt |
||
| 118 | TIM4_vect label $8064 ; TIM4 update/overflow |
||
| 119 | FLASH_vect label $8068 ; EOP/WR_PG_DIS |
||
| 120 | |||
| 121 | ;---------------------------------------------------------------------------- |
||
| 122 | ; GPIO |
||
| 123 | |||
| 124 | include "gpio.inc" |
||
| 125 | __defgpio "PA",$5000 |
||
| 126 | __defgpio "PB",$5005 |
||
| 127 | __defgpio "PC",$500a |
||
| 128 | __defgpio "PD",$500f |
||
| 129 | __defgpio "PE",$5014 |
||
| 130 | __defgpio "PF",$5019 |
||
| 131 | __defgpio "PG",$500e |
||
| 132 | __defgpio "PH",$5023 |
||
| 133 | __defgpio "PI",$5028 |
||
| 134 | |||
| 135 | ;---------------------------------------------------------------------------- |
||
| 136 | ; Flash |
||
| 137 | |||
| 138 | include "flash.inc" |
||
| 139 | __defflash $505a |
||
| 140 | |||
| 141 | ;---------------------------------------------------------------------------- |
||
| 142 | ; Interrupt Controller |
||
| 143 | |||
| 144 | include "itc.inc" |
||
| 145 | __defexti $50a0,6 |
||
| 146 | __defitc $7f70,30 |
||
| 147 | |||
| 148 | ;---------------------------------------------------------------------------- |
||
| 149 | ; Reset Controller |
||
| 150 | |||
| 151 | include "rst.inc" |
||
| 152 | __defrst $50b3 |
||
| 153 | |||
| 154 | ;---------------------------------------------------------------------------- |
||
| 155 | ; Clock Controller |
||
| 156 | |||
| 157 | include "clk.inc" |
||
| 158 | __defclk $50c0 |
||
| 159 | |||
| 160 | ;---------------------------------------------------------------------------- |
||
| 161 | ; Window Watchdog |
||
| 162 | |||
| 163 | include "wwdg.inc" |
||
| 164 | __defwwdg $50d1 |
||
| 165 | |||
| 166 | ;---------------------------------------------------------------------------- |
||
| 167 | ; Independent Watchdog |
||
| 168 | |||
| 169 | include "iwdg.inc" |
||
| 170 | __defiwdg $50e0 |
||
| 171 | |||
| 172 | ;---------------------------------------------------------------------------- |
||
| 173 | ; Beeper |
||
| 174 | |||
| 175 | include "beep.inc" |
||
| 176 | __defbeep $50f3 |
||
| 177 | |||
| 178 | ;---------------------------------------------------------------------------- |
||
| 179 | ; Serial Peripheral Interface |
||
| 180 | |||
| 181 | include "spi.inc" |
||
| 182 | __defspi $5200 |
||
| 183 | |||
| 184 | ;---------------------------------------------------------------------------- |
||
| 185 | ; I2C |
||
| 186 | |||
| 187 | include "i2c.inc" |
||
| 188 | __defi2c $5210 |
||
| 189 | |||
| 190 | ;---------------------------------------------------------------------------- |
||
| 191 | ; UART1 |
||
| 192 | |||
| 193 | include "uart1.inc" |
||
| 194 | __defusart1 "UART1",$5230 |
||
| 195 | |||
| 196 | ;---------------------------------------------------------------------------- |
||
| 197 | ; UART3 |
||
| 198 | |||
| 199 | include "uart3.inc" |
||
| 200 | __defusart3 "UART3",$5240 |
||
| 201 | |||
| 202 | ;---------------------------------------------------------------------------- |
||
| 203 | ; Timer 1 |
||
| 204 | |||
| 205 | include "tim1.inc" |
||
| 206 | __deftim1 $5250 |
||
| 207 | |||
| 208 | ;---------------------------------------------------------------------------- |
||
| 209 | ; Timer 2 |
||
| 210 | |||
| 211 | include "tim2.inc" |
||
| 212 | __deftim2 $5300,0 |
||
| 213 | |||
| 214 | ;---------------------------------------------------------------------------- |
||
| 215 | ; Timer 3 |
||
| 216 | |||
| 217 | include "tim3.inc" |
||
| 218 | __deftim3 $5320,0 |
||
| 219 | |||
| 220 | ;---------------------------------------------------------------------------- |
||
| 221 | ; Timer 4 |
||
| 222 | |||
| 223 | include "tim4.inc" |
||
| 224 | __deftim4 $5340,0 |
||
| 225 | |||
| 226 | ;---------------------------------------------------------------------------- |
||
| 227 | ; A/D Converter 2 |
||
| 228 | |||
| 229 | include "adc2.inc" |
||
| 230 | __defadc2 "ADC",,$5400 |
||
| 231 | |||
| 232 | ;---------------------------------------------------------------------------- |
||
| 233 | ; CPU |
||
| 234 | |||
| 235 | include "stm8/cpuregs.inc" |
||
| 236 | __defcpuregs $7f00 |
||
| 237 | |||
| 238 | ;---------------------------------------------------------------------------- |
||
| 239 | ; Single Wire Interface Module |
||
| 240 | |||
| 241 | include "stm8/swim.inc" |
||
| 242 | __defswim $7f80 |
||
| 243 | |||
| 244 | ;---------------------------------------------------------------------------- |
||
| 245 | ; Debug Module |
||
| 246 | |||
| 247 | include "stm8/dm.inc" |
||
| 248 | __defdm $7f90 |
||
| 249 | |||
| 250 | ;---------------------------------------------------------------------------- |
||
| 251 | ; AWU |
||
| 252 | |||
| 253 | include "awu.inc" |
||
| 254 | __defawu $50f0 |
||
| 255 | |||
| 256 | restore ; allow again |
||
| 257 | |||
| 258 | endif ; __stm8s207mbinc |