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1126 savelij 1
		ifndef	__reg6253inc	; avoid multiple inclusion
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__reg6253inc	equ	1
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		save
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		listing	off		; no listing over this file
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;****************************************************************************
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;*                                                                          *
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;*   AS 1.42 - File REG6253.INC                                             *
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;*                                                                          *
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;*   contains SFR and Bit Definitions for ST6253/6260/6263                  *
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;*                                                                          *
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;*   Source: ST62T53C/T60C/T63C, ST62E60C Data Sheet, Rev. 2.8, July 2001   *
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;*                                                                          *
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;****************************************************************************
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;----------------------------------------------------------------------------
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; Memory Addresses
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RAMSTART	sfr	000h		; Start Address Internal RAM
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		; area 00h..3fh maps to one RAM bank
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		; area 40h..7fh is ROM read window
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RAMEND		sfr	0bfh		; End Address Internal RAM
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		switch	MOMCPUNAME
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		case	"ST6253"
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		case	"ST6260"
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EESTART		 sfr	0000h		; Start Address EEPROM (two banks shared with RAM)
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EEEND		 sfr	003fh		; End     "        "
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		case	"ST6263"
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EESTART		 sfr	0000h		; Start Address EEPROM (one bank shared with RAM)
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EEEND		 sfr	003fh		; End     "        "
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		elsecase
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		 fatal	"Huh?"
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		endcase
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		segment	code
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ROMSTART	label	0880h		; Start Address Internal ROM
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ROMEND		label	0fffh		; End     "        "     ROM
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;----------------------------------------------------------------------------
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; Interrupt Vectors
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ADC_vect	label	0ff0h		; A/D End Of Conversion, shared with...
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TIMER_vect	label	0ff0h		; Timer Underflow
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ARTIMER_vect	label	0ff2h		; AR Timer Overflow/Compare
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PORTC_vect	label	0ff4h		; Ext. Interrupt Port C, shared with...
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SPI_vect	label	0ff4h		; SPI Interrupt
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PORTA_vect	label	0ff6h		; Ext. Interrupt Port A, shared with...
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PORTB_vect	label	0ff6h		; Ext. Interrupt Port B
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NMI_vect	label	0ffch		; Non Maskable Interrupt
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RESET_vect	label	0ffeh		; RESET
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;----------------------------------------------------------------------------
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; GPIO
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		include	"gpio.inc"
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		__defgpio "A",0c0h
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		__defgpio "B",0c1h
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		__defgpio "C",0c2h
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;----------------------------------------------------------------------------
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; CPU
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		include	"ior.inc"
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DRBR		sfr	0e8h		; Data RAM Bank Register
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DRBR4		bit	4,DRBR		;  Map RAM Page 2
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		ifdef	EESTART
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		if	MOMCPUNAME="ST6260"
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DRBR1		bit	4,DRBR		;  Map EEPROM Page 1
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		endif
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DRBR0		bit	0,DRBR		;  Map EEPROM Page 0
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		endif
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		ifdef	EESTART
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EECTL		sfr	0eah		; EEPROM Control Register
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E2OFF		bit	6,EECTL		;  Stand-by Enable Bit
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E2PAR1		bit	3,EECTL		;  Parallel Start Bit
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E2PAR2		bit	2,EECTL		;  Parallel Mode En
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E2BUSY		bit	1,EECTL		;  EEPROM Busy Bit
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E2ENA		bit	0,EECTL		;  EEPROM Enable Bit
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		endif
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OSCCTL		sfr	0dch		; Oscillator Control
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RS		bfield	OSCCTL,0,2	;  Division Ratio
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;----------------------------------------------------------------------------
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; Watchdog
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		include	"wdg.inc"
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DWDR		sfr	WDGR		; alternate name in older data sheets
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;----------------------------------------------------------------------------
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; Analog/Digital Converter
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		include	"adc.inc"
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OSCOFF		bit	2,ADCR		; Disable Main Oscillator
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;----------------------------------------------------------------------------
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; Timer
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		include	"timer.inc"
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		__deftimer 0d2h,""
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;----------------------------------------------------------------------------
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; AR Timer
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		include	"artimer.inc"
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		__defartimer 0d0h
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;----------------------------------------------------------------------------
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; SPI
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		include	"spi2.inc"
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		restore
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		endif			; __reg6253inc