Details | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1186 | savelij | 1 | ifndef __reg6215inc ; avoid multiple inclusion |
| 2 | __reg6215inc equ 1 |
||
| 3 | |||
| 4 | save |
||
| 5 | listing off ; no listing over this file |
||
| 6 | |||
| 7 | ;**************************************************************************** |
||
| 8 | ;* * |
||
| 9 | ;* AS 1.42 - File REG6215.INC * |
||
| 10 | ;* * |
||
| 11 | ;* contains SFR and Bit Definitions for ST6215/25 * |
||
| 12 | ;* * |
||
| 13 | ;* Source: ST6215/25C Data Sheet, Rev. 2.8, August 1999 * |
||
| 14 | ;* * |
||
| 15 | ;**************************************************************************** |
||
| 16 | |||
| 17 | ;---------------------------------------------------------------------------- |
||
| 18 | ; Memory Addresses |
||
| 19 | |||
| 20 | RAMSTART sfr 0080h ; Start Address Internal RAM |
||
| 21 | RAMEND sfr 00bfh ; End Address Internal RAM |
||
| 22 | |||
| 23 | switch MOMCPUNAME |
||
| 24 | case "ST6215" |
||
| 25 | ROMSTART label 0880h ; End " " ROM |
||
| 26 | case "ST6225" |
||
| 27 | ROMSTART label 0080h ; End " " ROM |
||
| 28 | elsecase |
||
| 29 | fatal "Huh?" |
||
| 30 | endcase |
||
| 31 | |||
| 32 | ;---------------------------------------------------------------------------- |
||
| 33 | ; Interrupt Vectors |
||
| 34 | |||
| 35 | ADC_vect label 0ff0h ; End Of Conversion |
||
| 36 | TIMER_vect label 0ff2h ; Timer Underflow |
||
| 37 | PORTC_vect label 0ff4h ; Ext. Interrupt Port C, shared with... |
||
| 38 | PORTB_vect label 0ff4h ; Ext. Interrupt Port B |
||
| 39 | PORTA_vect label 0ff6h ; Ext. Interrupt Port A |
||
| 40 | NMI_vect label 0ffch ; Non Maskable Interrupt |
||
| 41 | RESET_vect label 0ffeh ; RESET |
||
| 42 | |||
| 43 | ;---------------------------------------------------------------------------- |
||
| 44 | ; GPIO |
||
| 45 | |||
| 46 | include "gpio.inc" |
||
| 47 | __defgpio "A",0c0h |
||
| 48 | __defgpio "B",0c1h |
||
| 49 | __defgpio "C",0c2h |
||
| 50 | |||
| 51 | ;---------------------------------------------------------------------------- |
||
| 52 | ; CPU |
||
| 53 | |||
| 54 | include "ior.inc" |
||
| 55 | |||
| 56 | ;---------------------------------------------------------------------------- |
||
| 57 | ; Watchdog |
||
| 58 | |||
| 59 | include "wdg.inc" |
||
| 60 | DWDR sfr WDGR ; alternate name in older data sheets |
||
| 61 | |||
| 62 | ;---------------------------------------------------------------------------- |
||
| 63 | ; Analog/Digital Converter |
||
| 64 | |||
| 65 | include "adc.inc" |
||
| 66 | OSCOFF bit 2,ADCR ; Main Oscillator Off |
||
| 67 | |||
| 68 | ;---------------------------------------------------------------------------- |
||
| 69 | ; Timer 1 |
||
| 70 | |||
| 71 | include "timer.inc" |
||
| 72 | __deftimer 0d2h,"" |
||
| 73 | TOUT bit 5,TSCR ; Timer Output Control |
||
| 74 | DOUT bit 4,TSCR ; Data Output |
||
| 75 | |||
| 76 | restore |
||
| 77 | endif ; __reg6215inc |