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1126 savelij 1 
		ifndef	__pmc251inc	; avoid multiple inclusion
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__pmc251inc	equ	1
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		save
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		listing	off		; no listing over this file
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;****************************************************************************
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;*                                                                          *
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;*   AS 1.42 - File PMC251.INC                                              *
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;*                                                                          *
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;*   contains SFR and Bit Definitions for PMC251                            *
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;*                                                                          *
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;*   Sources: PMC251 Data Sheet, Ver. 0.12, Mar 20, 2014                    *
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;*                                                                          *
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;****************************************************************************
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;----------------------------------------------------------------------------
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; Interrupt Control
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inten		sfr	0x04		; Interrupt Enable
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timer16_inten	bit	inten.2		;  Timer16 Interrupt Enable
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pb0_inten	bit	inten.1		;  PB0 Interrupt Enable
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pa0_inten	bit	inten.0		;  PA0 Interrupt Enable
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intrq		sfr	0x05		; Interrupt Request Register
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timer16_intrq	bit	intrq.2		;  Timer16 Interrupt Request
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pb0_intrq	bit	intrq.1		;  PB0 Interrupt Request
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pa0_intrq	bit	intrq.0		;  PA0 Interrupt Request
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integs		sfr	0x0c		; Interrupt Edge Register
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timer16_egs	bit	integs.4	;  Timer16 Edge Selection
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pb0_egs		_bfield	integs,2,2	;  PB0 Edge Selection
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pa0_egs		_bfield	integs,0,2	;  PA0 Edge Selection
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;----------------------------------------------------------------------------
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; CPU Core
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__numcpus	equ	2
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clkmd		sfr	0x03		; Clock Mode Register
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clkselect	_bfield	clkmd,5,3	;  System Clock Selection
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ihrc_enable	bit	clkmd.4		;  IHRC Enable
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clktype		bit	clkmd.3		;  Clock Type Select
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ilrc_enable	bit	clkmd.2		;  ILRC Enable
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wd_enable	bit	clkmd.1		;  Watch Dog Enable
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pa5_prst	bit	clkmd.0		;  Pin PA5/RESET# Function
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ihrcr		sfr	0x0b		; Internal High RC Oscillator Control Register
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eoscr		sfr	0x0a		; External Oscillator Setting Register
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enxtal		bit	eoscr.7		;  Enable external crystal
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xtalsel		_bfield	eoscr,5,2	;  External Crystal Oscillator Selection
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pwrdn		bit	eoscr.0		;  Power Down Band Gap and LVR Hardware
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misc		sfr	0x3b		; MISC Register
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en32k_lcur	bit	misc.6		;  Enable 32 kHz low current after osc.
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en_fwkup	bit	misc.5		;  Enable Fast Wakeup
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lvr_rec		bit	misc.3		;  LVR Recover Time
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dis_lvr		bit	misc.2		;  Disable LVR Function
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wdperiod	_bfield	misc,0,2	;  Watchdog Timeout Period
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;----------------------------------------------------------------------------
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; GPIO
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padier		sfr	0x0d		; Port A Digital Input Enable Register
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pbdier		sfr	0x0e		; Port B Digital Input Enable Register
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pa		sfr	0x10		; Port A Data Register
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pb		sfr	0x14		; Port B Data Register
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pac		sfr	0x11		; Port A Control Register
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pbc		sfr	0x15		; Port B Control Register
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paph		sfr	0x12		; Port A Pull High Register
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pbph		sfr	0x16		; Port B Pull High Register
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;----------------------------------------------------------------------------
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; Timer
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t16m		sfr	0x06		; Timer 16 Mode Register
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tm16_clksrc	_bfield	t16m,5,3	;  Timer Clock Source Selection
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tm16_clkdiv	_bfield t16m,3,2	;  Internal Clock Divider
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tm16_isrc	_bfield	t16m,0,3	;  Interrupt Source
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		restore
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		endif			; __pmc251inc