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668 lvd 1 
// ZX-Evo Base Configuration (c) NedoPC 2008,2009,2010,2011,2012,2013,2014
155 lvd 2 
//
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// just DOS signal control
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668 lvd 5 
/*
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    This file is part of ZX-Evo Base Configuration firmware.
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    ZX-Evo Base Configuration firmware is free software:
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    you can redistribute it and/or modify it under the terms of
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    the GNU General Public License as published by
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    the Free Software Foundation, either version 3 of the License, or
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    (at your option) any later version.
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    ZX-Evo Base Configuration firmware is distributed in the hope that
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    it will be useful, but WITHOUT ANY WARRANTY; without even
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    the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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    See the GNU General Public License for more details.
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    You should have received a copy of the GNU General Public License
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    along with ZX-Evo Base Configuration firmware.
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    If not, see <http://www.gnu.org/licenses/>.
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*/
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161 lvd 24 
`include "../include/tune.v"
155 lvd 25 
 
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module zdos(
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        input  wire        fclk,
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        input  wire        rst_n,
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        input  wire        dos_turn_on,
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        input  wire        dos_turn_off,
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158 lvd 35 
        input  wire        cpm_n,
1113 lvd 36 
        input  wire        atm_pen2, // atm palette write enable
155 lvd 37 
 
158 lvd 38 
 
862 lvd 39 
        output reg         dos,
155 lvd 40 
 
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929 lvd 42 
        // for clearing trdemu_wr_disable
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        input  wire        zpos,
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        input  wire        m1_n,
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862 lvd 47 
        // control of page #FE for emulation
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        output reg         in_trdemu,
929 lvd 49 
 
1042 lvd 50 
        input  wire        in_nmi, // not exiting trdemu mode when also in nmi mode
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862 lvd 52 
        input  wire        clr_nmi, // out (#BE),a
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        input  wire        vg_rdwr_fclk,
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        input  wire [ 3:0] fdd_mask,
891 lvd 55 
        input  wire [ 1:0] vg_a,
929 lvd 56 
        input  wire        romnram,
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        output reg         trdemu_wr_disable
862 lvd 59 
);
155 lvd 60 
 
1112 lvd 61 
        wire trdemu_on = vg_rdwr_fclk && fdd_mask[vg_a] && dos && romnram && !atm_pen2;
929 lvd 62 
 
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862 lvd 64 
        // control of 'DOS' signal
155 lvd 65 
        always @(posedge fclk, negedge rst_n)
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        if( !rst_n )
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        begin
170 lvd 68 
                dos = 1'b1;
155 lvd 69 
        end
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        else // posedge fclk
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        begin
158 lvd 72 
                if( !cpm_n )
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                        dos <= 1'b1;
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                else if( dos_turn_off )
155 lvd 75 
                        dos <= 1'b0;
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                else if( dos_turn_on )
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                        dos <= 1'b1;
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        end
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862 lvd 81 
        // vg emulator RAM turn on/off
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        always @(posedge fclk, negedge rst_n)
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        if( !rst_n )
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                in_trdemu <= 1'b0;
1042 lvd 85 
        else if( clr_nmi && !in_nmi )
862 lvd 86 
                in_trdemu <= 1'b0;
929 lvd 87 
        else if( trdemu_on )
862 lvd 88 
                in_trdemu <= 1'b1;
155 lvd 89 
 
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929 lvd 91 
        // wr disable for trdemu RAM page
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        always @(posedge fclk, negedge rst_n)
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        if( !rst_n )
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                trdemu_wr_disable <= 1'b0;
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        else if( zpos && !m1_n )
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                trdemu_wr_disable <= 1'b0;
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        else if( trdemu_on )
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                trdemu_wr_disable <= 1'b1;
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155 lvd 101 
endmodule
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