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Rev | Author | Line No. | Line |
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16 | lvd | 1 | // ZXiznet project |
2 | // (c) NedoPC 2012 |
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3 | // |
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4 | // test module for w5300 |
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5 | // tests whether transactions going for it are correct |
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6 | |||
7 | module w5300 |
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8 | ( |
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9 | input wire rst_n, |
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10 | input wire [9:0] addr, |
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11 | input wire cs_n, |
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12 | input wire rd_n, |
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13 | input wire wr_n, |
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28 | lvd | 14 | output reg int_n, |
15 | inout wire [7:0] d |
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16 | lvd | 16 | ); |
17 | |||
18 | |||
19 | reg [9:0] access_addr; |
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20 | reg access_rnw; |
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29 | lvd | 21 | reg [7:0] rd_data; |
22 | reg [7:0] wr_data; |
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23 | |||
16 | lvd | 24 | |
25 | wire rd = ~(cs_n|rd_n); |
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26 | wire wr = ~(cs_n|wr_n); |
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27 | |||
28 | |||
29 | initial |
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30 | begin |
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31 | int_n = 1'b1; |
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32 | end |
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33 | |||
34 | |||
35 | |||
36 | always @(negedge rd) |
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37 | begin |
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29 | lvd | 38 | access_addr <= addr; |
39 | access_rnw <= 1'b1; |
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16 | lvd | 40 | end |
41 | |||
29 | lvd | 42 | assign d = rd ? rd_data : 8'bZZZZ_ZZZZ; |
43 | |||
44 | |||
45 | |||
16 | lvd | 46 | always @(negedge wr) |
47 | begin |
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29 | lvd | 48 | access_addr <= addr; |
49 | access_rnw <= 1'b0; |
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50 | wr_data <= d; |
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16 | lvd | 51 | end |
52 | |||
53 | |||
54 | |||
55 | |||
56 | |||
57 | task set_int_n |
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58 | ( |
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59 | input new_int_n |
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60 | ); |
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61 | int_n = new_int_n; |
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62 | |||
63 | endtask |
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64 | |||
65 | |||
66 | |||
67 | function get_rst_n; |
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68 | |||
69 | get_rst_n = rst_n; |
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70 | |||
71 | endfunction |
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72 | |||
30 | lvd | 73 | |
74 | task init_access; |
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75 | |||
76 | access_addr = 'bX; |
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77 | access_rnw = 'bX; |
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78 | wr_data = 'bX; |
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79 | |||
80 | endtask |
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29 | lvd | 81 | |
82 | |||
83 | function [9:0] get_addr; |
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84 | |||
85 | get_addr = access_addr; |
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86 | |||
87 | endfunction |
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88 | |||
89 | |||
90 | function get_rnw; |
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91 | |||
92 | get_rnw = access_rnw; |
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93 | |||
94 | endfunction |
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95 | |||
96 | |||
97 | function [7:0] get_wr_data; |
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98 | |||
99 | get_wr_data = wr_data; |
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100 | |||
101 | endfunction |
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102 | |||
103 | |||
104 | task set_rd_data( input [7:0] data ); |
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105 | |||
106 | rd_data = data; |
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107 | |||
108 | endtask |
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16 | lvd | 109 | |
110 | |||
111 | |||
29 | lvd | 112 | |
16 | lvd | 113 | endmodule |
114 |