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Rev Author Line No. Line
6 lvd 1
#include <avr/io.h>
2
#include <avr/interrupt.h>
3
#include <avr/pgmspace.h>
4
 
5
#include <util/delay.h>
6
 
7
#include "mytypes.h"
8
#include "depacker_dirty.h"
9
#include "getfaraddress.h"
10
#include "pins.h"
126 chrv 11
#include "main.h"
6 lvd 12
#include "ps2.h"
13
#include "zx.h"
14
#include "spi.h"
60 chrv 15
#include "rs232.h"
73 chrv 16
#include "rtc.h"
75 chrv 17
#include "atx.h"
112 chrv 18
#include "joystick.h"
217 lvd 19
#include "tape.h"
219 chrv 20
#include "kbmap.h"
6 lvd 21
 
292 chrv 22
//if want Log than comment next string
23
#undef LOGENABLE
24
 
186 chrv 25
/** FPGA data pointer [far address] (linker symbol). */
625 ddp 26
extern const ULONG fpga PROGMEM;
6 lvd 27
 
186 chrv 28
// FPGA data index..
29
volatile ULONG curFpga;
30
 
31
// Common flag register.
126 chrv 32
volatile UBYTE flags_register;
299 chrv 33
volatile UBYTE flags_ex_register;
126 chrv 34
 
35
// Common modes register.
36
volatile UBYTE modes_register;
37
 
494 chrv 38
// Type extensions of gluk registers
39
volatile UBYTE ext_type_gluk;
40
 
186 chrv 41
// Buffer for depacking FPGA configuration.
42
// You can USED for other purposed after setup FPGA.
6 lvd 43
UBYTE dbuf[DBSIZE];
44
 
104 chrv 45
void put_buffer(UWORD size)
46
{
47
        // writes specified length of buffer to the output
48
        UBYTE * ptr = dbuf;
6 lvd 49
 
104 chrv 50
        do
51
        {
52
                spi_send( *(ptr++) );
53
 
54
        } while(--size);
55
}
56
 
57
void hardware_init(void)
58
{
59
        //Initialized AVR pins
60
 
61
        cli(); // disable interrupts
62
 
63
        // configure pins
64
 
65
        PORTG = 0b11111111;
382 chrv 66
        DDRG  = 0b00000000; // inputs pulled up
104 chrv 67
 
855 lvd 68
        // reset value for PORTF is zero (incl. ATX poweron pin),
69
        // if no HW reset happens, it keeps previous value
70
        //
71
        ///PORTF = 0b11110000; // ATX off (zero output), fpga config/etc inputs
72
        PORTF |=   0b11110000 ;
73
        PORTF &= ~(0b00000111);
74
        DDRF   =   0b00001000;
104 chrv 75
 
382 chrv 76
        PORTE = 0b11110011;
77
        DDRE  = 0b00000000; // PLL to 2X [E2=Z,E3=Z], inputs pulled up
104 chrv 78
 
382 chrv 79
        PORTD = 0b11111111; // inputs pulled up
478 chrv 80
        DDRD  = 0b00100000; // RTS out
104 chrv 81
 
382 chrv 82
 
104 chrv 83
        PORTC = 0b11011111;
84
        DDRC  = 0b00000000; // PWRGOOD input, other pulled up
85
 
562 chrv 86
        PORTB = 0b11000001;
104 chrv 87
        DDRB  = 0b10000111; // LED off, spi outs inactive
88
 
89
        PORTA = 0b11111111;
90
        DDRA  = 0b00000000; // pulled up
91
 
92
        ACSR = 0x80; // DISABLE analog comparator
93
}
94
 
6 lvd 95
int main()
96
{
75 chrv 97
start:
6 lvd 98
 
104 chrv 99
        hardware_init();
6 lvd 100
 
263 chrv 101
        rs232_init();
60 chrv 102
#ifdef LOGENABLE
179 chrv 103
        to_log("VER:");
104
        {
105
                UBYTE b,i;
106
                ULONG version = 0x1DFF0;
107
                char VER[]="..";
108
                for( i=0; i<12; i++)
109
                {
110
                        dbuf[i] = pgm_read_byte_far(version+i);
111
                }
112
                dbuf[i]=0;
113
                to_log((char*)dbuf);
114
                to_log(" ");
180 chrv 115
                UBYTE b1 = pgm_read_byte_far(version+12);
116
                UBYTE b2 = pgm_read_byte_far(version+13);
179 chrv 117
                UBYTE day = b1&0x1F;
118
                UBYTE mon = ((b2<<3)+(b1>>5))&0x0F;
119
                UBYTE year = (b2>>1)&0x3F;
120
                VER[0] = '0'+(day/10);
121
                VER[1] = '0'+(day%10);
122
        to_log(VER);
123
        to_log(".");
124
                VER[0] = '0'+(mon/10);
125
                VER[1] = '0'+(mon%10);
126
        to_log(VER);
127
        to_log(".");
128
                VER[0] = '0'+(year/10);
129
                VER[1] = '0'+(year%10);
130
        to_log(VER);
131
        to_log("\r\n");
132
                //
133
                for( i=0; i<16; i++)
134
                {
135
                        b = pgm_read_byte_far(version+i);
136
                        VER[0] = ((b >> 4) <= 9 )?'0'+(b >> 4):'A'+(b >> 4)-10;
137
                        VER[1] = ((b & 0x0F) <= 9 )?'0'+(b & 0x0F):'A'+(b & 0x0F)-10;
138
                        to_log(VER);
139
                }
140
                to_log("\r\n");
141
        }
60 chrv 142
#endif
6 lvd 143
 
75 chrv 144
        wait_for_atx_power();
6 lvd 145
 
146
        spi_init();
147
 
186 chrv 148
 
855 lvd 149
        // config loop
150
        do
151
        {
152
                // power led OFF
153
                LED_PORT |= 1<<LED;
154
 
155
                DDRF |= (1<<nCONFIG); // pull low for a time
156
                _delay_ms(20);
157
                DDRF &= ~(1<<nCONFIG);
158
                while( !(PINF & (1<<nSTATUS)) ); // wait ready
159
 
160
                curFpga = GET_FAR_ADDRESS(fpga); // prepare for data fetching
186 chrv 161
#ifdef LOGENABLE
855 lvd 162
                {
163
                char log_fpga[]="F........\r\n";
164
                UBYTE b = (UBYTE)((curFpga>>24)&0xFF);
165
                log_fpga[1] = ((b >> 4) <= 9 )?'0'+(b >> 4):'A'+(b >> 4)-10;
166
                log_fpga[2] = ((b & 0x0F) <= 9 )?'0'+(b & 0x0F):'A'+(b & 0x0F)-10;
167
                b = (UBYTE)((curFpga>>16)&0xFF);
168
                log_fpga[3] = ((b >> 4) <= 9 )?'0'+(b >> 4):'A'+(b >> 4)-10;
169
                log_fpga[4] = ((b & 0x0F) <= 9 )?'0'+(b & 0x0F):'A'+(b & 0x0F)-10;
170
                b = (UBYTE)((curFpga>>8)&0xFF);
171
                log_fpga[5] = ((b >> 4) <= 9 )?'0'+(b >> 4):'A'+(b >> 4)-10;
172
                log_fpga[6] = ((b & 0x0F) <= 9 )?'0'+(b & 0x0F):'A'+(b & 0x0F)-10;
173
                b = (UBYTE)(curFpga&0xFF);
174
                log_fpga[7] = ((b >> 4) <= 9 )?'0'+(b >> 4):'A'+(b >> 4)-10;
175
                log_fpga[8] = ((b & 0x0F) <= 9 )?'0'+(b & 0x0F):'A'+(b & 0x0F)-10;
176
                to_log(log_fpga);
177
                }
186 chrv 178
#endif
855 lvd 179
                depacker_dirty();
219 chrv 180
#ifdef LOGENABLE
855 lvd 181
                to_log("depacker_dirty OK\r\n");
219 chrv 182
#endif
6 lvd 183
 
855 lvd 184
                // power led ON
185
                LED_PORT &= ~(1<<LED);
186
 
187
                // wait a bit and check CONF_DONE
188
                _delay_ms(20);
189
        } while( !(CONF_DONE_PIN & (1<<CONF_DONE)) );
190
 
191
 
192
 
172 chrv 193
        //power led OFF
194
        LED_PORT |= 1<<LED;
6 lvd 195
 
196
        // start timer (led dimming and timeouts for ps/2)
197
        TCCR2 = 0b01110011; // FOC2=0, {WGM21,WGM20}=01, {COM21,COM20}=11, {CS22,CS21,CS20}=011
198
                            // clk/64 clocking,
199
                            // 1/512 overflow rate, total 11.059/32768 = 337.5 Hz interrupt rate
200
        TIFR = (1<<TOV2);
201
        TIMSK = (1<<TOIE2);
202
 
203
 
126 chrv 204
        //init some counters and registers
860 lvd 205
        ps2keyboard_init();
206
 
60 chrv 207
        ps2mouse_count = 12;
208
        ps2mouse_initstep = 0;
209
        ps2mouse_resp_count = 0;
299 chrv 210
        ps2mouse_cmd = PS2MOUSE_CMD_SET_RESOLUTION;
126 chrv 211
        flags_register = 0;
299 chrv 212
        flags_ex_register = 0;
126 chrv 213
        modes_register = 0;
494 chrv 214
        ext_type_gluk = 0;
6 lvd 215
 
520 chrv 216
        //reset ps2 keyboard log
217
        ps2keyboard_reset_log();
218
 
75 chrv 219
        //enable mouse
220
        zx_mouse_reset(1);
6 lvd 221
 
60 chrv 222
        //set external interrupt
223
        //INT4 - PS2 Keyboard  (falling edge)
224
        //INT5 - PS2 Mouse     (falling edge)
94 chrv 225
        //INT6 - SPI  (falling edge)
226
        //INT7 - RTC  (falling edge)
227
        EICRB = (1<<ISC41)+(0<<ISC40) + (1<<ISC51)+(0<<ISC50) + (1<<ISC61)+(0<<ISC60) + (1<<ISC71)+(0<<ISC70); // set condition for interrupt
228
        EIFR = (1<<INTF4)|(1<<INTF5)|(1<<INTF6)|(1<<INTF7); // clear spurious ints there
229
        EIMSK |= (1<<INT4)|(1<<INT5)|(1<<INT6)|(1<<INT7); // enable
60 chrv 230
 
219 chrv 231
        kbmap_init();
186 chrv 232
        zx_init();
73 chrv 233
        rtc_init();
6 lvd 234
 
60 chrv 235
#ifdef LOGENABLE
236
        to_log("zx_init OK\r\n");
237
#endif
6 lvd 238
 
60 chrv 239
        sei(); // globally go interrupting
6 lvd 240
 
151 chrv 241
        //set led on keyboard
242
        ps2keyboard_send_cmd(PS2KEYBOARD_CMD_SETLED);
243
 
60 chrv 244
        //main loop
219 chrv 245
        do
854 lvd 246
        {
247
                tape_task();
151 chrv 248
                ps2mouse_task();
854 lvd 249
                ps2keyboard_task();
250
                zx_task(ZX_TASK_WORK);
71 chrv 251
                zx_mouse_task();
112 chrv 252
                joystick_task();
374 chrv 253
                rs232_task();
94 chrv 254
 
219 chrv 255
                //event from SPI
126 chrv 256
                if ( flags_register&FLAG_SPI_INT )
94 chrv 257
                {
258
                        //get status byte
259
                        UBYTE status;
104 chrv 260
                        nSPICS_PORT &= ~(1<<nSPICS);
94 chrv 261
                        nSPICS_PORT |= (1<<nSPICS);
262
                        status = spi_send(0);
263
                        zx_wait_task( status );
264
                }
219 chrv 265
 
854 lvd 266
                atx_power_task(); // must be last in loop!
267
        }
219 chrv 268
        while( (flags_register&FLAG_HARD_RESET) == 0 );
6 lvd 269
 
75 chrv 270
        goto start;
6 lvd 271
}